JPS6430927U - - Google Patents

Info

Publication number
JPS6430927U
JPS6430927U JP12652487U JP12652487U JPS6430927U JP S6430927 U JPS6430927 U JP S6430927U JP 12652487 U JP12652487 U JP 12652487U JP 12652487 U JP12652487 U JP 12652487U JP S6430927 U JPS6430927 U JP S6430927U
Authority
JP
Japan
Prior art keywords
delay element
solid state
ultrasonic solid
state delay
output terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12652487U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12652487U priority Critical patent/JPS6430927U/ja
Publication of JPS6430927U publication Critical patent/JPS6430927U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
  • Electronic Switches (AREA)
  • Ultra Sonic Daignosis Equipment (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本考案の超音波固体遅延子回路を示
す。第2図は、インダクタンスLを変化させた
時の特性を示す。 10……くし形フイルタ、11……超音波固体
遅延子、12……インピーダンス素子、13……
切換手段。
FIG. 1 shows an ultrasonic solid state retarder circuit of the present invention. FIG. 2 shows the characteristics when the inductance L2 is changed. 10...Comb filter, 11...Ultrasonic solid state retarder, 12...Impedance element, 13...
switching means.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 超音波固体遅延子の入力端子と直列に入力抵抗
を接続し、該超音波固体遅延子の出力端子と
接地間にインダクタンスLを接続した超音波固
体遅延子回路において、該超音波固体遅延子の入
力端子Aと出力端子B間にインピーダンス素子を
断続する切換手段を設けたことを特徴とする超音
波固体遅延子回路。
In an ultrasonic solid state delay element circuit, an input resistor R1 is connected in series with the input terminal of the ultrasonic solid state delay element, and an inductance L2 is connected between the output terminal of the ultrasonic solid state delay element and ground. An ultrasonic solid state delay element circuit characterized in that a switching means is provided between an input terminal A and an output terminal B of the delay element to connect and disconnect an impedance element.
JP12652487U 1987-08-19 1987-08-19 Pending JPS6430927U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12652487U JPS6430927U (en) 1987-08-19 1987-08-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12652487U JPS6430927U (en) 1987-08-19 1987-08-19

Publications (1)

Publication Number Publication Date
JPS6430927U true JPS6430927U (en) 1989-02-27

Family

ID=31378124

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12652487U Pending JPS6430927U (en) 1987-08-19 1987-08-19

Country Status (1)

Country Link
JP (1) JPS6430927U (en)

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