JPH0286235U - - Google Patents
Info
- Publication number
- JPH0286235U JPH0286235U JP16543588U JP16543588U JPH0286235U JP H0286235 U JPH0286235 U JP H0286235U JP 16543588 U JP16543588 U JP 16543588U JP 16543588 U JP16543588 U JP 16543588U JP H0286235 U JPH0286235 U JP H0286235U
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- input terminal
- output
- output terminal
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Transmitters (AREA)
Description
第1図は本考案の一実施例の配線図、第2図は
第1図の等価回路図、第3図は従来例の配線図、
第4図は第3図の等価回路図である。
1,2,3,4……切換器、5,6……送信機
、7,8……負荷、C1,C2,C3,C4……
端子間分布容量。
Figure 1 is a wiring diagram of an embodiment of the present invention, Figure 2 is an equivalent circuit diagram of Figure 1, Figure 3 is a wiring diagram of a conventional example,
FIG. 4 is an equivalent circuit diagram of FIG. 3. 1, 2, 3, 4...Switcher, 5, 6...Transmitter, 7,8...Load, C1, C2, C3, C4...
Distributed capacitance between terminals.
Claims (1)
、第2の入力端子と、第2の送信機の両端にそれ
ぞれ接続される第3、第4の入力端子と、第1の
負荷の両端にそれぞれ接続される第1、第2の出
力端子と、第2の負荷の両端にそれぞれ接続され
る第3、第4の出力端子と、第1のモードにおい
て、前記第1の入力端子を前記第1の出力端子に
接続し、前記第2の入力端子を前記第2の出力端
子に接続し、前記第3の入力端子を前記第3の出
力端子に接続し、前記第4の入力端子を前記第4
の出力端子に接続し、第2のモードにおいて、前
記第1の入力端子を前記第4の出力端子に接続し
、前記第2の入力端子を前記第3の出力端子に接
続し、前記第3の入力端子を前記第1の出力端子
に接続し、前記第4の入力端子を前記第2の出力
端子に接続する切換器群とを具備することを特徴
とする平衡形給電線用切換回路。 a first transmitter connected to each end of the first transmitter;
, a second input terminal, third and fourth input terminals respectively connected to both ends of the second transmitter, and first and second output terminals respectively connected to both ends of the first load. , third and fourth output terminals respectively connected to both ends of the second load; in the first mode, the first input terminal is connected to the first output terminal; a terminal connected to the second output terminal, a third input terminal connected to the third output terminal, and a fourth input terminal connected to the fourth output terminal.
and in a second mode, the first input terminal is connected to the fourth output terminal, the second input terminal is connected to the third output terminal, and the third A switching circuit for a balanced power feed line, comprising a switching circuit for connecting an input terminal of the input terminal to the first output terminal and connecting the fourth input terminal to the second output terminal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16543588U JPH0286235U (en) | 1988-12-20 | 1988-12-20 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16543588U JPH0286235U (en) | 1988-12-20 | 1988-12-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0286235U true JPH0286235U (en) | 1990-07-09 |
Family
ID=31451919
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16543588U Pending JPH0286235U (en) | 1988-12-20 | 1988-12-20 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0286235U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004320244A (en) * | 2003-04-14 | 2004-11-11 | Hitachi Metals Ltd | Multiband high-frequency signal transceiver module |
-
1988
- 1988-12-20 JP JP16543588U patent/JPH0286235U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004320244A (en) * | 2003-04-14 | 2004-11-11 | Hitachi Metals Ltd | Multiband high-frequency signal transceiver module |