JPS6429188A - Timing pulse generating circuit - Google Patents

Timing pulse generating circuit

Info

Publication number
JPS6429188A
JPS6429188A JP62185079A JP18507987A JPS6429188A JP S6429188 A JPS6429188 A JP S6429188A JP 62185079 A JP62185079 A JP 62185079A JP 18507987 A JP18507987 A JP 18507987A JP S6429188 A JPS6429188 A JP S6429188A
Authority
JP
Japan
Prior art keywords
pulse
signal
synchronizing signal
compound
shift register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62185079A
Other languages
Japanese (ja)
Inventor
Hiroshi Kosugi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP62185079A priority Critical patent/JPS6429188A/en
Publication of JPS6429188A publication Critical patent/JPS6429188A/en
Pending legal-status Critical Current

Links

Landscapes

  • Synchronizing For Television (AREA)
  • Color Television Systems (AREA)
  • Processing Of Color Television Signals (AREA)

Abstract

PURPOSE:To reduce influence caused by temperature variation by providing a pulse forming circuit which detects the equalizing pulse of a compound synchronizing signal and the like and outputs a pulse signal having a prescribed width and a shift register to which the compound synchronizing signal is inputted as a clock signal and which delays the pulse signal from the pulse forming circuit in a prescribed time. CONSTITUTION:The pulse forming circuits 13 and 14 which detect the equalizing pulse of the compound synchronizing signal and the like and output the pulse signal having the prescribed width and a shift register 12 to which the compound synchronizing signal is inputted as the clock signal and which delays the pulse signal from the circuit 13 and 14 in the prescribed time are provided. That means, the pulse signal is outputted from the compound synchronizing signal by the first and the second pulse forming circuits 13 and 14 and the equalizing pulse of the compound synchronizing signal and the like is read as the clock signal within that pulse signal, and supplied to the shift register 12 of a next stage. Then a prescribed timing pulse wave form is obtained by delaying and reading the horizontal synchronizing pulse of the compound synchronizing signal and the like as the clock signal with the aid of the shift register 12. Thus the influence of time constant variation caused by the rise of the temperature can be prevented.
JP62185079A 1987-07-24 1987-07-24 Timing pulse generating circuit Pending JPS6429188A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62185079A JPS6429188A (en) 1987-07-24 1987-07-24 Timing pulse generating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62185079A JPS6429188A (en) 1987-07-24 1987-07-24 Timing pulse generating circuit

Publications (1)

Publication Number Publication Date
JPS6429188A true JPS6429188A (en) 1989-01-31

Family

ID=16164451

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62185079A Pending JPS6429188A (en) 1987-07-24 1987-07-24 Timing pulse generating circuit

Country Status (1)

Country Link
JP (1) JPS6429188A (en)

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