JPS6429116A - Output driver circuit - Google Patents

Output driver circuit

Info

Publication number
JPS6429116A
JPS6429116A JP62185051A JP18505187A JPS6429116A JP S6429116 A JPS6429116 A JP S6429116A JP 62185051 A JP62185051 A JP 62185051A JP 18505187 A JP18505187 A JP 18505187A JP S6429116 A JPS6429116 A JP S6429116A
Authority
JP
Japan
Prior art keywords
changes
output
channel mos
output driver
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62185051A
Other languages
Japanese (ja)
Inventor
Hideo Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62185051A priority Critical patent/JPS6429116A/en
Publication of JPS6429116A publication Critical patent/JPS6429116A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To obtain a logic circuit with less noise disturbance onto an analog circuit by providing a means not giving a through-current to a P-channel MOS transistor (TR) of an output driver and an N-channel MOS TR to a pre-stage of the output driver circuit and suppressing the peak current of charging/ discharging from the load capacitance. CONSTITUTION:When a level of an input terminal I changes from '1' to '0', the output of a NAND 3 changes from '0' to '1' and a P-channel MOS TR Pch1 changes from ON to OFF. Similarly, the P-channel TR Pch2 changes from ON to OFF after a prescribed time through delay inverters 5, 6 and a P-channel MOS TR Pch3 changes from ON to OFF after a prescribed time through delay inverters 7, 8. Then the output of the delay inverter 4 changes from '1' to '0' and the output of the NOR 1 changes from '0' to '1'. The N-channel TR Nch1 is turned on and a load capacitance CL is being discharged. Thus, the noise of the peak current due to the charge/discharge from the load capacitance is prevented.
JP62185051A 1987-07-24 1987-07-24 Output driver circuit Pending JPS6429116A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62185051A JPS6429116A (en) 1987-07-24 1987-07-24 Output driver circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62185051A JPS6429116A (en) 1987-07-24 1987-07-24 Output driver circuit

Publications (1)

Publication Number Publication Date
JPS6429116A true JPS6429116A (en) 1989-01-31

Family

ID=16163939

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62185051A Pending JPS6429116A (en) 1987-07-24 1987-07-24 Output driver circuit

Country Status (1)

Country Link
JP (1) JPS6429116A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0398098A2 (en) * 1989-05-19 1990-11-22 National Semiconductor Corporation Output buffer for reducing switching induced noise
JPH04123520A (en) * 1990-09-14 1992-04-23 Mitsubishi Electric Corp Output buffer circuit
JPH04165669A (en) * 1990-10-29 1992-06-11 Mitsubishi Denki Eng Kk Integrated cmos output circuit
JPH04229713A (en) * 1990-04-30 1992-08-19 Internatl Business Mach Corp <Ibm> Cmos circuit
WO1992017938A2 (en) * 1991-03-27 1992-10-15 Thinking Machines Corporation Differential driver/receiver circuit
JPH04292015A (en) * 1990-12-21 1992-10-16 Motorola Inc Circuit for controlling high-output switching-transistor
JPH08274616A (en) * 1995-03-30 1996-10-18 Nec Corp Output buffer circuit

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0398098A2 (en) * 1989-05-19 1990-11-22 National Semiconductor Corporation Output buffer for reducing switching induced noise
JPH04229713A (en) * 1990-04-30 1992-08-19 Internatl Business Mach Corp <Ibm> Cmos circuit
JPH04123520A (en) * 1990-09-14 1992-04-23 Mitsubishi Electric Corp Output buffer circuit
JPH04165669A (en) * 1990-10-29 1992-06-11 Mitsubishi Denki Eng Kk Integrated cmos output circuit
JPH04292015A (en) * 1990-12-21 1992-10-16 Motorola Inc Circuit for controlling high-output switching-transistor
WO1992017938A2 (en) * 1991-03-27 1992-10-15 Thinking Machines Corporation Differential driver/receiver circuit
AU654455B2 (en) * 1991-03-27 1994-11-03 Thinking Machines Corporation Differential driver/receiver circuit
JPH08274616A (en) * 1995-03-30 1996-10-18 Nec Corp Output buffer circuit

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