JPS6427998A - Ic card - Google Patents

Ic card

Info

Publication number
JPS6427998A
JPS6427998A JP62183393A JP18339387A JPS6427998A JP S6427998 A JPS6427998 A JP S6427998A JP 62183393 A JP62183393 A JP 62183393A JP 18339387 A JP18339387 A JP 18339387A JP S6427998 A JPS6427998 A JP S6427998A
Authority
JP
Japan
Prior art keywords
chip
base board
concave section
absorb
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62183393A
Other languages
Japanese (ja)
Inventor
Kenichi Takebe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Renesas Semiconductor Package and Test Solutions Co Ltd
Original Assignee
Hitachi Hokkai Semiconductor Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Hokkai Semiconductor Ltd, Hitachi Ltd filed Critical Hitachi Hokkai Semiconductor Ltd
Priority to JP62183393A priority Critical patent/JPS6427998A/en
Publication of JPS6427998A publication Critical patent/JPS6427998A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Credit Cards Or The Like (AREA)

Abstract

PURPOSE: To provide a low cost chip capable of being mounted directly on a base board by a method wherein a concave section to absorb the chip thickness is formed on an upper base board and a spot facing to absorb the boding wire height, on a lower base board, and both base boards are laminated by an adhesive seal. CONSTITUTION: A concave section 3 to absorb the thickness is formed on a chip mount position of an upper base board 1 comprising a printed circuit board made of glass epoxy resins and the like, and a wiring 4 is connected up to a contact terminal 7 via a conductor embedded in a throughhole 5 adjacent to a concave section 3. A spot facing 9 wider than the concave section 3 is formed on a position facing the concave section 3 of a lower base board 8 whose material quality is the same as that of the upper base board. The chip 2 is then sealed by an adhesive after having a wiring space for a wire bonding 10 wherein the spot facing electrically connects an electrode on the chip 2 to a wiring 5. Thereafter, the chip 2 is sealed by an adhesive seal agent by which both upper and lower base boards 1 and 8 are coupled.
JP62183393A 1987-07-24 1987-07-24 Ic card Pending JPS6427998A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62183393A JPS6427998A (en) 1987-07-24 1987-07-24 Ic card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62183393A JPS6427998A (en) 1987-07-24 1987-07-24 Ic card

Publications (1)

Publication Number Publication Date
JPS6427998A true JPS6427998A (en) 1989-01-30

Family

ID=16134991

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62183393A Pending JPS6427998A (en) 1987-07-24 1987-07-24 Ic card

Country Status (1)

Country Link
JP (1) JPS6427998A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7652359B2 (en) * 2002-12-27 2010-01-26 Semiconductor Energy Laboratory Co., Ltd. Article having display device
JP2011034398A (en) * 2009-08-03 2011-02-17 Toppan Printing Co Ltd Dual interface ic card

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7652359B2 (en) * 2002-12-27 2010-01-26 Semiconductor Energy Laboratory Co., Ltd. Article having display device
US7863116B2 (en) 2002-12-27 2011-01-04 Semiconductor Energy Laboratory Co., Ltd. IC card and booking-account system using the IC card
US8268702B2 (en) 2002-12-27 2012-09-18 Semiconductor Energy Laboratory Co., Ltd. IC card and booking-account system using the IC card
US8674493B2 (en) 2002-12-27 2014-03-18 Semiconductor Energy Laboratory Co., Ltd. IC card and booking-account system using the IC card
JP2011034398A (en) * 2009-08-03 2011-02-17 Toppan Printing Co Ltd Dual interface ic card

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