JPS6416004A - Signal generator - Google Patents

Signal generator

Info

Publication number
JPS6416004A
JPS6416004A JP16984987A JP16984987A JPS6416004A JP S6416004 A JPS6416004 A JP S6416004A JP 16984987 A JP16984987 A JP 16984987A JP 16984987 A JP16984987 A JP 16984987A JP S6416004 A JPS6416004 A JP S6416004A
Authority
JP
Japan
Prior art keywords
scf
clock
output
same
same phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16984987A
Other languages
Japanese (ja)
Inventor
Hisao Otake
Seiji Okamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP16984987A priority Critical patent/JPS6416004A/en
Publication of JPS6416004A publication Critical patent/JPS6416004A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the fluctuation in the output level of a sinusoidal wave signal by supplying an SCF clock of the same frequency and same phase as those of an input clock given to generate a reference pulse signal to a switched capacitor filter. CONSTITUTION:An output I of an operational amplifier 11 passes through a low-pass filter 52 comprising the switched capacitor filter (SCF) 12. An output Y from a 1/l frequency divider 3 is given to an SCF clock generating circuit 13 and the SCF clock J from the SCF clock generating circuit 13 is fed to the SCF 12. The SCF clock J and the output Y are outputted from one and same 1/l frequency divider 3 and the input clock to the signal generator reference pulse generator 50 and the SCF clock have the same frequency. Thus, the pulse width of waveforms V, W is an integral number of multiple of the SCF clock J and each voltage change point of the output I to the SCF 12 and the SCF clock J have the entirely same phase relation. Thus, the input clock to the SCF 12 and the SCF clock have always the same phase.
JP16984987A 1987-07-09 1987-07-09 Signal generator Pending JPS6416004A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16984987A JPS6416004A (en) 1987-07-09 1987-07-09 Signal generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16984987A JPS6416004A (en) 1987-07-09 1987-07-09 Signal generator

Publications (1)

Publication Number Publication Date
JPS6416004A true JPS6416004A (en) 1989-01-19

Family

ID=15894075

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16984987A Pending JPS6416004A (en) 1987-07-09 1987-07-09 Signal generator

Country Status (1)

Country Link
JP (1) JPS6416004A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100395059C (en) * 2001-12-18 2008-06-18 旭化成株式会社 Metal oxide dispersion

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100395059C (en) * 2001-12-18 2008-06-18 旭化成株式会社 Metal oxide dispersion

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