JPS6393142A - Semiconductor integrated circuit device - Google Patents
Semiconductor integrated circuit deviceInfo
- Publication number
- JPS6393142A JPS6393142A JP61238390A JP23839086A JPS6393142A JP S6393142 A JPS6393142 A JP S6393142A JP 61238390 A JP61238390 A JP 61238390A JP 23839086 A JP23839086 A JP 23839086A JP S6393142 A JPS6393142 A JP S6393142A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- semiconductor integrated
- circuits
- integrated circuit
- circuit device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 14
- 230000000694 effects Effects 0.000 abstract description 6
- 238000000034 method Methods 0.000 abstract description 2
- 230000002093 peripheral effect Effects 0.000 abstract description 2
- 239000000523 sample Substances 0.000 abstract description 2
- 239000004020 conductor Substances 0.000 abstract 2
- 238000010586 diagram Methods 0.000 description 4
- 238000005259 measurement Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000007664 blowing Methods 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
【発明の詳細な説明】
［発明の目的］
（産業上の利用分野）
この発明は、種々の回路を同一のチップ上に備えた半導
体集積回路装置に関するもので、特に、製品の開発時に
各々の回路に供給される電流の測定や回路毎に独立した
電源を供給する際に使用されるものである。[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a semiconductor integrated circuit device that includes various circuits on the same chip. It is used to measure the current supplied to a circuit and to supply independent power to each circuit.
（従来の技術）
一般に、半導体集積回路装置においては、第３図に示す
ように電１１！ （ＶＤ ｏ ） １１１と接地（Ｖｓ
ｓ）線１２との間に種々の独立した回路１３１〜１３ｎ
が配置されており、全ての回路１３１〜１３ｎは上記電
源Ｉ！１１と接地線１２を共用している。従って、この
半導体集積回路装置で消費される電流を測定する際には
、上記′！！源１ｉ１１が接続されるＶＤＤ端子（パッ
ド）１４と上記接地線１２が接続されるＶｓｓ端子１５
との間に電流計等の調定ｉ器を接続して行なっている。(Prior Art) Generally, in a semiconductor integrated circuit device, as shown in FIG. (VD o ) 111 and ground (Vs
s) Various independent circuits 131 to 13n between the line 12
are arranged, and all the circuits 131 to 13n are connected to the power supply I! 11 and the grounding wire 12 are shared. Therefore, when measuring the current consumed by this semiconductor integrated circuit device, the above ``! ! A VDD terminal (pad) 14 to which the source 1i11 is connected and a Vss terminal 15 to which the ground line 12 is connected.
This is done by connecting a regulator such as an ammeter between the
しかし、半導体集積回路装置の製品開発時には、個々の
回路で消費される電流を測定したり、回路相互間の彰ｎ
を検討したい場合がしばしばある。ところが、前述した
消費電流の測定方法では、個々の回路で測定される消費
電流はピーク電流波形や平均的な動作電流から予測する
しかない。また、瞬間的に大電流を消費する回路が存在
する場合には、この回路の影響で他の回路が誤動作する
という現象があるが、このような現象を確実に予測した
り評価したりすることができなかった。However, when developing products for semiconductor integrated circuit devices, it is necessary to measure the current consumed by individual circuits, and to measure the current consumption between circuits.
There are often times when you want to consider. However, in the method for measuring current consumption described above, the current consumption measured in each individual circuit can only be predicted from the peak current waveform or average operating current. Additionally, when there is a circuit that instantaneously consumes a large amount of current, other circuits may malfunction due to the influence of this circuit, but it is not possible to reliably predict or evaluate such phenomena. I couldn't do it.
（発明が解決しようとする問題点）
上述したように、従来の半導体集積回路装置では、個々
の回路毎の消費電流を測定することができず、回路相互
間の影響を調べることも困難であった。(Problems to be Solved by the Invention) As described above, in conventional semiconductor integrated circuit devices, it is not possible to measure the current consumption of each individual circuit, and it is difficult to investigate the influence between circuits. Ta.
従って、この発明は、上記の欠点を除去するためのもの
で、個々の回路毎の消費電流を測定できるとともに、回
路相互間の影響をも容易に調べることができる半導体集
積回路装置を提供することを目的としている。Therefore, the present invention aims to eliminate the above-mentioned drawbacks, and provides a semiconductor integrated circuit device in which the current consumption of each individual circuit can be measured and the influence between circuits can be easily investigated. It is an object.
［発明の構成］
（問題点を解決するための手段）
すなわち、この発明においては、上記の目的を達成する
ために、電源線と各回路間および接地線と各回路間の少
なくともいずれか一方にスイッチ手段を設けるとともに
、このスイッチ手段の両端にそれぞれ外部の測定様器を
接続するためのパッドを設けている。[Structure of the Invention] (Means for Solving the Problems) That is, in this invention, in order to achieve the above object, at least one of the wires is connected between the power supply line and each circuit and between the ground line and each circuit. A switch means is provided, and pads for connecting external measuring devices are provided at both ends of the switch means.
（作用）
上記のような構成において、回路の消費電流を測定する
際には、上記スイッチ手段を遮断状態に設定し、このス
イッチ手段の両端に設けたパッド間に測定機器、例えば
電流計を接続して消費電流を測定する。また、回路相互
間の影響を調べる際には、上記スイッチ手段を遮断状態
に設定することにより回路を電源線および接地線から切
り離し、上記スイッチ手段の回路側のパッドに電源を供
給してこの回路を作動せしめ、この回路単独での特性を
調べ回路相互間の影響について検討する。(Function) In the above configuration, when measuring the current consumption of the circuit, the switch means is set to the cut-off state, and a measuring device, such as an ammeter, is connected between the pads provided at both ends of the switch means. and measure the current consumption. In addition, when investigating the influence between circuits, the circuit is disconnected from the power supply line and the ground line by setting the switch means to the cutoff state, and power is supplied to the pad on the circuit side of the switch means to disconnect the circuit. We will operate the circuit, examine the characteristics of this circuit alone, and examine the effects between the circuits.
（実施例）
以下、この発明の一実施例について図面を参照して説明
する。第１図において、１６はパッド１７を介して電Ｉ
Ｖｏｏが供給される電源線で、この７！ｉ源線１６には
スイッチ１８１〜１８ｎの一端が接続される。これらス
イッチ１８１〜１８ｎの他端にはそれぞれ、各回路１９
１〜１９ｎの電源Ｖｏｏ入力端が接続される。また、上
記スイッチ１８１〜１８ｎの両端にはそれぞれ、外部端
子となるパッド２０１〜２０ｎおよび２１１〜２１ｎが
接続される。一方、パッド２２から電源Ｖｓｓが供給さ
れる接地線２３にはスイッチ２４１〜２４ｎの一端が接
続され、このスイッチ２４１〜２４ｎの他端には各回路
１９１〜１９ｎのＮ源Ｖ８９入力端が接続される。そし
て、上記スイッチ２４１〜２４ｎの両端にはそれぞれ、
外部端子となるパッド２５１〜２５ｎおよび２６１〜２
６ｎが接続されて成る。(Example) Hereinafter, an example of the present invention will be described with reference to the drawings. In FIG. 1, 16 is an electrically connected
In the power line where Voo is supplied, this 7! One ends of switches 181 to 18n are connected to the i source line 16. Each circuit 19 is connected to the other end of these switches 181 to 18n.
The power supply Voo input terminals of 1 to 19n are connected. Further, pads 201-20n and 211-21n, which serve as external terminals, are connected to both ends of the switches 181-18n, respectively. On the other hand, one end of the switches 241 to 24n is connected to the ground line 23 to which the power supply Vss is supplied from the pad 22, and the input terminal of the N source V89 of each circuit 191 to 19n is connected to the other end of the switch 241 to 24n. Ru. And, at both ends of the switches 241 to 24n, respectively,
Pads 251 to 25n and 261 to 2 that serve as external terminals
6n are connected.
上記のような構成において、例えば回路１９１の消費電
流を単独で測定したい場合には、スイッチ１８１を遮断
状態とし、パッド２０１ 、２１１間にプローブ等を介
して電流計２７（あるいはオシロスコープ等の測定機器
）を接続して消費電流（平均した動作電流）を測定する
。同様にして、スイッチ２４１を遮断状態に設定してパ
ッド２５４ 、２５．間に測定機器を接続して測定を行
なっても良い。In the above configuration, if you want to measure the current consumption of the circuit 191 alone, for example, turn off the switch 181 and connect the ammeter 27 (or a measuring device such as an oscilloscope) between the pads 201 and 211 via a probe or the like. ) and measure the current consumption (average operating current). Similarly, the switch 241 is set to the cutoff state and the pads 254, 25. Measurement may be performed by connecting a measuring device between them.
また、例えば回路１９１による他の回路１９２〜１９ｎ
への影響を調べる際には、スイッチ１８１を遮断状態に
設定し、外部から電源２８を供給すればこの回路１９１
を単独で動作させることができ、この時の電流（例えば
ピーク電流）を電流計２９で測定すれば周辺の回路１９
２〜１９ｎに与える影響を調べることができる。この際
、スイッチ２４１を遮断状態に設定し、パッド２５１に
Ｖｓｓと異なる電位を与えることもできる。Further, for example, other circuits 192 to 19n by the circuit 191
When investigating the effect on the circuit 191, set the switch 181 to the cut-off state and supply the power supply 28 from the outside.
can be operated independently, and if the current (for example, peak current) at this time is measured with an ammeter 29, the peripheral circuit 19 can be operated independently.
2 to 19n can be investigated. At this time, it is also possible to set the switch 241 to a cutoff state and apply a potential different from Vss to the pad 251.
第２図（ａ）、（ｂ）は、上記第１図におけるスイッチ
１８１〜１８ｎおよび２４１〜２４ｎの溝成例を示して
いる。（ａ）図はＭｏＳトランジスタを用いてスイッチ
を構成する場合を示しており、電源ＶＯＯ側のスイッチ
１８１〜１８ｎとしてＧ２ Ｐチャネル型ＭｏＳトラン
ジスタ２７を、電源ＶｓＳ側のスイッチ２４！〜２４ｎ
にはＮチャネル型〜１０Ｓトランジスタ２８をそれぞれ
使用しており、これらのＭｏＳトランジスタ２７．２８
を外部から導通制御するために、そのゲート電極をパッ
ド２９．３０に接続している。FIGS. 2(a) and 2(b) show examples of the groove formation of the switches 181 to 18n and 241 to 24n in FIG. 1 above. The figure (a) shows a case where switches are configured using MoS transistors, in which G2 P-channel type MoS transistors 27 are used as switches 181 to 18n on the power supply VOO side, and switches 24! on the power supply VsS side are used. ~24n
N-channel type to 10S transistors 28 are used respectively, and these MoS transistors 27.28
In order to externally control conduction, its gate electrode is connected to pads 29 and 30.
一方、（１））図はヒユーズ（例えばポリシリコンヒユ
ーズ） ３１．３２を用いて各スイッチ１８１〜１８ｎ
および２４１〜２４ｎを構成したものである。この場合
には、ヒユーズ３１．３２を例えばレーザ光線等で選択
的に溶断することによりスイッチとして使用する。On the other hand, (1)) shows each switch 181 to 18n using a fuse (for example, a polysilicon fuse) 31.32.
and 241 to 24n. In this case, the fuses 31 and 32 are used as switches by selectively blowing them out using, for example, a laser beam.
このような構成によれば、スイッチ１８１〜１８ｎおよ
び２４１〜２４ｎによる選択的なスイッチング制御によ
り個々の回路毎の消費電流を測定できるとともに、回路
相互間の影響をも容易に調べることができる。According to such a configuration, the current consumption of each individual circuit can be measured by selective switching control by the switches 181 to 18n and 241 to 24n, and the influence between circuits can be easily investigated.
なお、上記実施例ではスイッチおよびパッドを各回路の
電源Ｖｏｏ側とＶｓｓｌｌｌｌの両方に設けたが、測定
の条件に応じていずれか一方のみに設けても良い。また
、全ての回路に対してスイッチとパッドを設けたが、必
要に応じて測定したい回路にのみ設けても良いのはもち
ろんである。In the above embodiments, switches and pads were provided on both the power source Voo side and Vssllll of each circuit, but they may be provided on only one side depending on the measurement conditions. Further, although switches and pads are provided for all circuits, it is of course possible to provide them only for the circuits to be measured if necessary.
［発明の効果］
以上説明したようにこの発明によれば、個々の回路毎の
消費電流を測定できるとともに、回路相互間の影響をも
容易に調べることができる半導体集積回路装置が得られ
る。[Effects of the Invention] As described above, according to the present invention, it is possible to obtain a semiconductor integrated circuit device in which the current consumption of each individual circuit can be measured and the influence between circuits can be easily investigated.
第１図はこの発明の一実施例に係わる半導体集積回路装
置を示す回路図、第２図は上記第１図の回路におけるス
イッチ回路の揖成例を示す図、第３図は従来の半導体集
積回路装置を示す回路図である。
１６・・・電源線、２３・・・接地線、１９１〜１９ｎ
・・・回路、１８１〜１８ｎ 、 ２４１〜２４ｎ・・
・スイッチ、２０１〜２０ｎ。
２１１〜２Ｉｎ、２５１〜２５ｎ、２６１〜２６ｎ・・
・パッド。FIG. 1 is a circuit diagram showing a semiconductor integrated circuit device according to an embodiment of the present invention, FIG. 2 is a diagram showing an example of a switch circuit in the circuit shown in FIG. 1, and FIG. 3 is a circuit diagram showing a conventional semiconductor integrated circuit device. FIG. 2 is a circuit diagram showing a circuit device. 16...Power line, 23...Grounding line, 191~19n
...Circuit, 181-18n, 241-24n...
- Switch, 201-20n. 211~2In, 251~25n, 261~26n...
·pad.
Claims (3)
路を同一チップ上に備える半導体集積回路装置において
、電源線と各回路間および接地線と各回路間の少なくと
もいずれか一方に設けられるスイッチ手段と、このスイ
ッチ手段の両端にそれぞれ接続される外部との接続用パ
ッドとを具備することを特徴とする半導体集積回路装置
。(1) In a semiconductor integrated circuit device that includes multiple circuits connected in parallel between a power supply line and a ground line on the same chip, at least one of the circuits between the power supply line and each circuit and between the ground line and each circuit What is claimed is: 1. A semiconductor integrated circuit device comprising: a switch means; and external connection pads connected to both ends of the switch means.
り、外部からの制御信号でオン／オフ制御されることを
特徴とする特許請求の範囲第１項記載の半導体集積回路
装置。(2) The semiconductor integrated circuit device according to claim 1, wherein the switch means is composed of a MOS transistor and is controlled on/off by an external control signal.
に溶断されることを特徴とする特許請求の範囲第１項記
載の半導体集積回路装置。(3) The semiconductor integrated circuit device according to claim 1, wherein the switch means is comprised of a fuse and is selectively blown.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61238390A JPS6393142A (en) | 1986-10-07 | 1986-10-07 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61238390A JPS6393142A (en) | 1986-10-07 | 1986-10-07 | Semiconductor integrated circuit device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6393142A true JPS6393142A (en) | 1988-04-23 |
Family
ID=17029483
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61238390A Pending JPS6393142A (en) | 1986-10-07 | 1986-10-07 | Semiconductor integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6393142A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6246073B1 (en) | 1998-06-19 | 2001-06-12 | Sharp Kabushiki Kaisha | Semiconductor device and method for producing the same |
| JP2010165809A (en) * | 2009-01-15 | 2010-07-29 | Fujitsu Ltd | Semiconductor device and test method |
| US7812628B2 (en) | 2006-12-13 | 2010-10-12 | Renesas Electronics Corporation | Method of on-chip current measurement and semiconductor IC |
-
1986
- 1986-10-07 JP JP61238390A patent/JPS6393142A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6246073B1 (en) | 1998-06-19 | 2001-06-12 | Sharp Kabushiki Kaisha | Semiconductor device and method for producing the same |
| US7812628B2 (en) | 2006-12-13 | 2010-10-12 | Renesas Electronics Corporation | Method of on-chip current measurement and semiconductor IC |
| US8030956B2 (en) | 2006-12-13 | 2011-10-04 | Renesas Electronics Corporation | Method of on-chip current measurement and semiconductor IC |
| JP2010165809A (en) * | 2009-01-15 | 2010-07-29 | Fujitsu Ltd | Semiconductor device and test method |
| US8575952B2 (en) | 2009-01-15 | 2013-11-05 | Fujitsu Limited | Semiconductor device and test method |
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