JPS6390076A - Code error correcting system - Google Patents

Code error correcting system

Info

Publication number
JPS6390076A
JPS6390076A JP23496186A JP23496186A JPS6390076A JP S6390076 A JPS6390076 A JP S6390076A JP 23496186 A JP23496186 A JP 23496186A JP 23496186 A JP23496186 A JP 23496186A JP S6390076 A JPS6390076 A JP S6390076A
Authority
JP
Japan
Prior art keywords
code error
error correction
rotation
drum
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23496186A
Other languages
Japanese (ja)
Inventor
Shoji Ueno
昭治 植野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP23496186A priority Critical patent/JPS6390076A/en
Priority to US07/091,085 priority patent/US4839755A/en
Priority to DE8787307900T priority patent/DE3766323D1/en
Priority to EP87307900A priority patent/EP0259195B1/en
Priority to DE198787307900T priority patent/DE259195T1/en
Priority to US07/168,700 priority patent/US5008764A/en
Publication of JPS6390076A publication Critical patent/JPS6390076A/en
Pending legal-status Critical Current

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  • Digital Magnetic Recording (AREA)
  • Error Detection And Correction (AREA)

Abstract

PURPOSE:To improve code error correcting capacity by correcting the code error of reproduced data written in a memory at 1st rotation of a drum even in 2nd rotation in case of low speed reproduction. CONSTITUTION:A drum rotation controlling drum servo pulse inputted to a terminal 20 is divided into 1/2 by a 1/2 frequency divider 21. A frequency-divided pulse rise detecting signal based upon a rise detector 22 and a servo pulse rise detecting signal based upon an AND circuit 23 and a rise detector 24 at the time of 'H' of a frequency divided pulse are processed by an OR circuit 25 and outputted as two error correction start signals every rotation of the drum. The start signal is outputted through an AND gate 26 to which a signal to be turned to 'H' in a slow reproducing mode is impressed. Thereby, a reproduced signal is recorded and its error is corrected at the 1st rotation, and at the 2nd rotation error correction is executed even in the slow reproducing mode whose signal reproduction and error correction are not executed in the 1st rotation, so that the code error correcting capacity can be improved.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は符号エラー訂正方式に係り、回転ヘッド型ディ
ジタルオーディオチーブレコーダの符号エラー訂正方式
に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a code error correction system, and more particularly to a code error correction system for a rotating head type digital audio chip recorder.

従来の技術 従来より、回転ヘッドを用いてディジタルオーディオ信
号を磁気テープに記録し、かつ再生するディジタルオー
ディオテープレコーダ(以下「R−DATJと略す)が
開発されている。
BACKGROUND ART Conventionally, digital audio tape recorders (hereinafter abbreviated as "R-DATJ") have been developed that use a rotary head to record and reproduce digital audio signals on a magnetic tape.

R−DATは第3図に示す如き構成であり、モータ10
で回転せしめられるドラム11の回転角度180度位置
に取り付けられたヘッド12.ヘッド13より、上記ド
ラム11に巻付角度90’で巻付けられて磁気テープ(
図示せず〉から信号を再生する。システムコントローラ
14よりの第4図(A>に示すドラム回転制御用の繰り
返し周波数略33f−1zのドラムサーボ信号の1周期
でドラム11が1回転せしめられるとき、通常再生時に
はヘッド12より第4図(B)に示す再生信号Ia、I
bが得られ、ヘッド13より再生信号IIa、[bが得
られる。
R-DAT has a configuration as shown in FIG.
The head 12 is attached at a rotational angle of 180 degrees of the drum 11, which is rotated at a rotation angle of 180 degrees. The head 13 wraps the magnetic tape (
(not shown). When the drum 11 is rotated once in one cycle of the drum servo signal with a repetition frequency of approximately 33f-1z for drum rotation control shown in FIG. 4 (A>) from the system controller 14, the head 12 in FIG. Reproduction signals Ia and I shown in (B)
b is obtained, and reproduced signals IIa and [b are obtained from the head 13.

上記の再生信号はメモリ15に書き込まれる。The above reproduction signal is written into the memory 15.

システムコントローラ14はドラムサーボ信号の立上が
り、立下がり夫々から一定時間遅延した第4図(C)に
示す訂正開始信号を訂正回路16に供給し、訂正回路1
6は第4図(D)に示す如き訂正期間1ia〜I[[d
夫々でメモリ15より再生信号Ia、IIa、Ib、I
Ib夫々を読み出して符号エラー訂正を行なう。
The system controller 14 supplies the correction circuit 16 with a correction start signal shown in FIG.
6 is a correction period 1ia to I [[d
Reproduction signals Ia, IIa, Ib, I from the memory 15, respectively.
Each Ib is read out and code error correction is performed.

発明が解決しようとする問題点 ところで、R−DATではテープ走行速度を1/2とし
て低速再生を行なうことができる。この低速再生時には
ドラム11の2回転について第4図(B)の再生信号I
a、IIaがメモリ15に書き込まれ、再生信号Ib、
IIbは再生されない。
Problems to be Solved by the Invention Incidentally, with R-DAT, low-speed playback can be performed by setting the tape running speed to 1/2. During this low-speed reproduction, the reproduction signal I shown in FIG. 4(B) for two revolutions of the drum 11
a, IIa are written into the memory 15, and the reproduced signals Ib,
IIb is not played.

また訂正期間11[aで符号エラー訂正された再生信号
■aは訂正期間[[Cで再度符号エラー訂正され、同様
に訂正期間mbで符号エラー訂正された再生信号■aは
訂正期間Idで再度符号エラー訂正される。
In addition, the reproduced signal ■a whose code error was corrected in the correction period 11 [a is corrected again in the correction period [C, and the reproduced signal ■a whose code error was corrected again in the correction period mb is again Code errors are corrected.

これは低速再生時にはヘッド12.13と磁気テープと
の相対速度が低下してCN比が悪く、再生信号の1ラー
レートが悪化し、また符号エラー訂正を繰り返すことに
より符号エラー訂正能力が向上するからである。
This is because during low-speed playback, the relative speed between the head 12, 13 and the magnetic tape decreases, resulting in a poor CN ratio and a worsening of the 1-ra rate of the reproduced signal.Also, repeating code error correction improves the code error correction ability. It is.

しかるに従来は訂正期間1[[bとllc 、 l[c
と1[[dとの間に空白期間が存在し、この空白期間が
利用されていないという問題点があった。
However, conventionally, the correction period 1[[b and llc, l[c
There was a problem that there was a blank period between 1[[d and this blank period was not used.

本発明は上記の点に鑑みてなされたものであり、低速再
生時の符号エラー訂正能力を更に向上する符号エラー訂
正方式を提供することを目的とする。
The present invention has been made in view of the above points, and it is an object of the present invention to provide a code error correction method that further improves the code error correction capability during low-speed reproduction.

問題点を解決するための手段 本発明においては、ドラムの2回転のうち初めの1回転
で一対のヘッド夫々で再生された各1トラック分の再生
信号をメモリに記憶する低速再生時で、初めの1回転に
おける第1の訂正期間に符号エラー訂正を行なった後、
ドラムの2回転のうち後の1回転における一方のヘッド
の再生開始より一方のヘッドの再生開始の所定時間後ま
での第2の訂正期間及び第1の訂正期間夫々で繰り返し
符号エラー訂正を行なう。
Means for Solving the Problems In the present invention, during low-speed playback in which the playback signals for each one track played by each of a pair of heads during the first one of the two revolutions of the drum are stored in memory, After performing code error correction during the first correction period in one revolution of
Code error correction is repeatedly performed during each of the second correction period and the first correction period from the start of reproduction of one head to a predetermined time after the start of reproduction of the other head during the last one revolution of the two rotations of the drum.

作用 本発明方式においては、メモリに記憶された再生信号は
、2回又は3回符号エラー訂正を行なわれる。
Operation In the system of the present invention, the reproduced signal stored in the memory is subjected to code error correction two or three times.

実施例 第1図は本発明方式に適用される訂正開始信号生成回路
の一実施例の回路構成図を示す。この訂正開始信号生成
回路は第3図示のシステムコントローラ14内に設(〕
られている。
Embodiment FIG. 1 shows a circuit configuration diagram of an embodiment of a correction start signal generation circuit applied to the method of the present invention. This correction start signal generation circuit is installed in the system controller 14 shown in FIG.
It is being

第1図において、端子20には第2図(A)に示すドラ
ム回転制御用の繰り返し周波数路331−1zのドラム
サーボ信号が供給される。このドラムサーボ信号は1/
2分周器21で分周されて第2図(B)に示す信号とさ
れ、立上がり検出器22及びアンド回路23に供給され
る。アンド回路23には端子20よりドラムサーボ信号
が供給されており、第2図(B)の信号のハイレベル期
間のド一  4 − ラムサーボ信号がアンド回路23より取り出されて立上
がり検出器24に供給される。
In FIG. 1, a drum servo signal of a repetitive frequency path 331-1z for drum rotation control shown in FIG. 2(A) is supplied to the terminal 20. This drum servo signal is 1/
The signal is frequency-divided by a 2 frequency divider 21 to produce a signal shown in FIG. The drum servo signal is supplied to the AND circuit 23 from the terminal 20, and the drum servo signal during the high level period of the signal shown in FIG. be done.

立上がり検出器22.24夫々は入来する信号の立上が
りを検出して第2図(C)、(D)夫々に示す検出パル
スを生成してオア回路25に供給する。オア回路25の
出力パルスはアンド回路26に供給される。アンド回路
26には端子27より通常再生モードでローレベル、低
速再生モードでハイレベルの制御信号が供給されており
、アンド回路26は低速再生モード時にのみオア回路2
5の出力パルスを取り出してオア回路28に供給する。
The rise detectors 22 and 24 each detect the rise of the incoming signal, generate detection pulses shown in FIGS. 2(C) and 2(D), and supply them to the OR circuit 25. The output pulse of the OR circuit 25 is supplied to an AND circuit 26. The AND circuit 26 is supplied with a control signal from a terminal 27 that is low level in the normal playback mode and high level in the low speed playback mode, and the AND circuit 26 is supplied to the OR circuit 2 only in the low speed playback mode.
5 output pulses are taken out and supplied to the OR circuit 28.

エツジ検出器29は端子20より供給されるドラムサー
ボ信号の立上がり及び立下がりのエツジを検出する。そ
の検出パルスは遅延回路30で略1、a9msec遅延
されて第2図(E)に示す如きパルスとされてオア回路
28に供給され、ここで訂正開始信号が生成されて端子
31より第3図示の訂正回路16に供給される。
The edge detector 29 detects the rising and falling edges of the drum servo signal supplied from the terminal 20. The detection pulse is delayed by approximately 1, a9 msec in the delay circuit 30 and is supplied to the OR circuit 28 as a pulse as shown in FIG. is supplied to the correction circuit 16.

ここで、第2図(F)に示す如く再生信号Ia。Here, as shown in FIG. 2(F), the reproduced signal Ia.

11a、Ib、IIbが全てメモリ15に書ぎ込まれる
通常再生モードでは端子27の制御信号がローレベルで
あるので訂正開始信号は第2図(E)に示す波形となり
、第2図(G)に示す如く第1の訂正期間11a 〜I
[[dで再生信号Ia、[a、より。
In the normal reproduction mode in which all data 11a, Ib, and IIb are written into the memory 15, the control signal at the terminal 27 is at low level, so the correction start signal has the waveform shown in FIG. 2(E), and the waveform shown in FIG. 2(G). As shown in the first correction period 11a to I
[[d reproduced signal Ia, [a, from.

mb夫々の符号エラー訂正が行なわれる。Code error correction for each mb is performed.

また、再生信号Ia、IIaのみがメモリ15に書き込
まれる低速再生モードでは、訂正開始信号は第2図(1
」)に示す波形となり、第2図(1)に示すドラムの初
めの1回転における第1の訂正期間ma 、IVbで再
生信号工a、■aの1回目の訂正が行なわれ、ドラムの
後の1回転における第2の訂正期間IVa 、 rVb
で再生信号Ia、IIaの一部分の2回目の符号エラー
訂正が行なわれ、ドラムの後の1回転における第1の訂
正期間■c。
In addition, in the low-speed playback mode in which only the playback signals Ia and IIa are written to the memory 15, the correction start signal is
''), the first correction period ma in the first rotation of the drum shown in Fig. 2 (1), the first correction of the reproduction signal a, ■a is performed at IVb, and after the drum The second correction period IVa, rVb in one revolution of
A second code error correction of a portion of the reproduced signals Ia, IIa is performed at a first correction period ■c in one subsequent revolution of the drum.

1[1dで再生信号工a 、flaの3回目の符号エラ
ー訂正が行なわれる。
At 1[1d, the third code error correction of the reproduced signal processing a and fla is performed.

このように、従来利用されていなかった空白期間を訂正
期間■a 、 ■bとして符号エラー訂正を行なうため
、低速再生時の符号エラー訂正能力が更に向上し、再生
される音声の品質が向上する。
In this way, since code error correction is performed using blank periods that were not used in the past as correction periods ■a and ■b, the code error correction ability during low-speed playback is further improved, and the quality of the reproduced audio is improved. .

なお、訂正期間■a 、 ■bのうちいずれか一方だけ
で符号エラー訂正を行なうだけでも良く、上記実施例に
限定されない。
Note that the code error correction may be performed only during either one of the correction periods ■a and ■b, and the present invention is not limited to the above embodiment.

発明の効果 上述の如く、本発明方式によれば低速再生時に、メモリ
に記憶された再生信号は2回又は3回繰り返し符号エラ
ー訂正を行なわれ、符号エラー訂正能力が向上し、再生
される音声の品質が向上する等の特長を有している。
Effects of the Invention As described above, according to the method of the present invention, during low-speed playback, the reproduced signal stored in the memory is repeatedly subjected to code error correction two or three times, improving the code error correction ability and improving the quality of the reproduced audio. It has features such as improved quality.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明方式に適用される訂正開始信号生成回路
の一実施例の回路構成図、第2図は第1図示の回路の動
作説明用タイムチャート、第3図はR−DATの符号エ
ラー訂正装置の一実施例のブロック系統図、第4図は従
来方式の動作説明用タイムチャートである。 11・・・ドラム、12.13・・・ヘッド、14・・
・システムコントローラ、15・・・メモリ、16・・
・訂正回路、21・・・1/2分周器、22.24・・
・立上が一/− り検出器、23.26・・・アンド回路、25.28・
・・オア回路、29・・・エツジ検出器、30・・・遅
延回路。
FIG. 1 is a circuit configuration diagram of an embodiment of a correction start signal generating circuit applied to the method of the present invention, FIG. 2 is a time chart for explaining the operation of the circuit shown in FIG. 1, and FIG. 3 is a code of R-DAT. FIG. 4, which is a block system diagram of one embodiment of the error correction device, is a time chart for explaining the operation of the conventional system. 11...Drum, 12.13...Head, 14...
・System controller, 15...Memory, 16...
・Correction circuit, 21...1/2 frequency divider, 22.24...
・Startup is 1/- Detector, 23.26...AND circuit, 25.28・
...OR circuit, 29...edge detector, 30...delay circuit.

Claims (1)

【特許請求の範囲】[Claims] ドラムに取付けられた一対のヘッド夫々で再生された各
1トラック分の再生信号をメモリに記憶し、一方のヘッ
ドの再生開始の所定時間後より他方のヘッドの再生開始
までの第1の訂正期間に該メモリより再生信号を読み出
して符号エラー訂正を行なう回転ヘッド型ディジタルオ
ーディオテープレコーダの符号エラー訂正方法において
、該ドラムの2回転のうち初めの1回転で該一対のヘッ
ド夫々で再生された各1トラック分の再生信号を該メモ
リに記憶する低速再生時で、該初めの1回転における第
1の訂正期間に符号エラー訂正を行なった後、該ドラム
の2回転のうち後の1回転における該一方のヘッドの再
生開始より該一方のヘッドの再生開始の所定時間後まで
の第2の訂正期間及び該第1の訂正期間夫々で繰り返し
符号エラー訂正を行なうことを特徴とする符号エラー訂
正方式。
The playback signal for one track played by each of a pair of heads attached to the drum is stored in a memory, and a first correction period starts from a predetermined time after the start of playback of one head until the start of playback of the other head. In a code error correction method for a rotary head type digital audio tape recorder in which code error correction is performed by reading a reproduced signal from the memory, each of the signals reproduced by each of the pair of heads is During low-speed playback in which one track's worth of playback signals is stored in the memory, after code error correction is performed during the first correction period of the first rotation, the code error correction is performed during the next one of the two rotations of the drum. A code error correction method characterized in that code error correction is repeatedly performed in each of the second correction period and the first correction period from the start of reproduction of one head to a predetermined time after the start of reproduction of the one head.
JP23496186A 1986-09-05 1986-10-02 Code error correcting system Pending JPS6390076A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP23496186A JPS6390076A (en) 1986-10-02 1986-10-02 Code error correcting system
US07/091,085 US4839755A (en) 1986-09-05 1987-08-31 Rotary head type digital signal reproducing apparatus with different modes and tracking control
DE8787307900T DE3766323D1 (en) 1986-09-05 1987-09-07 PLAYBACK WITH ROTATING HEAD FOR DIGITAL SIGNALS.
EP87307900A EP0259195B1 (en) 1986-09-05 1987-09-07 Rotary head type digital signal reproducing apparatus
DE198787307900T DE259195T1 (en) 1986-09-05 1987-09-07 PLAYBACK WITH ROTATING HEAD FOR DIGITAL SIGNALS.
US07/168,700 US5008764A (en) 1986-09-05 1988-03-16 Rotary head type digital signal reproducing apparatus with slow tape speed mode and improved tracking control

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23496186A JPS6390076A (en) 1986-10-02 1986-10-02 Code error correcting system

Publications (1)

Publication Number Publication Date
JPS6390076A true JPS6390076A (en) 1988-04-20

Family

ID=16978968

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23496186A Pending JPS6390076A (en) 1986-09-05 1986-10-02 Code error correcting system

Country Status (1)

Country Link
JP (1) JPS6390076A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0438768A (en) * 1990-06-01 1992-02-07 Matsushita Electric Ind Co Ltd Digital magnetic recording and reproducing device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0438768A (en) * 1990-06-01 1992-02-07 Matsushita Electric Ind Co Ltd Digital magnetic recording and reproducing device

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