JPS6380529A - Semiconductor printing apparatus - Google Patents
Semiconductor printing apparatusInfo
- Publication number
- JPS6380529A JPS6380529A JP61223660A JP22366086A JPS6380529A JP S6380529 A JPS6380529 A JP S6380529A JP 61223660 A JP61223660 A JP 61223660A JP 22366086 A JP22366086 A JP 22366086A JP S6380529 A JPS6380529 A JP S6380529A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- stage
- positioning
- accuracy
- alignment mark
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 13
- 230000008602 contraction Effects 0.000 claims description 5
- 235000012431 wafers Nutrition 0.000 abstract description 23
- 238000005259 measurement Methods 0.000 abstract description 6
- 238000000034 method Methods 0.000 abstract description 5
- 239000002699 waste material Substances 0.000 abstract description 2
- 230000009466 transformation Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 230000006870 function Effects 0.000 description 3
- 239000003795 chemical substances by application Substances 0.000 description 2
- 238000005286 illumination Methods 0.000 description 2
- 241000257465 Echinoidea Species 0.000 description 1
- 101150064138 MAP1 gene Proteins 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000004575 stone Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/70605—Workpiece metrology
- G03F7/70616—Monitoring the printed patterns
- G03F7/70633—Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70691—Handling of masks or workpieces
- G03F7/70716—Stages
- G03F7/70725—Stages control
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
本発明は集積回路の製造に使用する半導体焼付装置に係
るもので、特にそれのＸＹステージの位置決めに係るも
のである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a semiconductor printing apparatus used in the manufacture of integrated circuits, and particularly to positioning of an XY stage thereof.
［従来の技術］
従来の半導体焼付装置はウェハ上の焼付はパターンによ
ってＸＹステージの位置決め配列精度を計測する手段を
有さないため、焼付けられたウェハを毎回別の配列精度
計測専用の機器に移しかえ、位置決め配列精度の計測を
行う必要があった。このため無駄な時間を費やし、また
実際に焼付けられる環境と計測が行われる環境が異なる
ため、測定データに環境の差異に起因する誤差が生じ、
結果的にステージの位置決め目標位置を十分に精度良く
補正することができなかった。[Prior Art] Conventional semiconductor printing equipment does not have a means to measure the positioning and alignment accuracy of the XY stage based on the pattern when printing on a wafer. Instead, it was necessary to measure the positioning array accuracy. This wastes time, and since the actual printing environment and the measurement environment are different, errors may occur in the measurement data due to environmental differences.
As a result, the target position of the stage could not be corrected with sufficient accuracy.
［発明が解決しようとする問題点コ
本発明の目的は上述の従来の半導体焼付装置の欠点を除
去し、短時間に精度良＜ＸＹステージの位置決め配列精
度を計測し、さらにその測定データからＸＹステージの
位置決め目標位置の補正を行うことにより、配列精度の
向上を図ることにある。[Problems to be Solved by the Invention] The purpose of the present invention is to eliminate the above-mentioned drawbacks of the conventional semiconductor printing apparatus, to measure the positioning and arrangement accuracy of the XY stage with high accuracy in a short time, and to The purpose is to improve the arrangement accuracy by correcting the stage positioning target position.
［問題点を解決するための手段］
上記の目的を達成するため本発明に従って半導体焼付装
置は、ＸＹステージの位置決め配列精度をウェハ上の焼
付はパターンを用いて計測する手段を有し、さらにその
測定データに基づいてＸＹステージの位置決め目標位置
を補正する手段を有している。[Means for Solving the Problems] In order to achieve the above object, the semiconductor printing apparatus according to the present invention has means for measuring the positioning and arrangement accuracy of the XY stage using a printing pattern on a wafer, and It has means for correcting the positioning target position of the XY stage based on the measurement data.
［実施例］ 以下、図面を用いて本発明の詳細な説明する。[Example] Hereinafter, the present invention will be explained in detail using the drawings.
第１図は、本発明のＸＹステージの配列精度の測定機能
およびその補正機能を有する半導体焼付装置の概略構成
図である。同図において、ＷＦはウェハ、ＸＹＳはウェ
ハＷＦをＸ、Ｙ方向へ移動させるＸＹステージ、ＸＭ、
ＹＭはＸＹステージＸＭＳをそれぞれＸ方向、Ｙ方向に
駆動する駆動モータ、ＷＳはウェハＷＦをθ方向に回転
させるθステージである。また、ＲＴはレチクル、ＬＮ
は焼付投影レンズ、Ｒ３はレチクルＲＴをＸ。FIG. 1 is a schematic diagram of a semiconductor printing apparatus according to the present invention having a function of measuring arrangement accuracy of an XY stage and a function of correcting the same. In the figure, WF is a wafer, XYS is an XY stage that moves the wafer WF in the X and Y directions,
YM is a drive motor that drives the XY stage XMS in the X and Y directions, respectively, and WS is a θ stage that rotates the wafer WF in the θ direction. Also, RT is a reticle, LN
is the printed projection lens, and R3 is the reticle RT.
Ｙ、θ方向に移動させるレチクルステージ、ＬＩは焼付
用照明装置、ＭＲ，ＭＬはミラー、ＤＲ。A reticle stage is moved in the Y and θ directions, LI is a printing illumination device, MR and ML are mirrors, and DR.
ＤＬは光電ディテクタ、ＣＢはｃｐｕ （中央演算装置
）やメモリ等からなる制御回路を備えたコントロールボ
ックス、ＣＲは露光装置本体に指令を与えるコンソール
のモニタ受像機（コンソールＣＲＴ）であり、ＰＲはプ
リンタである。DL is a photoelectric detector, CB is a control box equipped with a control circuit consisting of a CPU (central processing unit) and memory, etc., CR is a console monitor receiver (console CRT) that gives commands to the exposure equipment body, and PR is a printer. It is.
次に第１，２図を参照してＸＹステージＸＭＳの位置決
め配列精度を測定する方法を説明する。Next, a method for measuring the positioning arrangement accuracy of the XY stage XMS will be explained with reference to FIGS. 1 and 2.
ウェハＷＦの第１層においてウェハＷＦにはレチクルマ
ークの回路パターンとともに、第２層以降のアライメン
ト用のアライメントマークが焼付けられる。この工程が
終ったウニへの中から基準ウェハを選び、このウェハを
ＸＹステージＸＭＳの上に載置してステップアンドリピ
ートを行う。In the first layer of the wafer WF, an alignment mark for alignment of the second and subsequent layers is printed on the wafer WF along with a circuit pattern of a reticle mark. A reference wafer is selected from among the wafers that have undergone this process, and this wafer is placed on the XY stage XMS to perform step-and-repeat.
このとき前記アライメントマークをミラーＭ Ｒ。At this time, the alignment mark is mirrored MR.
ＭＬおよび光電ディテクタＤＲ，ＤＬを用いて測定する
ことにより、ウェハＷＦ上の焼付は配列パターンが算出
される。第２図はアライメントマークの１例を示してい
る。第２図でＲＭはレチクル上のアライメントマーク、
ＷＭはウェハ上のアライメントマークであり、また矢印
はレーザビームのスキャン方向を表している。さらに図
中の１゜〜ｆ１４．ｕ、’〜１４′は計測されたレチク
ルマークＲＭとウェハマークＷＭの間の距離を示してお
り、これらを用いて左側のアライメントマークの横方向
のズレ量
左側のアライメントマークの縦方向のズレ量右側のアラ
イメントマークの横方向のズレ量右側のアライメントマ
ークの縦方向のズレ量（石°ン
４が夫々求められる。結局レチクルマークＲ
ＭとウェハマークＷＭのズレ量、すなわち基準の格子か
らのＸＹステージの位置決め誤差は
より求められる。By measuring using ML and photoelectric detectors DR and DL, an array pattern of printing on the wafer WF is calculated. FIG. 2 shows an example of an alignment mark. In Figure 2, RM is the alignment mark on the reticle.
WM is an alignment mark on the wafer, and the arrow represents the scanning direction of the laser beam. Furthermore, 1° to f14 in the figure. u, '~14' indicate the measured distance between the reticle mark RM and the wafer mark WM, and using these, the amount of horizontal deviation of the left alignment mark, the amount of vertical deviation of the left alignment mark Amount of horizontal misalignment of the right alignment mark Amount of vertical misalignment of the right alignment mark (stone
4 are required respectively. After all, reticle mark R
The amount of deviation between M and the wafer mark WM, that is, the positioning error of the XY stage from the reference grid, can be determined more easily.
第３図は測定された配列パターンの１例である。図中の
“Ｘ”は測定されたＸＹステージの停止位置を示してお
り、また直線で結ばれた格子は理想的な焼付は配列パタ
ーンである。この焼付は配列パターン図、およびこの図
から算出されるＸＹステージの心動距離の伸縮率、移動
方向の直交度は、コンソールＣＲまたはプリンタＰＲよ
り出力される。またこれら伸縮率、直交度を用いて、次
のウニへの第１層焼付けでのＸＹステージＸＭＳの目標
位置の補正が行われる。FIG. 3 is an example of a measured array pattern. "X" in the figure indicates the measured stop position of the XY stage, and the grid connected by straight lines is an ideal printing array pattern. This printing is outputted from the console CR or the printer PR as the array pattern diagram, the expansion/contraction ratio of the heart movement distance of the XY stage, and the degree of orthogonality in the movement direction calculated from this diagram. Also, using these expansion/contraction ratios and orthogonality, the target position of the XY stage XMS in the next first layer printing on the sea urchin is corrected.
次に第４，５図を用いてＸＹステージの位置決め目標位
置の補正法を説明する。第４図のマ１は第１番目の目標
位置の位置ベクトルであり又１＋Δ７１はウェハ上の焼
付パターンを観測することによって得られた第ｉ番目の
ショット中心の位置ベクトルである。Next, a method of correcting the target position of the XY stage will be explained using FIGS. 4 and 5. Ma1 in FIG. 4 is the position vector of the first target position, and 1+Δ71 is the position vector of the i-th shot center obtained by observing the printing pattern on the wafer.
いま第５図に示す回転変換 （ｘ、ｙ） ＝（ｘ’ 、
ｙ’）およびスケール変換（ｘ’、ｙ’） ＝ （ｘ
″、ｙ″）を用いて各位置決め目標位置ｘｌ（ｉ＝１〜
ｎ、ｎは全ショツト数）を変換し、可能な限り理想的な
格子点マ１＋Δｘ、（ｉ＝１〜ｎ）に近ずけるようにし
て次回の焼付けでのズレ量の絶対和
Σ？ １ΔＸ＋ ｌを最小にすることを考える。第ｉ
番目の位置決め目標位置Ｍ ＋ ＝ （Ｘ＋、 ｙｔ）
は第４図に示す回転変換 （ｘ、ｙ） −（ｘ”、ｙ’
）によってと変換され、またスケール変換（ｘ’、ｙ’
） −（ｘ″、ｙ″）を行うことによって結局、となる
。但しく２）式においてλ８．λアはスケール変換の伸
縮率
を表す。The rotational transformation (x, y) = (x',
y') and scale transformation (x', y') = (x
″, y″) to determine each positioning target position xl (i=1~
n, where n is the total number of shots) is converted to get as close as possible to the ideal lattice point map 1+Δx, (i=1 to n), and the absolute sum Σ? of the amount of deviation in the next printing is calculated. Consider minimizing 1ΔX+l. i-th
th positioning target position M + = (X+, yt)
is the rotational transformation (x, y) − (x'', y' shown in Figure 4)
) and scale transformation (x', y'
) −(x″, y″), we end up with: However, in equation 2), λ8. λa represents the expansion/contraction rate of scale conversion.
座標軸ｘ、ｙとｘ’ 、ｙ’のなす角θ８．θ。Angle θ8 between the coordinate axes x, y and x', y'. θ.
および伸縮率λ８、λアが
δ８ミｓｉｎθ、 ＜ １ （４）δ、
＝ ｓｉｎθ、（１
λ８′＝ λ、−１，１λ８′ｌ ＜ １ （５
）λ、′ミ λ、−ｔ＜ｔ、ｌλ、’ ｌ ＜ １を満
足するという仮定を設けると、（２）式は以下のように
近似される。and expansion/contraction rate λ8, λa is δ8misinθ, < 1 (4) δ,
= sinθ, (1 λ8'= λ, -1, 1λ8'l < 1 (5
)λ,′mi λ,−t<t, lλ,′ l<1, then equation (2) can be approximated as follows.
（６）式で決定される点（Ｘ＋″ 、 ｙＩ″）から
点（ｘ、＋ΔＸ＋ ＋：／＋＋Δｙ＋）までの距離の絶
対和が最小になるには、
但し、
Ｌ＝Σ（（λｘ’ ｘｌ＋δｙｙｌ−Δｘ 、 ） ２
＋ （−δｘＸｌ＋λｙ’ｙ１−Δｙ＋）’）
（８）を満足するようなえ８
′、λッ′、δ８．δ、をとればよい。結局４元連立−
次方程式
の解λ８′、λ、′、δ８．δ、を（６）式に適用する
ことにより、補正されたＸＹステージの位置決め目標（
Ｘ＋″＋ｙｔ″）が算出される。In order to minimize the absolute sum of the distances from the point (X+'', yI'') to the point (x, +ΔX+ +:/++Δy+) determined by equation (6), however, L=Σ((λx' xl+δyyl−Δx , ) 2
+ (-δxXl+λy'y1-Δy+)')
8 that satisfies (8)
', λ', δ8. Just take δ. In the end, it was a four-yuan coalition.
Solution of the following equation λ8′, λ,′, δ8. By applying δ, to equation (6), the corrected XY stage positioning target (
X+″+yt″) is calculated.
位置決め配列精度の測定データをコンソールに表示した
りプリンターから出力する以外に、複数の半導体焼付は
装置を管理するホストコンビュータに転送することによ
り、ＸＹステージの位置決め精度がどの程度であるかを
常に集中管理することができる。In addition to displaying the measurement data of the positioning array accuracy on the console or outputting it from the printer, multiple semiconductor prints can be transferred to the host computer that manages the equipment, making it possible to constantly monitor the positioning accuracy of the XY stage. can be managed.
［発明の効果］
以上説明したように、半導体露光装置のＸＹステージの
位置決め配列精度を測定し、その測定結果を用いて位置
決め目標位置を補正する機能を付加することにより、第
１層における配列精度が向上するので、第２層以降のオ
ートアライメントの実行速度が向上し、スルーブツトが
向上する。またさらにグローバルアライメントの精度も
向上する。[Effects of the Invention] As explained above, by adding the function of measuring the positioning arrangement accuracy of the XY stage of the semiconductor exposure apparatus and correcting the positioning target position using the measurement results, the arrangement accuracy in the first layer can be improved. Since this improves the execution speed of auto-alignment for the second and subsequent layers, the throughput improves. Furthermore, the precision of global alignment is further improved.
第１図は、本発明の半導体焼付装置の略図である。
第２図はアライメントマークを示す。
第３図は測定された配列パターンを示す。
第４図はｉ番目の目標位置の位置ベクトルとｉ番面のシ
ョット中心の位置ベクトルを示す。
第５図は回転変換とスケール変換を示す。
図中：
ＷＦ：ウェハ、
ＸＭＳ ： ＸＹステージ、
ＸＭ ： ＹＭ ：駆動モータ、
ＷＳ：θステージ、
ＲＴニレチクル、
ＲＳニレチクルステージ、
ＬＩ：焼付用照明装置、
ＭＲ、ＭＬ ：ミラー、
ＤＲ；ＤＬ：光電ディテクタ、
ＣＢ・コントロールボックス、
ＣＲ：コンソール、
ＰＲ：プリンタ。
特許出願人 キャノン株式会社
代理人 弁理士 伊 東 辰 雄
代理人 弁理士 伊 東 哲 小
弟１図
少
、ゲー ≧Ａ
コ
第３図
第５図FIG. 1 is a schematic diagram of a semiconductor printing apparatus of the present invention. FIG. 2 shows alignment marks. FIG. 3 shows the measured alignment pattern. FIG. 4 shows the position vector of the i-th target position and the position vector of the shot center of the i-th plane. FIG. 5 shows rotation transformation and scale transformation. In the figure: WF: wafer, XMS: XY stage, XM: YM: drive motor, WS: θ stage, RT doubleticle, RS doubleticle stage, LI: printing illumination device, MR, ML: mirror, DR; DL: photoelectric Detector, CB/Control Box, CR: Console, PR: Printer. Patent Applicant Canon Co., Ltd. Agent Patent Attorney Tatsuo Ito Agent Patent Attorney Tetsu Ito
Figure 3 Figure 5
Claims (1)
をウェハ上の焼付けパターンを用いて計測する手段を備
えることを特徴とする半導体焼付け装置。 ２、ウェハを載置するＸＹステージの位置決め配列精度
をウェハ上の焼付けパターンを用いて計測する手段と、
計測された配列精度をグラフィック表示するコンソール
または計測された配列精度を出力するプリンタとを備え
ていることを特徴とする半導体焼付け装置。 ３、ウェハを載置するＸＹステージの位置決め配列精度
をウェハ上の焼付けパターンを用いて計測する手段と、
計測された配列精度から直交度および伸縮率を求め、そ
れを用いてＸＹステージの位置決め目標位置を補正する
手段とを備えていることを特徴とする半導体焼付け装置
。[Scope of Claims] 1. A semiconductor printing apparatus characterized by comprising means for measuring the positioning and arrangement accuracy of an XY stage on which a wafer is placed using a printing pattern on the wafer. 2. means for measuring the positioning and arrangement accuracy of the XY stage on which the wafer is placed using a printed pattern on the wafer;
A semiconductor printing apparatus characterized by comprising a console for graphically displaying measured alignment accuracy or a printer for outputting measured alignment accuracy. 3. means for measuring the positioning and arrangement accuracy of the XY stage on which the wafer is placed using a printed pattern on the wafer;
What is claimed is: 1. A semiconductor printing apparatus comprising means for determining orthogonality and expansion/contraction ratio from the measured alignment accuracy and using them to correct a target position for positioning an XY stage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61223660A JPS6380529A (en) | 1986-09-24 | 1986-09-24 | Semiconductor printing apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61223660A JPS6380529A (en) | 1986-09-24 | 1986-09-24 | Semiconductor printing apparatus |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6380529A true JPS6380529A (en) | 1988-04-11 |
Family
ID=16801653
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61223660A Pending JPS6380529A (en) | 1986-09-24 | 1986-09-24 | Semiconductor printing apparatus |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6380529A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0628988A1 (en) * | 1993-04-30 | 1994-12-14 | Tokyo Seimitsu Co.,Ltd. | Semiconductor manufacturing system with self-diagnosing function and self-diagnosing method thereof |
| US5663780A (en) * | 1992-05-25 | 1997-09-02 | Murai Co., Ltd. | Spectacles with decorative lens attaching device |
| EP0883030A2 (en) * | 1991-04-02 | 1998-12-09 | Nikon Corporation | Lithography information control system |
| US5993043A (en) * | 1996-11-29 | 1999-11-30 | Nec Corporation | Lithography processing apparatus for manufacturing semiconductor devices |
| JP2001210698A (en) * | 1999-11-22 | 2001-08-03 | Lam Res Corp | Method of and apparatus for determining substrate offset using optimization technique |
-
1986
- 1986-09-24 JP JP61223660A patent/JPS6380529A/en active Pending
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0883030A2 (en) * | 1991-04-02 | 1998-12-09 | Nikon Corporation | Lithography information control system |
| EP0883030A3 (en) * | 1991-04-02 | 1998-12-16 | Nikon Corporation | Lithography information control system |
| EP1262834A1 (en) * | 1991-04-02 | 2002-12-04 | Nikon Corporation | Lithography information control system |
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