JPS6364388A - Method of mounting circuit components - Google Patents
Method of mounting circuit componentsInfo
- Publication number
- JPS6364388A JPS6364388A JP20829286A JP20829286A JPS6364388A JP S6364388 A JPS6364388 A JP S6364388A JP 20829286 A JP20829286 A JP 20829286A JP 20829286 A JP20829286 A JP 20829286A JP S6364388 A JPS6364388 A JP S6364388A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- circuit
- circuit components
- dual
- connect
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims description 4
- 230000009977 dual effect Effects 0.000 claims description 14
- 229910000679 solder Inorganic materials 0.000 description 6
- 239000003990 capacitor Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Combinations Of Printed Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、デュアルインラインＩＣを使用したラジオ、
テレビ、パーソナルコンピューター等の電子機器回路に
使用する回路部品の実裏方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a radio using a dual in-line IC;
This paper relates to the actual method of manufacturing circuit components used in electronic device circuits such as televisions and personal computers.
従来の技術
従来の回路部品の実装方１去について第２図を参照しな
がら説明する。第２図に示すように回路基端子１０４を
挿通させ、この端子１０４を回路基板１０１に半田１０
５により接続する。コンデンサ、抵抗等のリード付回路
部品１０６はそのリード１０７を回路基板１０１の孔１
０８に挿通さぜ、このリード１０７を回路基板１０１に
半田１０５により接続し、リードレスのコンデンサ、抵
抗等の回路部品１０９はその電極１１０を回路基板１０
１に半田１０５により接続する。2. Description of the Related Art A conventional method for mounting circuit components will be described with reference to FIG. As shown in FIG.
Connect by 5. Leaded circuit components 106 such as capacitors and resistors connect their leads 107 to holes 1 of the circuit board 101.
08, and connect this lead 107 to the circuit board 101 with solder 105, and connect the electrode 110 of leadless circuit components 109 such as capacitors and resistors to the circuit board 101.
1 by solder 105.
発明が解決しようとする問題点
しかしながら、上記従来例においては、回路部品１０６
、１０９のリード１０７、電極１１０（！：デュアル
インラインＩＣ１０３の端子１０４との間の接続が多く
なると回路基板１０１の面積も増えるという問題点があ
った。Problems to be Solved by the Invention However, in the above conventional example, the circuit component 106
, 109 leads 107 and electrodes 110 (!:) There is a problem in that as the number of connections between the terminals 104 of the dual in-line IC 103 increases, the area of the circuit board 101 also increases.
そこで、本発明は、上記従来ヅ１の問題点を解決するも
ので、平面上で占める回路基板の面積を増やすことなく
、多くの回路部品のリード、電極サデュアルインライン
ＩＣの端子との間の接続を宵うことかでき、電子機器回
路を小型ｒヒすることがで去るようにした回路部品の＄
其方ｊ去を提供１．ようとするものである。Therefore, the present invention solves the above-mentioned problem of the prior art (1), and it is possible to connect the leads and electrodes of many circuit components to the terminals of the dual in-line IC without increasing the area occupied by the circuit board on a plane. $ of circuit components that can be connected overnight and can be removed by miniaturizing electronic equipment circuits.
Providing the other side 1. This is what we are trying to do.
問題点を解決するだめの手段
そして上記問題点を解決するだめの本発明の技術的な手
段は、デュアルインラインＩＣの端子をサブ回路基板に
接続し、このサブ回路基板に回路部品を接続し、上記デ
ュアルインラインＩＣの端子を他の回路部品と電気的に
接続するための母体となる主回路基板に接続するもので
ある。Means for solving the problems and technical means of the present invention for solving the above problems are to connect the terminals of the dual in-line IC to a sub-circuit board, connect circuit components to the sub-circuit board, The terminals of the dual in-line IC are connected to a main circuit board that serves as a base for electrically connecting other circuit components.
作 用 上記技術的手段による作用は次のようになる。For production The effects of the above technical means are as follows.
すなわち、デュアルインラインＩＣと、回路基板との間
に組込んだサブ回路基板によりデュアルインラインＩＣ
の端子と回路部品の接続の一部分を分担させるので、平
面上で占める回路基板面積を小さくすることができる。In other words, the dual in-line IC and the sub-circuit board installed between the dual in-line IC
Since a part of the connection between the terminal and the circuit component is shared, the area occupied by the circuit board on a plane can be reduced.
実施例
以下、本発明の一実施例について図面を参照しながら説
明する。第１図に示すように小規模なサブ回路基板１の
孔２にデュアルインラインＩＣ３の端子４を挿通させ、
この端子・１をサブ回路基板１に半Ｅ］５により接続す
る。このサブ回路基板１上にリードレスのチップタイプ
の回路部品６の電極７を半田５により接続する。このよ
うに回路部品６を実装した後、デュアルインラインＩＣ
３の端子４を他の回路部品と電気的に接続するだめの母
体となる主回路基板８に形成した孔９に挿通し、半田５
により接続する。その他の回路部品の中、リード付回路
部品１０はそのリード１１を主回路基板８の孔１２に挿
通させ、このリード１１を主回路基板８に半田５により
接続する。リードレスのチップタイプの回路部品１２は
その電極１３を主回路基板８に半田５により接続し、実
装を完了する。EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings. As shown in FIG. 1, the terminals 4 of the dual in-line IC 3 are inserted into the holes 2 of the small-scale sub-circuit board 1,
This terminal 1 is connected to the sub-circuit board 1 by a half E]5. Electrodes 7 of a leadless chip type circuit component 6 are connected to this sub-circuit board 1 by solder 5. After mounting the circuit component 6 in this way, the dual inline IC
Insert the terminal 4 of No. 3 into the hole 9 formed in the main circuit board 8, which serves as a base for electrically connecting other circuit components, and apply the solder 5.
Connect by. Among other circuit components, the lead-equipped circuit component 10 has its leads 11 inserted into holes 12 of the main circuit board 8, and the leads 11 are connected to the main circuit board 8 by solder 5. The electrodes 13 of the leadless chip type circuit component 12 are connected to the main circuit board 8 by solder 5, and the mounting is completed.
このように回路部品６ 、１０ 、１２ とデュアルイ
ンラインＩＣ３の端子４との間の配線を主回路基板８と
サブ回路基板１上に分散することができるので、平面上
で占める回路基板面積を小さくして回路部品を高密度で
実装することができる。In this way, the wiring between the circuit components 6 , 10 , 12 and the terminal 4 of the dual in-line IC 3 can be distributed over the main circuit board 8 and the sub-circuit board 1, so the area occupied by the circuit board on a plane can be reduced. circuit components can be mounted with high density.
発明の効果
上記のように本発明によれば、プーアル・インラインＩ
Ｃの端子をサブ回路基板に接続し、このサブ回路基板に
回路部品を接続し、上記デュアルインラインＩＣの端子
を他の回路部品と電気的に接続するための母体となる主
回路基板に接続するようにしている。従って平面上で占
める回路基板面積を小さくすることができ、電子機器回
路を小型化することができる。才たデュアルインライン
ＩＣにサブ回路基板を接続した状態で部品として扱うこ
とができ、生産性を向上させることができる。Effects of the Invention As described above, according to the present invention, the Puer Inline I
Connect the terminals of C to a sub-circuit board, connect circuit components to this sub-circuit board, and connect the terminals of the dual in-line IC to the main circuit board, which serves as a base for electrically connecting other circuit components. That's what I do. Therefore, the area occupied by the circuit board on a plane can be reduced, and the electronic device circuit can be miniaturized. The sub-circuit board connected to the dual in-line IC can be treated as a component, improving productivity.
第１図は本発明の一実施例における回路部品の実装方法
を示す説明図、第２図は従来の回路部品の実装方法を示
す説明図である。
１・・・サブ回路基板、３・・・デュアルインラインＩ
Ｃ，４・・・端子、６・・・回路部品、８・・・主回路
基板、１０ 、１２・・・回路部品。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名第１
図
Ｍ２図FIG. 1 is an explanatory diagram showing a circuit component mounting method according to an embodiment of the present invention, and FIG. 2 is an explanatory diagram showing a conventional circuit component mounting method. 1...Sub circuit board, 3...Dual inline I
C, 4...terminal, 6...circuit component, 8...main circuit board, 10, 12...circuit component. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure M2
Claims (1)
、このサブ回路基板に回路部品を接続し、上記デュアル
インラインＩＣの端子を他の回路部品と電気的に接続す
るための母体となる主回路基板に接続することを特徴と
する回路部品の実装方法。Connect the terminals of the dual in-line IC to a sub-circuit board, connect circuit components to this sub-circuit board, and connect the terminals of the dual-in-line IC to the main circuit board, which serves as a base for electrically connecting the terminals to other circuit components. A method for mounting circuit components characterized by connecting them.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20829286A JPS6364388A (en) | 1986-09-04 | 1986-09-04 | Method of mounting circuit components |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20829286A JPS6364388A (en) | 1986-09-04 | 1986-09-04 | Method of mounting circuit components |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6364388A true JPS6364388A (en) | 1988-03-22 |
Family
ID=16553838
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20829286A Pending JPS6364388A (en) | 1986-09-04 | 1986-09-04 | Method of mounting circuit components |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6364388A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01162271U (en) * | 1988-05-06 | 1989-11-10 |
-
1986
- 1986-09-04 JP JP20829286A patent/JPS6364388A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01162271U (en) * | 1988-05-06 | 1989-11-10 |
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