JPS6364291A - Thin film electroluminescence device - Google Patents
Thin film electroluminescence deviceInfo
- Publication number
- JPS6364291A JPS6364291A JP61207945A JP20794586A JPS6364291A JP S6364291 A JPS6364291 A JP S6364291A JP 61207945 A JP61207945 A JP 61207945A JP 20794586 A JP20794586 A JP 20794586A JP S6364291 A JPS6364291 A JP S6364291A
- Authority
- JP
- Japan
- Prior art keywords
- insulating layer
- thin film
- transparent electrode
- film
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 title claims description 18
- 238000005401 electroluminescence Methods 0.000 title description 17
- 239000010408 film Substances 0.000 claims description 19
- 239000000758 substrate Substances 0.000 claims description 16
- 230000005684 electric field Effects 0.000 description 9
- 230000000694 effects Effects 0.000 description 7
- 239000011521 glass Substances 0.000 description 7
- 229920002120 photoresistant polymer Polymers 0.000 description 6
- 239000005083 Zinc sulfide Substances 0.000 description 5
- 229910052984 zinc sulfide Inorganic materials 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 239000011572 manganese Substances 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 238000009125 cardiac resynchronization therapy Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 229910004205 SiNX Inorganic materials 0.000 description 2
- 239000012190 activator Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 239000005388 borosilicate glass Substances 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 229910052681 coesite Inorganic materials 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- QDOXWKRWXJOMAK-UHFFFAOYSA-N dichromium trioxide Chemical compound O=[Cr]O[Cr]=O QDOXWKRWXJOMAK-UHFFFAOYSA-N 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- 229910003437 indium oxide Inorganic materials 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000004020 luminiscence type Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- -1 rare earth compound Chemical class 0.000 description 2
- 229910052761 rare earth metal Inorganic materials 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- 238000007738 vacuum evaporation Methods 0.000 description 2
- PWHULOQIROXLJO-UHFFFAOYSA-N Manganese Chemical compound [Mn] PWHULOQIROXLJO-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 229910052748 manganese Inorganic materials 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- SIWVEOZUMHYXCS-UHFFFAOYSA-N oxo(oxoyttriooxy)yttrium Chemical compound O=[Y]O[Y]=O SIWVEOZUMHYXCS-UHFFFAOYSA-N 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- DRDVZXDWVBGGMH-UHFFFAOYSA-N zinc;sulfide Chemical compound [S-2].[Zn+2] DRDVZXDWVBGGMH-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Electroluminescent Light Sources (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は交流電界の印加によりエレクトロルミネセンス
（Ｅ Ｌ）を呈する薄膜エレクトロルミネセンス素子（
以下薄膜ＥＬ素子と称する）に関するものである７
〔従来の技術〕
近年、大容量ディスプレイとして、ブラウン管（以下Ｃ
ＲＴと称する）が広く用いられているが、ＣＲＴは真空
管であるため、大重量で破損の危険性もあり、また奥行
き寸法が大きい、偏向走査歪が避けにくく、さらには数
ＫＶ以上の高電圧を必要とするなどの問題があった。Detailed Description of the Invention [Industrial Application Field] The present invention relates to a thin film electroluminescent device (EL) that exhibits electroluminescence (EL) upon application of an alternating current electric field.
[Prior art] In recent years, cathode ray tubes (hereinafter referred to as thin-film EL elements) have been used as large-capacity displays.
(referred to as RT) is widely used, but since CRT is a vacuum tube, it is heavy and has the risk of breakage, has a large depth, is difficult to avoid deflection scanning distortion, and has high voltage of several KV or more. There were problems such as the need for
一方、平面形のディスプレイとしては、プラズマディス
プレイパネル（以下ＦＤＰと称する）の開発が進められ
ているが、ＦＤＰはＣＲＴに比較して薄形であり、動作
電圧も低く、マトリックス形であるため走査歪がないと
いう利点があるが、ガス放電管であり、また真空管の一
種であるために重量が大きく、破損の危険性は避けられ
ない。On the other hand, as a flat display, plasma display panels (hereinafter referred to as FDPs) are being developed, but FDPs are thinner than CRTs, have lower operating voltages, and are matrix-type, so they cannot be scanned. Although it has the advantage of not being distorted, since it is a gas discharge tube and a type of vacuum tube, it is heavy and the risk of breakage is unavoidable.
また、液晶ディスプレイディバイス（以下ＬＣＤと称す
る）は、固体素子に近く、動作電圧も数Ｖないし十数Ｖ
と低いが、応答速度が小さい、動作可能温度範囲が狭く
、さらには受光形デバイスのため表示面が暗いといった
問題を抱えている。In addition, liquid crystal display devices (hereinafter referred to as LCDs) are similar to solid-state devices, and their operating voltages range from several volts to more than ten volts.
However, it has problems such as a low response speed, a narrow operating temperature range, and a dark display surface because it is a light-receiving device.
これに対してＥＬを呈する薄膜ＥＬ索子を用いた薄膜Ｅ
Ｌパネルは、ＣＲＴと比較して駆動電圧が低く、またＦ
Ｄ Ｐに比較して重量、大きさ等において優れ、ＬＣ
Ｄに比較して動作可能温度範囲が広い等、多くの利点を
有しており、文字、グラフィック表示に対して最適であ
る。On the other hand, thin film E using thin film EL cords exhibiting EL
The L panel has a lower driving voltage than a CRT, and
Superior in weight, size, etc. compared to DP, LC
It has many advantages over D, such as a wider operating temperature range, and is optimal for character and graphic displays.
この薄膜ＥＬ素子は、例えば硫化亜鉛（ＺｎＳ）を母体
とし、これに付活剤としてマンガン（Ｍ ｎ ）や希土
類化合物等を添加した発光層の両側あるいは片側に酸化
イツトリウム（ＹｚＯａ）や窒化シリコン（ＳｉＮｘ）
等の絶縁層を設け、対向電極でサンドインチ状に挟持し
た構成が輝度、寿命等の点で優れている。This thin-film EL device uses, for example, zinc sulfide (ZnS) as a base material and a light emitting layer to which manganese (M n ) or a rare earth compound is added as an activator, and yttrium oxide (YzOa) or silicon nitride ( SiNx)
A structure in which an insulating layer such as the like is provided and sandwiched between opposing electrodes in a sandwich-like manner is superior in terms of brightness, lifespan, etc.
第２図は発光層を絶縁層で挟持させた二重絶縁層構造の
薄膜ＥＬ素子の一例を示す要部断面図である。同図にお
いて、１はガラス基板、２は酸化インジウム（Ｉ ｎｚ
ｏ ３）あるいはインジウムと錫との酸化物（ＩＴＯ）
等からなる透明電極、３はＹ２Ｏ３，５ｘＮｘ等からな
る第１の絶縁層、４はＭｎあるいは希土類化合物等を添
加したＺｎＳ発光層、５は第２の絶縁層、６はアルミニ
ウム（Ａ２）笠からなる背面゛電極、７は交流電源であ
る。FIG. 2 is a sectional view of a main part showing an example of a thin film EL element having a double insulating layer structure in which a light emitting layer is sandwiched between insulating layers. In the figure, 1 is a glass substrate, 2 is indium oxide (Inz
o 3) Or indium and tin oxide (ITO)
3 is a first insulating layer made of Y2O3, 5xNx, etc., 4 is a ZnS light emitting layer doped with Mn or a rare earth compound, etc., 5 is a second insulating layer, 6 is an aluminum (A2) cap. The backside electrode 7 is an AC power source.
このような構成による簿）模ＥＬ索子は、透明゛１七極
２と背面電極６との間に交流電源７により交流電界を印
加すると、約１０６Ｖ／■程度の高電界により高輝度に
発光する。このように高輝度を得るためには、極めて高
い電界を必要とするため、第１、第２の絶縁層３，５は
極めて高い絶縁耐圧をもつことが不可欠である。When an AC electric field is applied from an AC power source 7 between the transparent plate 1, heptadode 2 and the back electrode 6, the model EL cable with such a configuration emits light with high brightness due to the high electric field of approximately 106 V/■. do. In order to obtain such high brightness, an extremely high electric field is required, so it is essential that the first and second insulating layers 3 and 5 have an extremely high dielectric strength voltage.
なお、絶縁層全体の絶縁性を向上させる方法としては、
絶縁層成膜後、真空中、４００〜６００℃で熱処理する
方法が特公昭５９−１００３３号公報において詳記され
ている。In addition, as a method to improve the insulation properties of the entire insulation layer,
Japanese Patent Publication No. 59-10033 describes in detail a method of heat-treating in vacuum at 400 to 600° C. after forming an insulating layer.
しかしながら、このように構成される薄膜ＥＬ素子は、
同図から明らかなようにガラス基板１上に形成する透明
電極２．第１の絶縁層３．ＺｎＳ発光Ｗ４．第２の絶縁
層５および背面電極６を真空蒸着あるいはスパッタリン
グ法等で成膜し、透明電極２および背面電極６について
は所望のパターンをエツチング法ある゛いはマスク成膜
法によす得た場合、パターンエツジ部に段差を生じる。However, the thin film EL element configured in this way is
As is clear from the figure, the transparent electrode 2 formed on the glass substrate 1. First insulating layer 3. ZnS luminescence W4. The second insulating layer 5 and back electrode 6 were formed by vacuum evaporation or sputtering, and the transparent electrode 2 and back electrode 6 were formed into desired patterns by etching or mask deposition. In this case, a step is created at the pattern edge.
特に透明電極２のパターンエツジ部ではこの上に積層し
た第１の絶縁層３２発光層４および第２の絶縁層５にも
段差が生じ、局部的に膜厚が小さくなる。また、この第
２の絶縁層５上に背面電極６を形成し、透明電極２と背
面？ａ極６との間に高′社界を印加すると、透明電極２
のパターンエツジ部に電界集中が生じ、絶縁破壊の起点
となる可能性があり、また高輝度を得るために著しく悪
影響を与え、信頼性を著しく低下させていることが判明
した。In particular, at the pattern edge portion of the transparent electrode 2, a step is formed in the first insulating layer 32, light emitting layer 4, and second insulating layer 5 laminated thereon, and the film thickness is locally reduced. Further, a back electrode 6 is formed on this second insulating layer 5, and the transparent electrode 2 and the back electrode 6 are formed on the second insulating layer 5. When a high voltage is applied between the a-pole 6 and the transparent electrode 2
It has been found that electric field concentration occurs at the edge of the pattern, which may become a starting point for dielectric breakdown, and has a significant negative effect on obtaining high brightness, significantly reducing reliability.
したがって、本発明の目的は、高電界印加時に絶縁性基
板上に形成した電極パターンのエツジ部に生じる電界集
中を抑止し、品質および信頼性を向上させた薄膜ＥＬ素
子を提供することにある。Accordingly, an object of the present invention is to provide a thin film EL device that suppresses electric field concentration occurring at the edge portion of an electrode pattern formed on an insulating substrate when a high electric field is applied, and improves quality and reliability.
上記の目的を達成するために、本発明による薄膜ＥＬ素
子は、透明電極パターン間上の第２の絶、数層上に第３
の絶縁層を設け、絶縁層２発光層の膜厚が局部的に小さ
くなるのを抑制するものである。In order to achieve the above object, the thin film EL device according to the present invention has a second layer between the transparent electrode patterns and a third layer on several layers.
This insulating layer is provided to suppress local reduction in the film thickness of the insulating layer 2 and the light emitting layer.
つまり１本発明においては、透明電極パターンのエツジ
部により生じる第２の絶緑膜の段差を第３の絶緑膜を形
成して埋めることにより、その上に形成される背面電極
のた才り下がりを防止し、もって透明電極パターンエツ
ジ部との間の′電界集中を抑止するようにしたものであ
る。In other words, in the present invention, by forming the third anti-green film to fill in the step of the second anti-green film caused by the edge portion of the transparent electrode pattern, the back electrode formed on the third anti-green film can be formed. This prevents the electrode from dropping, thereby suppressing electric field concentration between it and the edge portion of the transparent electrode pattern.
次に図面を用いて本発明の実施例を詳細に説明する。 Next, embodiments of the present invention will be described in detail using the drawings.
第１図は本発明による薄膜Ｅ Ｌ素子の一例を示す要部
断面図である。同図において、絶縁性片板として例えば
ホウケイ酸ガラス基板８を用い、このガラス基板８上に
インジウムと錫との酸化物をスパッタリング法により約
２０００人程度の厚さに被着し、焼成して耐熱性を有す
る透明導電１漠を形成する。次にこの透明導電膜を所望
のストライプ状パターンにフォ１−エツチングして透明
電極パターン９を形成する。FIG. 1 is a sectional view of a main part showing an example of a thin film EL device according to the present invention. In the figure, a borosilicate glass substrate 8, for example, is used as an insulating piece, and an oxide of indium and tin is deposited on the glass substrate 8 to a thickness of about 2,000 by sputtering, and then fired. A transparent conductive layer having heat resistance is formed. Next, this transparent conductive film is photo-etched into a desired striped pattern to form a transparent electrode pattern 9.
次に透明電極パターン９が形成されたガラス基板８上に
基板温度約３００℃でＹ ｘ Ｏ３をＥＢ蒸着して膜厚
約３０００Ａ程度の第１の絶縁ｙＰＪＩＯを形成する。Next, on the glass substrate 8 on which the transparent electrode pattern 9 is formed, Y x O 3 is EB-deposited at a substrate temperature of about 300° C. to form a first insulating yPJIO having a film thickness of about 3000 Å.
次にこの絶縁層１０上に付活剤としてＭｎを約０ 、５
ｗｔ％加えたＺｎＳの焼結体を材料として基板温度約
２５０℃でＥＢ蒸着により発光層１１を約５０００人の
厚さに形成する。その後、真空中において約５５０℃で
２時間アニール処理を行ない、発光Ｐ！ｊｉｌ中のＭｎ
の分布の均一化と各薄膜の欠陥の低減をはかる。次にこ
の発光層１１上に基板温度３００℃でＹ ｘ Ｏａを約
３０００Ａ程度の厚さにＥＢ蒸着して第２の絶縁層１２
を形成する。Next, on this insulating layer 10, about 0.5 Mn is added as an activator.
A light emitting layer 11 is formed to a thickness of about 5,000 layers by EB evaporation at a substrate temperature of about 250.degree. C. using a sintered body of ZnS added by wt%. After that, annealing treatment was performed in vacuum at about 550°C for 2 hours, and the luminescence P! Mn in jil
This aims to make the distribution uniform and reduce defects in each thin film. Next, a second insulating layer 12 is formed on this light emitting layer 11 by EB-depositing Y x Oa to a thickness of about 3000 Å at a substrate temperature of 300°C.
form.
次に、第２の絶縁層１２上の全面にフォトレジストを塗
布し、このレジストを透明電極パターン９と同じ様にス
トライプ状にパターン形成する。Next, a photoresist is applied to the entire surface of the second insulating layer 12, and this resist is patterned into stripes in the same manner as the transparent electrode pattern 9.
この場合、フォトレジストの膜厚は０．５〜５．０μｍ
の範囲が良く、望ましくは、１〜２μｍの厚さに形成し
、これを所定のフォトマスクを用いて露光しで現像して
、ストライプ状にパターン形成する。In this case, the photoresist film thickness is 0.5 to 5.0 μm.
The thickness is preferably in the range of 1 to 2 .mu.m, and this is exposed to light using a predetermined photomask and developed to form a striped pattern.
次にフォトレジストをそのまま残した状態で電圧印加用
端子部以外の全面に５ｉＯｚをスパッタリングして厚さ
約２０００Ａ程度のＳｉＯ２膜を形成する。次にフォト
レジストの溶剤中にこれを浸漬し、リフトオフにより第
２の絶縁層１２上のフォトレジストとＳ ｉ Ｏ２膜と
を除去することにより、透明電極パターン間の第２の絶
縁層１２上にのみ第３の絶緑膜１３が形成される。Next, with the photoresist left as it is, 5 iOz is sputtered on the entire surface other than the voltage application terminal portion to form a SiO2 film with a thickness of about 2000 Å. Next, the photoresist is immersed in a photoresist solvent, and the photoresist and the SiO2 film on the second insulating layer 12 are removed by lift-off, thereby forming a layer on the second insulating layer 12 between the transparent electrode patterns. Only the third anti-green film 13 is formed.
この場合、第２の絶縁層１２上に残す第３の絶緑膜１３
は、透明電極パターン部上が良く、望ましくは、隣接す
る透明電極パターンのエツジ部上を覆う様に形成する。In this case, the third anti-green film 13 left on the second insulating layer 12
is preferably formed on the transparent electrode pattern portion, preferably so as to cover the edge portion of the adjacent transparent electrode pattern.
最後に透明電極パターン９と直交する方向にアルミニウ
ムを約２０００Ａ程度の厚さにマスク蒸着してストライ
プ状の背面電極１４を形成して素子を完成する。Finally, aluminum is deposited with a mask to a thickness of about 2000 Å in a direction perpendicular to the transparent electrode pattern 9 to form a striped back electrode 14 to complete the device.
このような構成によれば、透明゛電極パターン形成の第
２の絶緑層上に第３の絶縁層を形成したことにより、透
明電極バタ・−ン９のパターンエツジによる電界の集中
の発生が抑止され、絶縁破壊の起点となることを防止で
きるので１Ｍ子の絶縁耐圧が飛＋ｔＩＪ的に向上し、発
光の寿命を向上させることができる。According to this configuration, by forming the third insulating layer on the second insulating layer of the transparent electrode pattern formation, the occurrence of electric field concentration due to the pattern edges of the transparent electrode pattern 9 can be prevented. Since this can be suppressed and the source of dielectric breakdown can be prevented, the dielectric strength of the 1M element can be dramatically improved, and the life of light emission can be improved.
なお、前述した実施例においては、透明電極パターン９
のエツジの影響を抑止するための第３の絶緑膜１３の膜
厚は、透明電極パターン９の膜厚と同一とした場合につ
いて説明したが、これが最も効果的であるが、５ｉＯｚ
膜の膜厚を５００人〜５０００人の範囲で変えても同様
の効果が得られる。In addition, in the embodiment described above, the transparent electrode pattern 9
The thickness of the third anti-green film 13 for suppressing the influence of the edges has been described as being the same as the thickness of the transparent electrode pattern 9, but this is most effective.
Similar effects can be obtained by changing the thickness of the membrane in the range of 500 to 5000 people.
さらに、前述した実施例において、絶緑膜１３はスパッ
タリングで形成したＳ ｉ Ｏｚ膜を用いた場合につい
て説明したが、成膜法は真空蒸着、イオンブレーティン
グ、プラズマＣＶＤ法等でも良く、材料もＳｉＮｘ、Ａ
ＱｚＯｓ、Ｔａ２０ａ、Ｔｉ０ｚ、Ｃｒ２Ｏ３等でも全
く同様の効果が得られる。なお、第３の絶縁層の誘電率
は第２の絶縁層のそれより低い値のものを用いるのが動
作特性上からして好ましい。Further, in the above-mentioned embodiment, the case where the never-green film 13 is a SiOz film formed by sputtering has been explained, but the film forming method may be vacuum evaporation, ion blating, plasma CVD, etc., and the material may also be used. SiNx,A
Exactly the same effect can be obtained with QzOs, Ta20a, Ti0z, Cr2O3, etc. Note that, from the viewpoint of operating characteristics, it is preferable to use a dielectric constant of the third insulating layer that is lower than that of the second insulating layer.
また、前述した実施例において、ガラス基板８はホウケ
イ酸ガラスを用いたが、本発明はこれに限定されるもの
ではなく、不透明基板を用いた場合でもこの不透明基板
上に設けられる背面電極パターンのエツジによる段差を
同様の方法で平坦化することにより、同様の効果が得ら
れることは明白である。Further, in the above embodiment, the glass substrate 8 was made of borosilicate glass, but the present invention is not limited to this. Even when an opaque substrate is used, the back electrode pattern provided on the opaque substrate It is clear that a similar effect can be obtained by flattening the edge difference in a similar manner.
以上説明したように本発明によれば、絶縁性」基板上に
形成した透明電極パターンのエツジにより。As explained above, according to the present invention, the edges of the transparent electrode pattern formed on the insulating substrate are used.
発光層、絶縁層の膜厚が局部的に小さくなるのを抑止で
きるので、電極パターンエツジ部による゛上界集中が著
しく抑制でき、信頼性の高い高品質。Since it is possible to prevent the film thickness of the light-emitting layer and insulating layer from becoming locally thin, it is possible to significantly suppress the concentration of the upper field due to the edge of the electrode pattern, resulting in highly reliable and high quality products.
高性能、長寿命の薄膜ＥＬ素子が得られるという極めて
優れた効果を有する。This has an extremely excellent effect in that a thin film EL element with high performance and long life can be obtained.
第１図は本発明による薄１漠Ｅ Ｌ素子の一実施例を説
明するための要部断面図、第２図は従来周知の薄膜ＥＬ
素子の構造を示す要部断面図である。
８・・・ガラス基板、９・・・透明電極パターン、］０
・・・第１の絶縁層、１１・・・発光層、１２・・・第
２の絶縁層、１３・・・第：３の絶縁層・１４−°゛背
背型電極 ７−）代理人 弁理士
小 川 勝 男ｊ１８・・・ガラス基板
９・・・透明電極パターン
１０・・・第１の絶縁層
１１・・・発光層
１２・・・第２の絶縁層
１３・・・第３の絶縁層
１４・・・背面電極FIG. 1 is a cross-sectional view of essential parts for explaining an embodiment of a thin film EL device according to the present invention, and FIG. 2 is a sectional view of a conventional thin film EL device.
FIG. 2 is a cross-sectional view of main parts showing the structure of the element. 8...Glass substrate, 9...Transparent electrode pattern, ]0
...first insulating layer, 11...light emitting layer, 12...second insulating layer, 13...th: third insulating layer, 14-° back-back type electrode 7-) agent patent attorney
Katsuo Ogawaj18...Glass substrate 9...Transparent electrode pattern 10...First insulating layer 11...Light emitting layer 12...Second insulating layer 13...Third insulating layer 14...Back electrode
Claims (2)
，発光層，第２の絶縁層，および背面電極を形成してな
る薄膜エレクトロルミネセンス素子において、前記透明
電極間上の前記第２の絶緑層上に第３の絶緑膜を有する
ことを特徴とする薄膜エレクトロルミネセンス素子。1. In a thin film electroluminescent device comprising at least a transparent electrode, a first insulating layer, a light emitting layer, a second insulating layer, and a back electrode formed on a never-green substrate, the second layer between the transparent electrodes A thin film electroluminescent device comprising a third anti-green film on the anti-green layer.
率より低くしたことを特徴とする特許請求の範囲第１項
記載の薄膜エレクトロルミネセンス素子。2. 2. The thin film electroluminescent device according to claim 1, wherein the third insulating film has a dielectric constant lower than that of the second insulating layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61207945A JPS6364291A (en) | 1986-09-05 | 1986-09-05 | Thin film electroluminescence device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61207945A JPS6364291A (en) | 1986-09-05 | 1986-09-05 | Thin film electroluminescence device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6364291A true JPS6364291A (en) | 1988-03-22 |
Family
ID=16548137
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61207945A Pending JPS6364291A (en) | 1986-09-05 | 1986-09-05 | Thin film electroluminescence device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6364291A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012144156A1 (en) * | 2011-04-22 | 2012-10-26 | パナソニック株式会社 | Organic el display panel and method for manufacturing same |
-
1986
- 1986-09-05 JP JP61207945A patent/JPS6364291A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012144156A1 (en) * | 2011-04-22 | 2012-10-26 | パナソニック株式会社 | Organic el display panel and method for manufacturing same |
| JP5096648B1 (en) * | 2011-04-22 | 2012-12-12 | パナソニック株式会社 | Organic EL display panel and manufacturing method thereof |
| EP2618638A1 (en) * | 2011-04-22 | 2013-07-24 | Panasonic Corporation | Organic el display panel and method for manufacturing same |
| EP2618638A4 (en) * | 2011-04-22 | 2013-08-14 | Panasonic Corp | Organic el display panel and method for manufacturing same |
| US8829509B2 (en) | 2011-04-22 | 2014-09-09 | Panasonic Corporation | Organic EL display panel and method for manufacturing same |
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