JPS6334510B2 - - Google Patents

Info

Publication number
JPS6334510B2
JPS6334510B2 JP57102192A JP10219282A JPS6334510B2 JP S6334510 B2 JPS6334510 B2 JP S6334510B2 JP 57102192 A JP57102192 A JP 57102192A JP 10219282 A JP10219282 A JP 10219282A JP S6334510 B2 JPS6334510 B2 JP S6334510B2
Authority
JP
Japan
Prior art keywords
chip
board
external terminal
back side
card
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57102192A
Other languages
Japanese (ja)
Other versions
JPS58221478A (en
Inventor
Masao Muramatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyodo Printing Co Ltd
Original Assignee
Kyodo Printing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyodo Printing Co Ltd filed Critical Kyodo Printing Co Ltd
Priority to JP57102192A priority Critical patent/JPS58221478A/en
Publication of JPS58221478A publication Critical patent/JPS58221478A/en
Publication of JPS6334510B2 publication Critical patent/JPS6334510B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07743—External electrical contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Credit Cards Or The Like (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、ICチツプを埋込んだICカードに関
するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an IC card embedded with an IC chip.

〔従来技術〕[Prior art]

従来のICカードの例の一部分を第１図に示せ
ば、１はカードの本体、２はモールド材、３は
ICチツプ、４はICチツプ３をボンドしている基
板、５は外部端末のデータ交信用接触子であるピ
ン６と接触すべき接触点であり、スルーホール７
により基板４の裏面のリード線８と接続し、基板
４の裏面にボンデイングされたICチツプ３の端
子に接続している。 Part of an example of a conventional IC card is shown in Figure 1, where 1 is the card body, 2 is the molding material, and 3 is the card body.
IC chip, 4 is a substrate to which the IC chip 3 is bonded, 5 is a contact point to be contacted with a pin 6 which is a contact for data communication of an external terminal, and a through hole 7
It is connected to the lead wire 8 on the back side of the board 4, and connected to the terminal of the IC chip 3 bonded to the back side of the board 4.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

このような従来のICカードは、接触点５はIC
チツプ３の装着部に対し近接して設けられている
ので、使用時には第２図の如くピン６の押圧力に
より基板４が変形してICチツプ３とのボンデイ
ング（ダイボンデイング）部にはくり９を生じ、
ICチツプ３の損傷、リード線８の切断、基板４
の破損などを生じ、ICの正常動作が保証されな
くなる欠点があつた。 In such a conventional IC card, the contact point 5 is the IC
Since it is provided close to the mounting part of the chip 3, during use, the pressing force of the pin 6 deforms the board 4 as shown in FIG. arises,
Damage to IC chip 3, cutting of lead wire 8, board 4
This had the disadvantage that normal operation of the IC could not be guaranteed due to damage to the IC.

また、この基板４の変形を防ぐために、カバー
プレートを設けて抑えることもできるが、製造工
程がふえて手間を要し、厚さが増大する、という
問題点があつた。 Further, in order to prevent the deformation of the substrate 4, a cover plate can be provided to suppress the deformation, but there are problems in that the manufacturing process is increased, labor is required, and the thickness is increased.

また、実開昭49−72160号公報、特開昭51−
92141号公報などに見られるICモジユールを用い
たものにおいては、基板に対して同じ側にICチ
ツプと動電路と外部端子があるので、外部端子を
露出せしめながらICチツプと導電路とを機械的
及び絶縁的に保護するためにカバープレートを必
要とした。従つて、上記の場合と同様、製造工程
が複雑となり、また厚さが増大するという問題点
があつた。 Also, Japanese Utility Model Publication No. 49-72160, Japanese Patent Application Publication No. 51-
In the IC module used in the 92141 publication, the IC chip, the conductive path, and the external terminal are on the same side of the board, so the IC chip and the conductive path are mechanically connected while exposing the external terminal. and required a cover plate for insulating protection. Therefore, similar to the above case, there were problems in that the manufacturing process became complicated and the thickness increased.

本発明は、従来のものの上記の欠点を除き、外
部端末の接触子からの押圧力を受けても、ICチ
ツプに悪影響を及ぼさず、かつ、基板の変形保護
用及び絶縁保護用のカバープレートを必要としな
いICカードを提供することを目的とするもので
ある。 The present invention eliminates the above-mentioned drawbacks of the conventional ones, has a cover plate that does not adversely affect the IC chip even when subjected to pressing force from the contact of an external terminal, and is used to protect the board from deformation and insulation. The purpose is to provide IC cards that are not needed.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、「次の(A)の如く形成されたICモジユ
ールが、外部端子側の基板の表面を表側とし、カ
ード本体の凹部に、ICチツプ側を凹部に向けて
嵌め込まれた状態で形成されていることを特徴と
するICカード。 The present invention is formed in such a state that an IC module formed as shown in (A) below is fitted into a recess of a card body with the surface of the board on the external terminal side facing the front side and the IC chip side facing the recess. An IC card characterized by:

(A) 一つの基板の表面に外部端子を設け、該基板
の、該外部端子から離れた位置の裏面にICチ
ツプを装着し、該ICチツプに接続して、前記
基板の裏面に設けた導電路を前記外部端子の裏
側にまで延長し、スルーホールを介して該外部
端子に接続して形成したICモジユールである。(A) An external terminal is provided on the front surface of one board, an IC chip is mounted on the back side of the board at a position away from the external terminal, and a conductive chip provided on the back side of the board is connected to the IC chip. This IC module is formed by extending a path to the back side of the external terminal and connecting it to the external terminal via a through hole.

〔実施例〕〔Example〕

本発明の実施例を図面を用いて説明すれば、第
３図において、基板４及びモールド材２が延長さ
れ、接触点５は、ICチツプ３の装着部から離れ
て設けられている。最も近い接触点５からICチ
ツプ３までの距離をｌ、基板４の厚さをｔとする
と、例えばガラスエポキシ樹脂基板の場合 ｌ≧10t なることが好ましく、 ｌ≧20t なることが一層好ましい。 An embodiment of the present invention will be described with reference to the drawings. In FIG. 3, the substrate 4 and the molding material 2 are extended, and the contact points 5 are provided away from the mounting portion of the IC chip 3. If the distance from the nearest contact point 5 to the IC chip 3 is l, and the thickness of the substrate 4 is t, for example, in the case of a glass epoxy resin substrate, it is preferable that l≧10t, and more preferably that l≧20t.

各リード線８と各スルーホール５の裏面とは、
それぞれ導電路１０により独立接続されている。 The back side of each lead wire 8 and each through hole 5 is
Each of them is independently connected by a conductive path 10.

このような構造であるから、ピン６により接触
点５に押圧力が加えられてもその付近のみに変形
が生ずるのみで、ICチツプ３及びその付近は変
形の影響を受けず、従つてICチツプ３のボンデ
イングのはくりや、各部の変形、破断を生ずるこ
となくICの正常な動作を確保することができる。 Because of this structure, even if a pressing force is applied to the contact point 5 by the pin 6, deformation occurs only in the vicinity thereof, and the IC chip 3 and its vicinity are not affected by the deformation. Normal operation of the IC can be ensured without causing peeling of the bonding or deformation or breakage of various parts as described in 3.

さらに、スルーホール７の位置もICチツプ３
から離れているので、スルーホール７から薬剤が
侵入することがあつてもICに影響することはな
い。 Furthermore, the position of through hole 7 is also the same as that of IC chip 3.
Since it is far away from the IC, even if the drug enters through the through hole 7, it will not affect the IC.

〔発明の効果〕〔Effect of the invention〕

本発明により、外部端末の接触子から押圧力を
受けてもICチツプには影響がなく、基板の変形
もなく、ICチツプと基板とのボンデイング（ダ
イボンデイング）のはくりを生ずることもなく、
ICチツプ、基板がリード線などの破損を招くこ
ともなく、ICの正常動作を確保することができ、
基板の変形保護用及び絶縁保護用のカバープレー
トを必要とせず、製造工程が簡単となり、かつ、
厚さを薄くすることができ、実用上極めて大なる
効果を奏する。 According to the present invention, even if a pressing force is applied from a contactor of an external terminal, the IC chip is not affected, the board is not deformed, and the bonding (die bonding) between the IC chip and the board does not peel off.
The IC chip and board do not cause damage to lead wires, etc., ensuring normal operation of the IC.
There is no need for a cover plate to protect the board from deformation or insulation, simplifying the manufacturing process, and
The thickness can be reduced, which has an extremely large practical effect.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来例の部分断面図、第２図はその使
用時の状態を示す説明図、第３図は本発明の実施
例の部分断面図である。 １……本体、２……モールド材、３……ICチ
ツプ、４……基板、５……接触点、６……ピン、
７……スルーホール、８……リード線、９……は
くり、１０……導電路。 FIG. 1 is a partial sectional view of a conventional example, FIG. 2 is an explanatory view showing the state in use, and FIG. 3 is a partial sectional view of an embodiment of the present invention. 1...Main body, 2...Mold material, 3...IC chip, 4...Substrate, 5...Contact point, 6...Pin,
7... Through hole, 8... Lead wire, 9... Strip, 10... Conductive path.

Claims (1)

【特許請求の範囲】 １ 次の(A)の如く形成されたICモジユールが、
外部端子側の基板の表面を表側とし、カード本体
の凹部に、ICチツプ側を凹部に向けて嵌め込ま
れた状態で形成されていることを特徴とするIC
カード。 (A) 一つの基板の表面に外部端子を設け、該基板
の、該外部端子から離れた位置の裏面にICチ
ツプを装着し、該ICチツプに接続して、前記
基板の裏面に設けた導電路を前記外部端子の裏
側にまで延長し、スルーホールを介して該外部
端子に接続して形成したICモジユール。[Claims] 1. An IC module formed as shown in (A) below:
An IC characterized in that the surface of the board on the external terminal side is the front side, and the IC chip is fitted into a recess of the card body with the IC chip side facing the recess.
card. (A) An external terminal is provided on the front surface of one board, an IC chip is mounted on the back side of the board at a position away from the external terminal, and a conductive chip provided on the back side of the board is connected to the IC chip. An IC module formed by extending a path to the back side of the external terminal and connecting to the external terminal via a through hole.
JP57102192A 1982-06-16 1982-06-16 Ic card Granted JPS58221478A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57102192A JPS58221478A (en) 1982-06-16 1982-06-16 Ic card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57102192A JPS58221478A (en) 1982-06-16 1982-06-16 Ic card

Publications (2)

Publication Number Publication Date
JPS58221478A JPS58221478A (en) 1983-12-23
JPS6334510B2 true JPS6334510B2 (en) 1988-07-11

Family

ID=14320797

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57102192A Granted JPS58221478A (en) 1982-06-16 1982-06-16 Ic card

Country Status (1)

Country Link
JP (1) JPS58221478A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6243749A (en) * 1985-08-20 1987-02-25 Nippon Denshi Zairyo Kk Security key
JPS62152193A (en) * 1985-12-25 1987-07-07 イビデン株式会社 Printed wiring board for ic card

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5192141A (en) * 1974-12-30 1976-08-12 Keitaikanona shikibetsujohoofukumubutsupin
JPS5283132A (en) * 1975-12-31 1977-07-11 Cii Portable card for electric signal processor and method of fabricating same
JPS5536639A (en) * 1978-09-05 1980-03-14 Arai Pump Mfg Co Ltd Bush or bearing
JPS5556639A (en) * 1978-10-19 1980-04-25 Cii Strip for carrying device for processing electric signal and method of manufacturing same
JPS5748175A (en) * 1980-07-09 1982-03-19 Philips Nv Portable identifying structure
JPS5818785B2 (en) * 1973-10-09 1983-04-14 日本電気株式会社 Seizouhouhou
JPS5875285A (en) * 1981-10-28 1983-05-06 Tokyo Jiki Insatsu Kk Manufacture of magnetic card incorporating ic

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5247419Y2 (en) * 1972-10-09 1977-10-27
JPS53134112U (en) * 1977-03-30 1978-10-24
JPS6121727Y2 (en) * 1978-10-02 1986-06-28
JPS5818785U (en) * 1982-03-05 1983-02-04 玉崎　三衛 Shape pencil

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5818785B2 (en) * 1973-10-09 1983-04-14 日本電気株式会社 Seizouhouhou
JPS5192141A (en) * 1974-12-30 1976-08-12 Keitaikanona shikibetsujohoofukumubutsupin
JPS5283132A (en) * 1975-12-31 1977-07-11 Cii Portable card for electric signal processor and method of fabricating same
JPS5536639A (en) * 1978-09-05 1980-03-14 Arai Pump Mfg Co Ltd Bush or bearing
JPS5556639A (en) * 1978-10-19 1980-04-25 Cii Strip for carrying device for processing electric signal and method of manufacturing same
JPS5748175A (en) * 1980-07-09 1982-03-19 Philips Nv Portable identifying structure
JPS5875285A (en) * 1981-10-28 1983-05-06 Tokyo Jiki Insatsu Kk Manufacture of magnetic card incorporating ic

Also Published As

Publication number Publication date
JPS58221478A (en) 1983-12-23

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