JPS6332294B2 - - Google Patents
Info
- Publication number
- JPS6332294B2 JPS6332294B2 JP3218780A JP3218780A JPS6332294B2 JP S6332294 B2 JPS6332294 B2 JP S6332294B2 JP 3218780 A JP3218780 A JP 3218780A JP 3218780 A JP3218780 A JP 3218780A JP S6332294 B2 JPS6332294 B2 JP S6332294B2
- Authority
- JP
- Japan
- Prior art keywords
- lpf
- attenuation
- inductance
- diagram showing
- constant resistance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 claims description 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 9
- 230000005540 biological transmission Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/02—Details
- H04B3/40—Artificial lines; Networks simulating a line of certain length
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Filters And Equalizers (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Description
【発明の詳細な説明】
本発明は、FDM／PCM伝送装置に使用される
擬似線路（BON）に関するものであり、特にそ
のインピーダンス特性の各善に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pseudo line (BON) used in an FDM/PCM transmission device, and particularly to improvements in its impedance characteristics.
通常上記伝送装置には、所定間隔毎に中継器が
設けられる。この中継器の特性を試験するために
は、実際の使用状態を実現するため長尺の同軸ケ
ーブルと同等の特性を持つた擬似線路が用いられ
るが、擬似線路としては、一般に第１図に示すよ
うな定抵抗型の回路網が使用される。ａ図に示す
回路全体はｂ図に示すように、両端ともに定抵抗
性を示す基本セクシヨンｃ図の橋絡Ｔ型回路で代
表される）を多段に縦続接続したものである。
BONの用途では電気的特性上第６図に示すよう
な規定をすることが多い。つまり、ａ図に示す如
く所定の周波数まで一定量の不整合減衰量（斜線
路以上）を要求し、ｂ図の如く減衰量偏差（斜線
部の間）の規格も厳しいが、その帯域を超えると
整合をほとんど必要とせず、減衰量規格も大幅に
緩和される。 Usually, the above transmission device is provided with repeaters at predetermined intervals. In order to test the characteristics of this repeater, a pseudo-line with characteristics equivalent to a long coaxial cable is used to simulate the actual usage conditions. A constant resistance type network is used. The entire circuit shown in Fig. a, as shown in Fig. b, consists of basic sections exhibiting constant resistance at both ends (represented by the bridging T-type circuit shown in Fig. c), which are connected in cascade in multiple stages.
In BON applications, the electrical characteristics are often specified as shown in Figure 6. In other words, as shown in figure a, a certain amount of mismatched attenuation (above the diagonal line) is required up to a predetermined frequency, and as shown in figure b, the standard for attenuation deviation (between the shaded areas) is also strict, but beyond that band. There is almost no need for matching, and attenuation standards are significantly relaxed.
又第６図ｃは要求される回路自体の減衰量を示
す。 Further, FIG. 6c shows the required attenuation amount of the circuit itself.
ここで、第１図ａの定抵抗回路網を実際に使用
するとき、第２図の様にケースＫ内に収容する場
合は、回路端子Ａ，Ｂとケース埋込の入力、出力
端子IN、OUTとの間を所定の長さの引出線で接
続するのが普通である。ところがこの引出線の有
するインダクタンスla，lbが介在することによ
り、特性上の影響があり、とくに不整合特性が劣
化して要求の特性を満足できなくなるという問題
がある。このためＡとIN間及びＢとOUT間を所
定の線路インピーダンスを有する同軸コードで結
ぶことで解決する方法もあるが、同軸構造の端子
を有する特別の構造の高価なケースを必要とする
点で問題である。又上記ケースをプリント板に塔
載する時に、同軸構造の端子では塔載が困難であ
る。 Here, when actually using the constant resistance circuit network shown in FIG. 1a, if it is housed in a case K as shown in FIG. It is common to connect to OUT with a leader line of a predetermined length. However, the presence of the inductances la and lb of the lead wires has an effect on the characteristics, and in particular, there is a problem that the mismatch characteristics deteriorate, making it impossible to satisfy the required characteristics. There is a way to solve this problem by connecting A and IN and B and OUT with a coaxial cord having a predetermined line impedance, but this requires an expensive case with a special structure and a coaxial terminal. That's a problem. Furthermore, when mounting the case on a printed circuit board, it is difficult to mount the case on a printed circuit board using terminals having a coaxial structure.
本発明は上記の問題点を解決するために、ケー
ス内引出線のインダクタンスを利用して低域通過
フイルタ（LPF）を構成する様にした。 In order to solve the above problems, the present invention utilizes the inductance of the leader wire inside the case to configure a low-pass filter (LPF).
本発明の構成を第３図に示す。 The configuration of the present invention is shown in FIG.
ケース内部引出線の有するインダクタンスla，
lbに対して、不足のインダクタンスla′，lb′を外
部に付加し、さらにケースＫの内部と外部にそれ
ぞれ１個ずつ容量c1〜c4を付加して３次のLPF回
路を構成する。 Inductance la of the case internal leader wire,
Inductances la' and lb' insufficient for lb are added to the outside, and capacitors c 1 to c 4 are added to the inside and outside of case K, respectively, to form a third-order LPF circuit.
LPFの設計インピーダンスは定抵抗回路網の
インピーダンスに合わせる。 The design impedance of the LPF matches the impedance of the constant resistance network.
LPFは通過帯域内で損失のハンプの少ない実
質無損失型のものが必要であり、その遮断周波数
は不整合規定端周波数aまたはその若干上に選
定するのが普通である。 The LPF must be of a substantially lossless type with a small loss hump within the passband, and its cutoff frequency is usually selected at or slightly above the mismatch specified end frequency a.
100MHz帯のBONに対する200MHzのLPFの回
路例（チエビシエフ型）を第４図に示す。 Figure 4 shows an example of a 200MHz LPF circuit (Tievisiev type) for a 100MHz band BON.
第４図ａにおいてＬ＝43.33nH、Ｃ＝4.333PF
である。又、ｂにおいてL′＝57.88nH、C′＝
6.671PFであり、損失ハンプ（ap）はａの場合
0.001dBで、ｂの場合0.01dBである。 In Figure 4 a, L = 43.33nH, C = 4.333PF
It is. Also, in b, L′=57.88nH, C′=
6.671PF and loss hump (ap) is a
0.001dB, and for b it is 0.01dB.
第５図に、LPF特性を示す。遮断周波数cは
aより高く、c以上では18dB／オクターブの減
衰特性を有する。実際の回路はこのような定数を
参考に実験的に定めるので、多少これらの値から
前後するのが普通である。 Figure 5 shows the LPF characteristics. The cutoff frequency c is
Higher than a and higher than c, it has an attenuation characteristic of 18 dB/octave. Since actual circuits are determined experimentally with reference to these constants, it is normal for them to deviate somewhat from these values.
このようなLPFの通過帯域内では、信号は無
反射で伝送されるので、新しい入力・出力端子
IN′、OUT′で見た不整合は大幅に改善される。 Within the passband of such an LPF, signals are transmitted without reflection, so new input/output terminals are required.
The mismatch seen at IN' and OUT' is greatly improved.
第７図に具体的な例のデータを示す。 FIG. 7 shows data of a specific example.
第７図は第６図ａと同様な不整合減衰量特性を
示す図で、曲線ｘは第２図のIN端子における特
性、曲線ｙはc1，c3のみを付加した場合のIN端
子における特性、曲線ｚは第３図のIN′端子にお
ける特性を直線ｓは要求される特性を夫々示す。 Figure 7 is a diagram showing the mismatch attenuation characteristics similar to Figure 6a, where the curve x is the characteristic at the IN terminal in Figure 2, and the curve y is the characteristic at the IN terminal when only c 1 and c 3 are added. The curve z shows the characteristics at the IN' terminal in FIG. 3, and the straight line s shows the required characteristics.
図から明らかな如く本発明によれば要求される
特性を十分に満足している。又第８図に目標減衰
量に対する減衰量偏差を示す。 As is clear from the figure, the present invention fully satisfies the required characteristics. Further, FIG. 8 shows the attenuation amount deviation with respect to the target attenuation amount.
図中、曲線Ｕは目標値を、曲線Ｖは実際の偏差
を直線s1，s2は要求される特性範囲を示す。図か
ら明らかな如く、本発明によれば、要求された特
性を十分に満足している。 In the figure, curve U shows the target value, curve V shows the actual deviation, and straight lines s 1 and s 2 show the required characteristic range. As is clear from the figure, the present invention satisfies the required characteristics.
以上説明したように引出線のインダクタンスを
利用した形で所定帯域内で無損失・無反射性の
LPFを構成し、定抵抗型回路網の前・後に付加
することによつて、所定帯域内の不整合減衰量が
必要量確保される。 As explained above, the inductance of the leader wire is used to achieve lossless and non-reflective performance within a specified band.
By configuring the LPF and adding it before and after the constant resistance type circuit network, a necessary amount of mismatch attenuation within a predetermined band can be secured.
その他に、所定帯域を超えた高周波帯域では各
LPF（３次）がそれぞれ18dB／octの傾斜の減衰
量を有するので、その分定抵抗型回路網で負担す
る高域での減衰量が軽減され、その分低域側所定
帯域内での設計精度が向上するという利点もあ
る。 In addition, in high frequency bands exceeding the specified band, each
Since each LPF (third order) has an attenuation with a slope of 18 dB/oct, the amount of attenuation in the high range that is borne by the constant resistance type network is reduced accordingly, and the design within the specified low frequency band is accordingly reduced. There is also the advantage of improved accuracy.
また、以上の方策により、高周波の用途でも構
造の簡単な低周波用のケースが適用可能となる。 In addition, with the above measures, a low-frequency case with a simple structure can be applied to high-frequency applications as well.
第１図は、定抵抗型回路を示す図、第２図は、
従来の構成を示す図、第３図は、本発明の構成の
一例を示す図、第４図はLPFを示す図、第５図
は第４図のLPFの特性を示す図、第６図は、第
１図の回路に要求される特性を示す図、第７図、
第８図は、第３図の構成の特性を示す図である。
図中la，lbは引出線のインダクタンス、la′，
lb′は付加したインダクタンスc1〜c4は付加した容
量である。
Figure 1 is a diagram showing a constant resistance type circuit, Figure 2 is a diagram showing a constant resistance type circuit.
3 is a diagram showing an example of the configuration of the present invention, FIG. 4 is a diagram showing an LPF, FIG. 5 is a diagram showing the characteristics of the LPF shown in FIG. 4, and FIG. 6 is a diagram showing a conventional configuration. , a diagram showing the characteristics required for the circuit of FIG. 1, FIG. 7,
FIG. 8 is a diagram showing the characteristics of the configuration of FIG. 3. In the figure, la and lb are the inductances of the leader wires, la′,
lb′ is the added inductance, and c 1 to c 4 are the added capacitances.
Claims (1)
のインダクタンスを直列に接続し、該引出し線と
インダクタンスのおのおのに並列に片端接地の容
量を接続することにより、設定抵抗型回路の不整
合規定端周波数より高い遮断周波数を有する低域
通過波器を構成したことを特徴とする擬似線
路。1 By connecting the required amount of inductance in series to the input and output lead wires of the constant resistance type circuit, and connecting a capacitor with one end grounded in parallel to the lead wire and each inductance, the mismatch regulation of the set resistance type circuit is established. A pseudo-line characterized by comprising a low-pass transducer having a cutoff frequency higher than an end frequency.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3218780A JPS56129438A (en) | 1980-03-14 | 1980-03-14 | Artificial line |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3218780A JPS56129438A (en) | 1980-03-14 | 1980-03-14 | Artificial line |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS56129438A JPS56129438A (en) | 1981-10-09 |
| JPS6332294B2 true JPS6332294B2 (en) | 1988-06-29 |
Family
ID=12351901
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3218780A Granted JPS56129438A (en) | 1980-03-14 | 1980-03-14 | Artificial line |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56129438A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62141232U (en) * | 1986-02-26 | 1987-09-05 | ||
| JP2543385Y2 (en) * | 1991-12-18 | 1997-08-06 | 株式会社神谷儀八 | Roof tiles in consideration of corrosion prevention |
| JP2008136158A (en) * | 2006-10-26 | 2008-06-12 | Tdk Corp | Pseudo line circuit |
-
1980
- 1980-03-14 JP JP3218780A patent/JPS56129438A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS56129438A (en) | 1981-10-09 |
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