JPS63310147A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS63310147A
JPS63310147A JP14743887A JP14743887A JPS63310147A JP S63310147 A JPS63310147 A JP S63310147A JP 14743887 A JP14743887 A JP 14743887A JP 14743887 A JP14743887 A JP 14743887A JP S63310147 A JPS63310147 A JP S63310147A
Authority
JP
Japan
Prior art keywords
semiconductor device
solder
lead frame
molten solder
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14743887A
Other languages
Japanese (ja)
Other versions
JPH0533828B2 (en
Inventor
Motoaki Matsuda
元秋 松田
Hidemi Matsukuma
松隈　秀実
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP14743887A priority Critical patent/JPS63310147A/en
Publication of JPS63310147A publication Critical patent/JPS63310147A/en
Publication of JPH0533828B2 publication Critical patent/JPH0533828B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce a quantity of a solder material being consumed and to easily control a temperature, a flow and the like of a solder by a method wherein, when an external lead of a semiconductor device is immersed in the molten solder, the semiconductor device is treated to be situated below a face of a lead frame in order to prevent the molten solder from adhering to a frame part or the like of the lead frame. CONSTITUTION:A semiconductor device 2 mounted on a lead frame 1 is plastic- sealed; then, an external lead 3 of the semiconductor device 2 is separated from the lead frame 1 and shaped; the semiconductor device 2 is kept connected to the lead frame 1 through a tab lead only. Then, the semiconductor device 2 is shaped in such a way that it is situated below a face of the lead frame 1; the semiconductor device 2 is immersed in a molten solder 4 in a solder tank 5; the external lead 3 is coated with the solder. During this process, a frame part of the lead frame 1 is not immersed in the molten solder; only the required external lead 3 can be immersed. By this setup, a solder material can be saved; at the same time, a temperature and a flow of the molten solder can be controlled easily.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は樹脂封止型半導体装置の製造方法に関し、特に
外部リードを溶融半田にて被覆する方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a resin-sealed semiconductor device, and particularly to a method of covering external leads with molten solder.

〔従来の技術〕[Conventional technology]

従来、この種の外部リードの半田被覆方法は、半導体装
置の外部リード及びリードフレーム全体を溶融半田に浸
漬する方法であった。Conventionally, this type of method for coating external leads with solder has been a method in which the entire external leads and lead frame of a semiconductor device are immersed in molten solder.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の外部リードの半田被覆方法は、半田被覆
を必要とする半導体装置の外部リードのみでなくリード
フレームの枠部等の半田被覆不要部分にまで半田が付着
するため、半田材料を多量に消費し、また溶融半田の温
度、流れ等の制御を困難にせしめているという欠点があ
る。The conventional method of soldering external leads described above requires a large amount of solder material because solder adheres not only to the external leads of the semiconductor device that require solder coating, but also to parts that do not need solder coating, such as the frame of the lead frame. It has the disadvantage that it consumes a lot of heat and makes it difficult to control the temperature, flow, etc. of the molten solder.

本発明の目的は、従来の欠点を除去し、半導体装置のリ
ード部分のみに半田被覆することができ半田材料を節減
すると同時に溶融半田の温度、流れの制御が容易に出来
る半導体装置の製造方法を提供することにある。An object of the present invention is to provide a method for manufacturing a semiconductor device that eliminates the conventional drawbacks, allows solder to be coated only on the lead portion of a semiconductor device, saves solder material, and at the same time allows easy control of the temperature and flow of molten solder. It is about providing.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の半導体装置の製造方法は、リードフレ−ムに搭
載され樹脂封止された半導体装置の外部リードを溶融半
田にて被覆する半導体装置の製造方法において、半導体
装置の外部リードフレームより分離し、該半導体装置を
タブリードのみにより保持するよう加工する工程と、前
記半導体装置が前記リードフレーム面より下方に位置す
るようリードフレームをプレス成形する工程と、前記半
導体装置を溶融半田に浸漬し外部リードに半田被覆する
工程とを含んで構成される。The method for manufacturing a semiconductor device of the present invention is a method for manufacturing a semiconductor device in which external leads of a semiconductor device mounted on a lead frame and sealed with resin are coated with molten solder. a step of processing the semiconductor device so that it is held only by tab leads; a step of press-molding the lead frame so that the semiconductor device is positioned below the surface of the lead frame; and a step of immersing the semiconductor device in molten solder to attach it to the external leads. The method includes a step of coating with solder.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。第１図
（ａ）、（ｂ）〜第４図は本発明の一実施例を説明する
ために工程順に示した説明図で第１図（ａ）、（ｂ）乃
至第３図（−ａ）、（ｂ）は何れも平面図およびその側
面図、第４図は半導体装置が溶融半田に浸漬されている
状態を示す側面図である。本実施例は次の工程より構成
される。Next, the present invention will be explained with reference to the drawings. FIGS. 1(a), (b) to FIG. 4 are explanatory diagrams shown in the order of steps to explain one embodiment of the present invention. ) and (b) are both a plan view and a side view thereof, and FIG. 4 is a side view showing a state in which the semiconductor device is immersed in molten solder. This example is comprised of the following steps.

まず、第１図（ａ）、（ｂ）に示すようにリードフレー
ムに搭載された半導体素子を樹脂封止する。図において
１はリードフレーム、２は樹脂封止された半導体装置、
３は外部リー　ドである。First, as shown in FIGS. 1(a) and 1(b), a semiconductor element mounted on a lead frame is sealed with a resin. In the figure, 1 is a lead frame, 2 is a resin-sealed semiconductor device,
3 is an external lead.

次に、第２図（ａ）、（ｂ）に示すように、半導体装置
の外部リードをリードフレームから分離成形し、半導体
装置をタブリードのみによりリードフレーム１につなが
る状態にする。Next, as shown in FIGS. 2(a) and 2(b), the external leads of the semiconductor device are molded separately from the lead frame, so that the semiconductor device is connected to the lead frame 1 only by tab leads.

次に、第３図（ａ）、（ｂ）に示すように半導体装置が
リードフレーム面より下方に位置するよう成形加工する
。なお第２図（ａ）、（ｂ）及び第３図（ａ）、（ｂ）
の工程を一工程で実施してもよい。Next, as shown in FIGS. 3(a) and 3(b), the semiconductor device is formed so as to be located below the surface of the lead frame. In addition, Fig. 2 (a), (b) and Fig. 3 (a), (b)
The steps may be performed in one step.

次に、第４図（ａ）、（ｂ）に示すように、半田槽５の
溶融半田４に第３図に示す半導体装置を浸漬し外部リー
ドの半田被覆を行う。この場合リードフレーム枠部分は
溶融半田に浸漬されず、必要とされる外部リードのみを
浸漬できるので本発明の目的を達成することが出来る。Next, as shown in FIGS. 4(a) and 4(b), the semiconductor device shown in FIG. 3 is immersed in the molten solder 4 of the solder bath 5 to coat the external leads with solder. In this case, the lead frame frame portion is not immersed in molten solder, and only the necessary external leads can be immersed, so that the object of the present invention can be achieved.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、半導体装置の外部リード
を溶融半田に浸漬する際に、半導体装置がリードフレー
ム面より下方に位置するように加工してリードフレーム
枠部等に溶融半田が付着することを防止することにより
、半田材料の使用量を低減し、かつ溶融半田の温度、流
れ等の制御が容易にできる効果がある。As explained above, in the present invention, when the external leads of a semiconductor device are immersed in molten solder, the semiconductor device is processed so that it is located below the surface of the lead frame, so that molten solder adheres to the lead frame frame, etc. By preventing this, the amount of solder material used can be reduced and the temperature, flow, etc. of molten solder can be easily controlled.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図（ａ）、（ｂ）〜第４図は本発明の一実施例を説
明するために工程順に示した説明図で、第１図（ａ）、
（ｂ）　〜第３図（ａ）、（ｂ）は何れも平面図および
その側面図、第４図は半導体装置が溶融半田に浸漬され
ている状態を示す側面図である。 １・・・リードフレーム、２・・・半導体装置、３・・
・外部リード、４・・・溶融半田、５・・・半田槽。 月１図　　　　　　嶌２ＶＪ 昂３図　　　　　　第４ｚ1(a), (b) to FIG. 4 are explanatory diagrams shown in the order of steps to explain one embodiment of the present invention.
3(b) to 3(a) and 3(b) are a plan view and a side view thereof, and FIG. 4 is a side view showing a semiconductor device immersed in molten solder. 1...Lead frame, 2...Semiconductor device, 3...
- External lead, 4... molten solder, 5... solder bath. Month 1 Figure 2 VJ Ko 3 Figure 4z

Claims (1)

【特許請求の範囲】[Claims] リードフレームに搭載され樹脂封止された半導体装置の
外部リードを溶融半田にて被覆する半導体装置の製造方
法において、半導体装置の外部リードをリードフレーム
より分離し、該半導体装置をダブリードのみにより保持
するよう加工する工程と、前記半導体装置が前記リード
フレーム面より下方に位置するようリードフレームをプ
レス成形する工程と、前記半導体装置を溶融半田に浸漬
し外部リードに半田被覆する工程とを含むことを特徴と
する半導体装置の製造方法。A method for manufacturing a semiconductor device in which the external leads of a semiconductor device mounted on a lead frame and sealed with resin are coated with molten solder, in which the external leads of the semiconductor device are separated from the lead frame and the semiconductor device is held only by double leads. a step of press-molding a lead frame so that the semiconductor device is located below the surface of the lead frame; and a step of immersing the semiconductor device in molten solder to coat the external leads with solder. A method for manufacturing a featured semiconductor device.
JP14743887A 1987-06-12 1987-06-12 Manufacture of semiconductor device Granted JPS63310147A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14743887A JPS63310147A (en) 1987-06-12 1987-06-12 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14743887A JPS63310147A (en) 1987-06-12 1987-06-12 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS63310147A true JPS63310147A (en) 1988-12-19
JPH0533828B2 JPH0533828B2 (en) 1993-05-20

Family

ID=15430338

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14743887A Granted JPS63310147A (en) 1987-06-12 1987-06-12 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS63310147A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05144987A (en) * 1991-11-20 1993-06-11 Kyocera Corp Production of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05144987A (en) * 1991-11-20 1993-06-11 Kyocera Corp Production of semiconductor device

Also Published As

Publication number Publication date
JPH0533828B2 (en) 1993-05-20

Similar Documents

Publication Publication Date Title
US4883774A (en) Silver flashing process on semiconductor leadframes
JPS63310147A (en) Manufacture of semiconductor device
JPS5827353A (en) Lead frame or semiconductor device
JPS60154650A (en) Lead frame for semiconductor device
JPS5910753Y2 (en) semiconductor equipment
JPS57114263A (en) Semiconductor device
JPH06291232A (en) Lead frame and manufacture thereof
JPS63177429A (en) Sealing method for semiconductor component
JPH01313947A (en) Sealing dies for resin sealed semiconductor device
JPH03174743A (en) Semiconductor device
JPS57148362A (en) Semiconductor device
JPH0426781B2 (en)
JPS54144873A (en) Manufacture for resin sealing semiconductor device
JPS6321862A (en) Manufacture of lead frame for ic ceramic package
JPS63107158A (en) Manufacture of semiconductor device
JPS6310553A (en) Lead frame for semiconductor device
JPS6112385B2 (en)
JPH0546986B2 (en)
JPH0637123A (en) Semiconductor device
JPH02146740A (en) Semiconductor device
JPS63197363A (en) Manufacture of semiconductor device
JPS5496367A (en) Semiconductor device
JPH0458180B2 (en)
JPH0273659A (en) Lead frame for semiconductor device
JPS6331148A (en) Lead frame for semiconductor device