JPS6329861A - Ipl control system - Google Patents

Ipl control system

Info

Publication number
JPS6329861A
JPS6329861A JP17463186A JP17463186A JPS6329861A JP S6329861 A JPS6329861 A JP S6329861A JP 17463186 A JP17463186 A JP 17463186A JP 17463186 A JP17463186 A JP 17463186A JP S6329861 A JPS6329861 A JP S6329861A
Authority
JP
Japan
Prior art keywords
ipl
volatile memory
fdd
contents
initial state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17463186A
Other languages
Japanese (ja)
Inventor
Nobuyuki Yoshida
信幸 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP17463186A priority Critical patent/JPS6329861A/en
Publication of JPS6329861A publication Critical patent/JPS6329861A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/177Initialisation or configuration control

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To omit an external switch or the like and to attain cost down by providing the titled system with a storage means and a means for using a specific I/O device as an IPL device when the contents of a non-volatile memory is in the initial state and executing IPL under control satisfying the specifications of all drives connected to the device. CONSTITUTION:A central processing unit (CPU) 1, a main memory unit (MMU) 2, a floppy disk device (FDD) 3, a magnetic disk device (HDD) 4, and a local line control mechanism (LPC) 5 are connected to a system but 6 in common. Although a device and the kind of a drive to be used for the execution of the IPL is previously stored in the non-volatile memory 7 by the CPU 1 at the time of formation of a system after turning on a power supply, an FDD 3 is selected as an IPL device when the contents of the memory 7 are in the initial state after turning on the power supply. Then, the IPL is executed under control based upon the specifications covering all the drives connected to the system. At the time of formation of the system, the non-volatile memory 7 is set up by inputting a medium including a system forming program to the FDD 3.

Description

【発明の詳細な説明】 [発明の目的コ (産業上の利用分野) 本発明は、例えばフロッピーディスク・ノ1−ドディス
ク等複数の入出力装置からIPL実行を可能とするデー
タ処理システムに用いて好適なIPL制御制御方間する
DETAILED DESCRIPTION OF THE INVENTION [Purpose of the Invention (Field of Industrial Application) The present invention is applicable to a data processing system that enables IPL execution from a plurality of input/output devices such as floppy disks and node disks. A suitable IPL control method is described below.

(従来の技術) 上記データ処理装置におけるIPL (初期プログラム
ロード)は、従来次の様な方法で行われていた。
(Prior Art) IPL (initial program load) in the data processing device has conventionally been performed in the following manner.

(リ フロッピーディスク装置から行いハードディスク
装置は関与しない。
(This is done from the re-floppy disk device and the hard disk device is not involved.

(2)原則、フロッピーディスク装置から行うが、フロ
ッピーディスクが挿入されていない場合はハードディス
ク装置から行う。
(2) In principle, it is performed from the floppy disk device, but if a floppy disk is not inserted, it is performed from the hard disk device.

上記いずれの場合も、フロッピーディスク装置に初期プ
ログラムを格納したシステムディスク以外のフロッピー
ディスクが入っているとエラーを表示して停止しオペレ
ータの介入により電源再投入時の回復操作が行われるの
が一般的であった。
In any of the above cases, if the floppy disk device contains a floppy disk other than the system disk that stores the initial program, an error will be displayed and the system will stop, and recovery operations will be performed when the power is turned on again with operator intervention. It was a target.

[発明が解決しようとする問題点] ところが、近年、システム立上げ時間の短縮のため、ハ
ードディスク装置からの初期プログラムロードの要請が
高まって来た。
[Problems to be Solved by the Invention] However, in recent years, there has been an increasing demand for initial program loading from a hard disk drive in order to shorten system startup time.

ある種の装置では、専用の切替えスイッチを持ち、この
スイッチによシ、いずれの装置から初期プログラムロー
ドを行なうか、指定を行い上記不具合を回避しているが
、この方法では、切替えスイッチの分だけハードウェア
コストが上昇するという欠点があった。本発明はこのこ
とに鑑みてなされたものであシ、上記不具合を特別なハ
ードウェアの追加なしに解消するIPL制御方式を提供
することを目的とする。
Some types of devices have a dedicated selector switch, and use this switch to specify from which device the initial program will be loaded, to avoid the above problem. However, the disadvantage was that the hardware cost increased. The present invention has been made in view of this, and it is an object of the present invention to provide an IPL control method that eliminates the above-mentioned problems without adding special hardware.

[発明の構成] (問題点を解決するための手段) 本発明は、上述した目的を実現するため、上記データ処
理システムに、不揮発性メモリと、電源投入後のIPL
をどの入出力装置から実行すべきかを不揮発性メモリに
記憶させる手段と、不揮発性メモリの内容が初期状態に
あることを認識する手段と、初期状態にあるとき特定の
入出力装置をIPL装置とする手段を設け、その装置に
接続される全てのドライブの仕様を満足した制御によシ
IPLを実行する構成とした。
[Structure of the Invention] (Means for Solving the Problems) In order to achieve the above-mentioned object, the present invention provides the data processing system with a non-volatile memory and an IPL after power-on.
means for storing in a non-volatile memory information from which input/output device should execute the process; a means for recognizing that the contents of the non-volatile memory are in an initial state; The device is configured to perform IPL under control that satisfies the specifications of all drives connected to the device.

(作用〕 上記構成において、電源投入後、どの装置のどのドライ
ブからIPLを実行するかは、システム作成時て不揮発
性メモリへ書込んでおく、不揮発性メモリが初期状態に
あるときは、例えばフロッピーディスク等、特定の入出
力デバイスを選択し、本システムに接続される全てのド
ライブをカバーした仕様の下に制御し、IPLを実行す
る。システム作成時はシステム作成用プログラムの入っ
たメディアをフロッピーディスクへ入力することによフ
不揮発性メモリのセツティングを行ない、以降はこの内
容により指定された装置のドライブ仕様に合った内容で
IPLを実行する。
(Function) In the above configuration, after the power is turned on, the IPL is executed from which drive of which device in the non-volatile memory at the time of system creation. Select a specific input/output device such as a disk, control it according to specifications that cover all drives connected to this system, and execute IPL.When creating a system, save the media containing the system creation program to a floppy disk. By inputting to the disk, the non-volatile memory is set, and from then on, IPL is executed with the contents that match the drive specifications of the specified device.

このことにより、コストダウンがはかれ、製造性・保守
性の向上がはかれる。
This reduces costs and improves manufacturability and maintainability.

(実施例) 以下、図面を使用して本発明実施例につき詳細に説明す
る。
(Example) Hereinafter, examples of the present invention will be described in detail using the drawings.

第1図は本発明の実施例を示すブロック図である。図に
おいて、1は中央処理装置(CPU)1,9は主記憶装
置(MMU )、3はフロッピーディスク装置(FDD
 )、4は磁気ディスク装置(HDD ) 。
FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, 1 is a central processing unit (CPU), 9 is a main memory unit (MMU), and 3 is a floppy disk device (FDD).
), 4 is a magnetic disk device (HDD).

5は構内回線制御機構(LPC)であり、これらは、ア
ドレス・データ・コントロールのためのラインが複数本
から成るシステムパス6に共通に接続される。
Reference numeral 5 denotes a local line control mechanism (LPC), which is commonly connected to a system path 6 comprising a plurality of lines for address/data control.

7は本発明によフ付加される不揮発性メモリ(NVM 
)である。不揮発性メモリ6にはシステム作成時CPU
 1よりどの入出力装置のどのドライブからIPLを実
行すべきかの情報が書込まれるものとする。
7 is a non-volatile memory (NVM) added according to the present invention.
). The non-volatile memory 6 contains the CPU when creating the system.
1, information on which drive of which input/output device should perform IPL is written.

以下、本発明実施例の動作について詳細に説明する。ま
ず第1図に示したシステム構成ではIPL装置としてI
PL実行可能なものが3種類ある。それぞれFDD J
 、 HDD 4 、 LPC5である。また、FDD
 3、HDD4には、更に複数種のドライブが接続可能
となっている。
Hereinafter, the operation of the embodiment of the present invention will be explained in detail. First, in the system configuration shown in Figure 1, the IPL device is
There are three types of PL execution possible. FDD J respectively
, HDD 4, and LPC 5. Also, FDD
3. Multiple types of drives can be further connected to the HDD 4.

電源投入後、どの装置のどのような種類のドライブから
IPLを実行するかについては、CPU 1があらかじ
め不揮発性メ七り7に対しシステム作成時に格納してお
くことは上述したとおりである。
As described above, the CPU 1 stores in advance the non-volatile memory 7 at the time of system creation as to which device and which type of drive is to be used for IPL after the power is turned on.

問題はシステム作成時のIPLをどのようにして実行す
るかであり、このときの不揮発性メモリ7の内容は初期
状態となっている。′或源投入後、不揮発性メモリ7の
内容が初期状態にあるときは、IPL装置としてFDD
 3を選択する。そして更に本システムに接続される全
てのドライブをカバーした仕様の下に制御しIPLを実
行する。
The problem is how to perform IPL when creating the system, and the contents of the nonvolatile memory 7 at this time are in an initial state. 'After the power is turned on, if the contents of the nonvolatile memory 7 are in the initial state, the FDD is used as an IPL device.
Select 3. Furthermore, it controls all drives connected to this system under specifications that cover them and executes IPL.

システム作成時は、システム作成用プログラムの入った
メデアt−FDD 3に入力することにより不揮発性メ
モリ7のセツティングを行い、以後は本内容により指定
された装置の接続されているドライブ仕様に合りた内容
でIPLを実行することができる。
When creating a system, the non-volatile memory 7 is set by inputting information to the media t-FDD 3 containing the system creation program, and from then on, settings are made to match the specifications of the drive connected to the device specified by this content. You can perform an IPL with the updated contents.

[発明の効果コ 以上説明の様に本発明に従えば以下に列挙する効果が得
られる。
[Effects of the Invention] As explained above, according to the present invention, the following effects can be obtained.

(1)  外部スイッチ等不要となり、コストダウンが
はかれる。
(1) External switches, etc. are not required, reducing costs.

(2)  スイッチのセツティング等不要となることに
よジ、製造性、保守性の向上がはかれる。
(2) By eliminating the need for setting switches, etc., it is possible to improve productivity, manufacturability, and maintainability.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例を示すブロック図である。 1・・・CPU、2・・・主メモリ(MMU )、3,
4.5・・・IPL装置、7・・・不揮発性メモIJ 
(NVM )。 出願人代理人 弁理土鈴 江 武 彦 第1図
FIG. 1 is a block diagram showing an embodiment of the present invention. 1...CPU, 2...Main memory (MMU), 3,
4.5...IPL device, 7...Nonvolatile memo IJ
(NVM). Applicant's agent Takehiko E, patent attorney Figure 1

Claims (1)

【特許請求の範囲】[Claims] システムに接続される複数の入出力装置からIPL実行
を可能とするデータ処理システムにおいて、不揮発性メ
モリと、電源投入後のIPLをどの入出力装置から実行
すべきかを上記不揮発性メモリに記憶させる手段と、上
記不揮発性メモリの内容が初期状態にあることを認識す
る手段と、不揮発性メモリの内容が初期状態にあるとき
は特定の出力装置をIPL装置とし、その装置に接続さ
れる全てのドライブの仕様を満足した制御によりIPL
を実行することを特徴とするIPL制御方式。
In a data processing system capable of executing IPL from a plurality of input/output devices connected to the system, a non-volatile memory and means for storing in the non-volatile memory information on which input/output device should execute IPL after power is turned on. and a means for recognizing that the contents of the non-volatile memory are in the initial state, and when the contents of the non-volatile memory are in the initial state, a specific output device is set as an IPL device, and all drives connected to that device are IPL with control that satisfies the specifications of
An IPL control method characterized by executing the following.
JP17463186A 1986-07-24 1986-07-24 Ipl control system Pending JPS6329861A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17463186A JPS6329861A (en) 1986-07-24 1986-07-24 Ipl control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17463186A JPS6329861A (en) 1986-07-24 1986-07-24 Ipl control system

Publications (1)

Publication Number Publication Date
JPS6329861A true JPS6329861A (en) 1988-02-08

Family

ID=15981969

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17463186A Pending JPS6329861A (en) 1986-07-24 1986-07-24 Ipl control system

Country Status (1)

Country Link
JP (1) JPS6329861A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0448497A2 (en) * 1990-03-22 1991-09-25 International Business Machines Corporation Power on computer initialization
EP0448495A2 (en) * 1990-03-22 1991-09-25 International Business Machines Corporation Flexible computer initialization
JPH03280126A (en) * 1990-03-29 1991-12-11 Japan Radio Co Ltd Data processor
US5261104A (en) * 1990-03-22 1993-11-09 International Business Machines Flexible computer initialization

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6172321A (en) * 1984-09-14 1986-04-14 Nec Corp Rise system of computer system
JPS61275951A (en) * 1985-05-07 1986-12-06 Panafacom Ltd Initial program load processing system
JPS62226357A (en) * 1986-03-28 1987-10-05 Mitsubishi Electric Corp Initial program loading system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6172321A (en) * 1984-09-14 1986-04-14 Nec Corp Rise system of computer system
JPS61275951A (en) * 1985-05-07 1986-12-06 Panafacom Ltd Initial program load processing system
JPS62226357A (en) * 1986-03-28 1987-10-05 Mitsubishi Electric Corp Initial program loading system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0448497A2 (en) * 1990-03-22 1991-09-25 International Business Machines Corporation Power on computer initialization
EP0448495A2 (en) * 1990-03-22 1991-09-25 International Business Machines Corporation Flexible computer initialization
US5261104A (en) * 1990-03-22 1993-11-09 International Business Machines Flexible computer initialization
JPH03280126A (en) * 1990-03-29 1991-12-11 Japan Radio Co Ltd Data processor

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