JPS63283173A - Film forming apparatus - Google Patents
Film forming apparatusInfo
- Publication number
- JPS63283173A JPS63283173A JP62119372A JP11937287A JPS63283173A JP S63283173 A JPS63283173 A JP S63283173A JP 62119372 A JP62119372 A JP 62119372A JP 11937287 A JP11937287 A JP 11937287A JP S63283173 A JPS63283173 A JP S63283173A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- film forming
- wirings
- wire
- forming apparatus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 claims abstract description 40
- 239000004065 semiconductor Substances 0.000 claims abstract description 13
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 8
- 238000000059 patterning Methods 0.000 abstract description 10
- 238000005268 plasma chemical vapour deposition Methods 0.000 abstract description 6
- 230000001105 regulatory effect Effects 0.000 abstract 2
- 238000000034 method Methods 0.000 description 13
- 238000000926 separation method Methods 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000004544 sputter deposition Methods 0.000 description 5
- 230000007423 decrease Effects 0.000 description 3
- 238000005530 etching Methods 0.000 description 2
- 239000005357 flat glass Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910001887 tin oxide Inorganic materials 0.000 description 2
- 238000003486 chemical etching Methods 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910021424 microcrystalline silicon Inorganic materials 0.000 description 1
- 229910001000 nickel titanium Inorganic materials 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000007665 sagging Methods 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- QHGNHLZPVBIIPX-UHFFFAOYSA-N tin(ii) oxide Chemical class [Sn]=O QHGNHLZPVBIIPX-UHFFFAOYSA-N 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Landscapes
- Photovoltaic Devices (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野コ
本発明は製膜装置に関する。さらに詳しくは、アモルフ
ァスシリコン系太陽電池の半導体層もしくは裏面電極を
形成する際に用いられる製膜装置であって、基板の膜形
成面に密着するよう細線のワイヤが設けられているので
、製膜と同時にパターン化を行なうことができ、パター
ニング工程を不要とし、それにより大幅なコストダウン
を図ることのできる製膜装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a film forming apparatus. More specifically, it is a film forming apparatus used to form the semiconductor layer or back electrode of an amorphous silicon solar cell, and is equipped with a thin wire so as to be in close contact with the film forming surface of the substrate. The present invention relates to a film forming apparatus that can perform patterning at the same time, eliminates the need for a patterning process, and thereby significantly reduces costs.
［従来の技術および発明が解決しようとする問題点］
従来より、集積化のためにレーザ光などのエネルキービ
ームを利用してアモルファスシリコン層や裏面電極のパ
ターン化が実施されている。[Prior Art and Problems to be Solved by the Invention] Conventionally, an amorphous silicon layer and a back electrode have been patterned using an energetic beam such as a laser beam for integration.
しかしながら、アモルファスシリコン層にレーザパター
ニングを行なうばあい、透明電極へのダメージにより太
陽電池の性能が低下したり、レーザスクライブ部分での
透明電極と裏面電極との接触抵抗が経時的に変化（抵抗
の増加）したりするなどの問題があった。また、裏面電
極のレーザバターニングは作業難度が高く、安定生産が
できないという欠点がある。したがって、エツチング法
やりフトオフ法といった他の方法を採用せざるをえず、
このばあいには処理工程の増大、生産性の低下による製
造コストの上昇および歩留りの低下という別の問題を発
生していた。さらに、前記いずれのばあいにおいても、
アモルファスシリコン層または裏面電極を形成したのち
にパターニングが行なわれるため、工程が多くなるとと
もにそれに起因して製造コストが増大していた。However, when performing laser patterning on an amorphous silicon layer, the performance of the solar cell may deteriorate due to damage to the transparent electrode, and the contact resistance between the transparent electrode and the back electrode at the laser scribe portion may change over time (resistance changes). There were problems such as an increase in Further, laser patterning of the back electrode is difficult to perform and has the disadvantage that stable production cannot be achieved. Therefore, other methods such as etching method and lift-off method have to be adopted.
In this case, other problems occurred, such as an increase in processing steps, an increase in manufacturing costs due to a decrease in productivity, and a decrease in yield. Furthermore, in any of the above cases,
Patterning is performed after forming the amorphous silicon layer or the back electrode, which increases the number of steps and increases manufacturing costs.
本発明は、前記の点に鑑み、太陽電池の性能を低下させ
ることがなく、製膜工程とパターニング工程とを同時に
行なうことのできる製膜装置を提供することを目的とす
る。In view of the above-mentioned points, an object of the present invention is to provide a film forming apparatus that can simultaneously perform a film forming process and a patterning process without deteriorating the performance of a solar cell.
［問題点を解決するための手段］
本発明の製膜装置は、アモルファスシリコン系太陽電池
の半導体層または裏面電極を形成する際に用いられる製
膜装置であって、基板を収容する本体と、基板を該本体
に一定しかつ位置決めする手段と、基板の膜形成面側に
設けられ該基板の膜形成面に実質的に密着されるべき複
数の細線のワイヤとからなることを特徴としている。[Means for Solving the Problems] The film forming apparatus of the present invention is a film forming apparatus used for forming a semiconductor layer or a back electrode of an amorphous silicon solar cell, and includes a main body that accommodates a substrate; It is characterized by comprising means for fixedly positioning the substrate on the main body, and a plurality of thin wires provided on the film-forming surface side of the substrate and to be brought into substantially close contact with the film-forming surface of the substrate.
［実施例］ つぎに図面に基づき本発明の製膜装置を説明する。[Example] Next, the film forming apparatus of the present invention will be explained based on the drawings.
第１図は基板をセットする前の本発明の製膜装置の一実
施例の平面図、第２図は第１図の製膜装置に基板をセッ
トした状態の（Ａ）−（Ａ）線拡大断面図である。Fig. 1 is a plan view of an embodiment of the film forming apparatus of the present invention before setting a substrate, and Fig. 2 is a line (A)-(A) showing the state in which a substrate is set in the film forming apparatus of Fig. 1. It is an enlarged sectional view.
以下、プラズマＣＶＤ装置に適用するばあいの本発明の
製膜装置の実施例について説明するが、本発明はプラズ
マＣＶＤ装置に限らず他のスパッタ装置、蒸着装置など
の膜形成用装置にも広く適用が可能である。Examples of the film forming apparatus of the present invention applied to plasma CVD apparatuses will be described below, but the present invention is widely applicable not only to plasma CVD apparatuses but also to other film forming apparatuses such as sputtering apparatuses and evaporation apparatuses. is possible.
第１〜２図において、（１）は半導体層および裏面電極
がその上に形成される、たとえば板ガラスからなる基板
である。この基板上には酸化スズなどからなる透明電極
がＣＶＤ法などにより形成され、そののち該透明電極は
レーザースクライブ法またはエツチング法などによって
パターン化される。In FIGS. 1 and 2, (1) is a substrate made of, for example, plate glass, on which a semiconductor layer and a back electrode are formed. A transparent electrode made of tin oxide or the like is formed on this substrate by a CVD method or the like, and then the transparent electrode is patterned by a laser scribing method, an etching method, or the like.
（′２Ｊは製膜装置の本体に取り付けるＣＶＤ ）レ一
本体であり、該トレ一本体（２）の基板（１）収容部の
上方には複数の細線のワイヤ（３）が張設されている。('2J is the main body of the CVD tray attached to the main body of the film forming apparatus, and a plurality of thin wires (3) are stretched above the substrate (1) accommodating part of the main body of the tray (2). There is.
ワイヤ（３）は一端がトレ一本体（′２Ｊに固定されて
おり、他端が張力調節ねじ（８）に固定されている。One end of the wire (3) is fixed to the tray body ('2J), and the other end is fixed to the tension adjustment screw (8).
第２図はＣｖＤトレ一本体（２）に基板（１）がセット
されている状態を示しており、ワイヤ（３）側に膜形成
面がくるようにセットされた基板（１）は、背板（４）
、ばね（５）、背板押え（６）および背板押え治具（７
）からなる固定手段によってトレ一本体Ｉ’ＺＪに固定
、位置決めされるとともにワイヤ（３）に押しつけられ
る。この押しつけは、ばね（５）の弾性力を利用して行
なわれ、これによりワイヤ（３）は膜形成面に実質的に
密着した状態に保たれる。そして、ワイヤ（３）を膜形
成面に密着させることで、プラズマＣＶＤのような廻り
込みの多い装置においても透明電極面が完全に露出した
パターンをうろことができる。Figure 2 shows the substrate (1) set on the CvD tray main body (2). Board (4)
, spring (5), back plate presser (6) and back plate presser jig (7
) is fixed and positioned on the tray main body I'ZJ and pressed against the wire (3). This pressing is performed using the elastic force of the spring (5), thereby keeping the wire (3) substantially in close contact with the film forming surface. By bringing the wire (3) into close contact with the film forming surface, it is possible to move around a pattern in which the transparent electrode surface is completely exposed even in an apparatus such as plasma CVD that involves a lot of turning.
本実施例の製膜装置では、ワイヤ（３）の一端が張力調
節ねじ（８）に固定されており、基板（１）をトレ一本
体（２）にセットする前に、またはセットしたあとに、
この張力調節ねじ（８）によりワイヤ（３）の張力を調
節することでワイヤ（３）と基板（１）の膜形成面との
密着性をより一層確実にすることができる。In the film forming apparatus of this embodiment, one end of the wire (3) is fixed to the tension adjustment screw (8), and the wire (3) is fixed to the tension adjustment screw (8) before or after setting the substrate (1) on the tray main body (2). ,
By adjusting the tension of the wire (3) using the tension adjustment screw (8), the adhesion between the wire (3) and the film-forming surface of the substrate (1) can be further ensured.
ワイヤ（３）は一種のマスクの役割を果たし、その線径
を０．０８〜２．０ｍ１１のあいだで選定することで、
パターン幅を適宜調整することができる。The wire (3) plays the role of a kind of mask, and by selecting the wire diameter between 0.08 and 2.0 m11,
The pattern width can be adjusted as appropriate.
ワイヤ（３）の材質は、とくに制限はなく、プラズマＣ
ＶＤ 、スパッタリングなどによる製膜処理に耐えうる
ちのであればどのようなものをも用いることができ、た
とえば、ピアノ線Ａ種またはＢ種、ニッケルーチタン合
金線などが用いられる。There are no particular restrictions on the material of the wire (3), and plasma C
Any material can be used as long as it can withstand film forming processes such as VD and sputtering; for example, piano wire of type A or B, nickel-titanium alloy wire, etc. are used.
また、製膜工程中の熱によるワイヤ（３）のたるみが問
題となるばあいは、すべてのワイヤに、または何本かの
ワイヤごとに、さらには各ワイヤごとに張力調整用のお
もりをワイヤ端部に取り付け、それによってワイヤ（３
）の張力を一定に保つようにすることもできる。さらに
は、調節ねじにばねを組み込むことでも、ワイヤ（３）
のテンションをある程度の範囲に保つことができる。In addition, if sagging of the wire (3) due to heat during the film forming process is a problem, add tension adjustment weights to all the wires, to each several wires, or even to each wire. attached to the end, thereby attaching the wire (3
) can also be kept constant. Furthermore, by incorporating a spring into the adjustment screw, the wire (3)
can maintain the tension within a certain range.
以上、プラズマＣＶＤ装置について述べたが同じグロー
放電装置であるスパッタリング装置においても、まった
く同様の方法で実施することができることは前記したと
おりである。また、蒸着装置では、膜の廻り込みが少な
く、同様の方法で充分実施が可能である。Although the plasma CVD apparatus has been described above, the same method can be applied to a sputtering apparatus which is also a glow discharge apparatus, as described above. In addition, in the vapor deposition apparatus, there is little wraparound of the film, and the same method can be used satisfactorily.
つぎに本発明の製膜装置を用いて膜を形成すると同時に
パターンニングを行なった実施例を示す。Next, an example will be shown in which patterning was performed at the same time as forming a film using the film forming apparatus of the present invention.
実施例１
厚さ ２．０１で大きさが１５（ｌｓｍ Ｘ ４４０ａ
ｎの青板ガラス上に６０００人の酸化スズの透明電極を
設け、この透明電極をレーザビームを用いて所定のパタ
ーンに分離した。このように゛してパターンを形成した
基板（１）を第１図に示すＣＶＤ ）レー（′２Ｊに固
定した。基板（１）の位置決めは、４カ所の基板位置決
め治具（９）によって行なった。細線のワイヤ（３）は
全部で１７本であり、線径（直径） ０．３＋ａｍの
ピアノ線８種を用いた。なお、基板（１）をＣＶＤトレ
ー（２）に固定する前に張力調節ねじ（８）によって各
ワイヤの張力を調整しておいた。基板（１）を固定した
状態を第２図に示す。Example 1 Thickness 2.01 and size 15 (lsm x 440a
A transparent electrode of 6,000 tin oxides was provided on a blue plate glass, and this transparent electrode was separated into a predetermined pattern using a laser beam. The substrate (1) on which the pattern was formed in this manner was fixed to the CVD (CVD) Ray ('2J) shown in Fig. 1.The substrate (1) was positioned using four substrate positioning jigs (9). There were 17 fine wires (3) in total, and 8 types of piano wires with a wire diameter (diameter) of 0.3+am were used.Before fixing the substrate (1) to the CVD tray (2), The tension of each wire was adjusted using the tension adjustment screw (8).The state in which the substrate (1) was fixed is shown in FIG.
基板（１）を固定した状態のＣＶＤトレー（２）をプラ
ズマＣＶＤ装置に配置し、基板温度１３０’Ｃ１圧カ１
．０Ｔｏｒｒにてｐ型アモルファスシリコンカーバイド
を１５０人、基板温度１８０”Ｃ１圧力０．５Ｔｏｒｒ
にてｉ型アモルファスシリコンを８０００人、基板温度
１８０℃、圧力１．０Ｔｏｒｒにてｎ型微結晶シリコン
を３００人形成した。そののち、ＣＶＤトレーを取り出
し、該トレーから基板をはずして、ワイヤによってマス
キングされた部分を観察した。The CVD tray (2) with the substrate (1) fixed thereon is placed in a plasma CVD apparatus, and the substrate temperature is 130'C1 and the pressure is 1.
．． 150 people using p-type amorphous silicon carbide at 0 Torr, substrate temperature 180" C1 pressure 0.5 Torr
8,000 people formed i-type amorphous silicon and 300 people formed n-type microcrystalline silicon at a substrate temperature of 180° C. and a pressure of 1.0 Torr. Thereafter, the CVD tray was taken out, the substrate was removed from the tray, and the portion masked by the wire was observed.
半導体層を分離した１７本の分離線の各々について、多
少の廻り込みが認められたものの、えられたデバイスの
性能に影響を及ぼす可能性のある廻り込みは認められな
かった。精密投影機を用いて透明電極が完全に露出して
いる部分について各分離線毎に最小のパターン幅を測定
した。Although some amount of wraparound was observed for each of the 17 separation lines that separated the semiconductor layers, no wraparound that could affect the performance of the resulting device was observed. Using a precision projector, the minimum pattern width was measured for each separation line in the part where the transparent electrode was completely exposed.
結果を第１表に示す。The results are shown in Table 1.
［以下余白］
なお、透明電極のパターン線の端部と半導体層の分離線
の透明電極パターン線に近い方の端部との間隔は約１５
０遍であった。[Margins below] Note that the distance between the end of the pattern line of the transparent electrode and the end of the separation line of the semiconductor layer closer to the transparent electrode pattern line is approximately 15 mm.
It was 0 times.
こうしてえられた半導体分離基板を半導体面をワイヤ側
にして第１図と同方式のスパッタトレーに固定した。こ
のスパッタトレーでは、１７本のワイヤはそれぞれ第１
図に示すワイヤに対して直角方向に０．２５ａｕ＋＋だ
けずれた位置にあるように配置した。さらに、ワイヤの
線径を０．２１に設定した。なお、基板をスパッタトレ
ーに固定する前に、調節ねじによって各ワイヤの張力を
調整しておいた。The semiconductor separation substrate thus obtained was fixed on a sputtering tray of the same type as shown in FIG. 1 with the semiconductor surface facing the wire. In this sputter tray, each of the 17 wires is
The wires were arranged so as to be offset by 0.25 au++ perpendicularly to the wires shown in the figure. Furthermore, the diameter of the wire was set to 0.21. Note that before fixing the substrate to the sputter tray, the tension of each wire was adjusted using adjustment screws.
つぎに、基板をセットしたトレーをマグネトロンスパッ
タ装置に配置し、Ａ「圧力を６Ｘ１０−３Ｔｏｒｒに調
整し、基板温度８０℃にて、５ｏｏｏ人の厚さのＮを形
成した。そののち、基板を取り出し、裏面電極のＮの分
離線を前述の方法で測定した。Next, the tray with the substrate set thereon was placed in a magnetron sputtering device, the A pressure was adjusted to 6X10-3 Torr, and a N film with a thickness of 5 mm was formed at a substrate temperature of 80°C. The sample was taken out, and the N separation line on the back electrode was measured using the method described above.
Ｎがマスキングされ完全に半導体層が露出している部分
の最小パターン幅を各分離線毎に第２表に示す。Table 2 shows the minimum pattern width of the portion where N is masked and the semiconductor layer is completely exposed for each separation line.
第２表に示すように、裏面電極の分離が不完全な部分も
なく、良好な結果かえられた。As shown in Table 2, there were no parts where the back electrode was incompletely separated, and good results were obtained.
以」−のようにしてえられた太陽電池の性能をＡＭ−１
，５近似のパルスシミュレーターで測定した。結果を第
３表に示す。The performance of the solar cell obtained as follows is AM-1.
, 5 approximation pulse simulator. The results are shown in Table 3.
第 ３ 表
比較例
実施例と同様にして透明電極をパターン化した基板を、
細線のワイヤが配置されていないという点を除いて第１
図と同様のＣＶＤトレーにセットし、はぼ全面に実施例
と同様の条件で半導体層を形成した。半導体層の分離は
ＹＡＧレーザを用いて行なった。また、Ｎのスパッタリ
ングについても細線のワイヤは使用せず、はぼ全面に実
施例と同様の条件で裏面電極を形成し、そののちＮの分
離を化学エツチングにより行なった。Table 3 Comparative Examples A substrate patterned with transparent electrodes in the same manner as in the example was
The first except that the thin wire is not placed.
It was set in the same CVD tray as shown in the figure, and a semiconductor layer was formed on almost the entire surface under the same conditions as in the example. Separation of the semiconductor layer was performed using a YAG laser. Further, for N sputtering, a thin wire was not used, but a back electrode was formed on almost the entire surface under the same conditions as in the example, and then N was separated by chemical etching.
えられた太陽電池の性能を実施例と同様の方二で測定し
た。測定結果を第３表に示す。The performance of the obtained solar cell was measured in the same manner as in the example. The measurement results are shown in Table 3.
：発明の効果コ
以１４説明したとおり、本発明の製膜装置にょ半導体層
などの製膜をするときは、レーザな゛によりパターニン
グをする必要がないので太ｉ電池の性能の低下が防止で
きるとともに、製−７工程とバターニング工程とを同時
に行なうことができるので工程が簡略化され、それによ
り太陽電池の製造コストをダウンさせることができると
いう効果を奏することができる。:Effects of the Invention As explained in 14 below, when forming a film such as a semiconductor layer using the film forming apparatus of the present invention, there is no need for patterning using a laser, so it is possible to prevent a decline in the performance of thick i-cells. In addition, since the manufacturing step and the patterning step can be performed at the same time, the steps can be simplified and the manufacturing cost of the solar cell can be reduced.
第１図は基板をセットする前の本発明の製膜装置の一実
施例の平面図、第２図は第１図の製膜装置に基板をセッ
トした状態の（Ａ）−（Ａ）線拡大断面図である。
（図面の主要符号）
（１）二基板
（２） 二 〇ｖＤ ト し −（３）：ワ
イヤ
（８）：張力調節ねじFig. 1 is a plan view of an embodiment of the film forming apparatus of the present invention before setting a substrate, and Fig. 2 is a line (A)-(A) showing the state in which a substrate is set in the film forming apparatus of Fig. 1. It is an enlarged sectional view. (Main symbols in the drawing) (1) Two boards (2) 20vD - (3): Wire (8): Tension adjustment screw
Claims (1)
裏面電極を形成する際に用いられる製膜装置であって、
基板を収容する本体と、基板を該本体に固定しかつ位置
決めする手段と、基板の膜形成面側に設けられ該基板の
膜形成面に実質的に密着されるべき複数の細線のワイヤ
とからなることを特徴とする製膜装置。 ２ 前記ワイヤの張力を調整する機構が設けられてなる
ことを特徴とする特許請求の範囲第１項記載の装置。 ３ 前記ワイヤの線径が０．０８〜２．０ｍｍであるこ
とを特徴とする特許請求の範囲第１項または第２項記載
の装置。[Claims] 1. A film forming apparatus used for forming a semiconductor layer or a back electrode of an amorphous silicon solar cell, comprising:
A main body for accommodating a substrate, a means for fixing and positioning the substrate to the main body, and a plurality of thin wires provided on the film forming surface side of the substrate and to be substantially in close contact with the film forming surface of the substrate. A film forming apparatus characterized by: 2. The device according to claim 1, further comprising a mechanism for adjusting the tension of the wire. 3. The device according to claim 1 or 2, wherein the wire has a wire diameter of 0.08 to 2.0 mm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62119372A JPS63283173A (en) | 1987-05-15 | 1987-05-15 | Film forming apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62119372A JPS63283173A (en) | 1987-05-15 | 1987-05-15 | Film forming apparatus |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63283173A true JPS63283173A (en) | 1988-11-21 |
| JPH0533833B2 JPH0533833B2 (en) | 1993-05-20 |
Family
ID=14759875
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62119372A Granted JPS63283173A (en) | 1987-05-15 | 1987-05-15 | Film forming apparatus |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63283173A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04116925A (en) * | 1990-09-07 | 1992-04-17 | Kanegafuchi Chem Ind Co Ltd | Method for forming patterning thin film and substrate-retention tool used for it |
| JP2012532457A (en) * | 2009-06-30 | 2012-12-13 | エルジー イノテック カンパニー リミテッド | Photovoltaic power generation apparatus and manufacturing method thereof |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5123444B2 (en) * | 2000-09-08 | 2013-01-23 | 独立行政法人産業技術総合研究所 | Manufacturing method of solar cell |
-
1987
- 1987-05-15 JP JP62119372A patent/JPS63283173A/en active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04116925A (en) * | 1990-09-07 | 1992-04-17 | Kanegafuchi Chem Ind Co Ltd | Method for forming patterning thin film and substrate-retention tool used for it |
| JP2012532457A (en) * | 2009-06-30 | 2012-12-13 | エルジー イノテック カンパニー リミテッド | Photovoltaic power generation apparatus and manufacturing method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0533833B2 (en) | 1993-05-20 |
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