JPS63276257A - Manufacture of multilayer board for carrying ic chip - Google Patents
Manufacture of multilayer board for carrying ic chipInfo
- Publication number
- JPS63276257A JPS63276257A JP62110627A JP11062787A JPS63276257A JP S63276257 A JPS63276257 A JP S63276257A JP 62110627 A JP62110627 A JP 62110627A JP 11062787 A JP11062787 A JP 11062787A JP S63276257 A JPS63276257 A JP S63276257A
- Authority
- JP
- Japan
- Prior art keywords
- chip
- multilayer
- adhesive sheet
- board
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 230000001070 adhesive effect Effects 0.000 claims abstract description 33
- 239000000853 adhesive Substances 0.000 claims abstract description 32
- 238000000034 method Methods 0.000 claims abstract description 29
- 238000003475 lamination Methods 0.000 claims description 17
- 238000000465 moulding Methods 0.000 claims description 17
- 239000011342 resin composition Substances 0.000 claims description 13
- 239000004643 cyanate ester Substances 0.000 claims description 11
- 239000003054 catalyst Substances 0.000 claims description 10
- 239000000463 material Substances 0.000 claims description 10
- 229920001225 polyester resin Polymers 0.000 claims description 8
- 239000004645 polyester resin Substances 0.000 claims description 8
- 229920006395 saturated elastomer Polymers 0.000 claims description 8
- 229920001169 thermoplastic Polymers 0.000 claims description 8
- 239000004416 thermosoftening plastic Substances 0.000 claims description 8
- 229920001187 thermosetting polymer Polymers 0.000 claims description 7
- 239000013013 elastic material Substances 0.000 claims description 5
- 230000003014 reinforcing effect Effects 0.000 claims description 5
- 229920005989 resin Polymers 0.000 abstract description 29
- 239000011347 resin Substances 0.000 abstract description 29
- 230000015572 biosynthetic process Effects 0.000 abstract description 4
- 238000011109 contamination Methods 0.000 abstract description 3
- 239000010410 layer Substances 0.000 description 28
- 239000004744 fabric Substances 0.000 description 10
- 239000000758 substrate Substances 0.000 description 10
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 9
- 229920000954 Polyglycolide Polymers 0.000 description 8
- 239000004033 plastic Substances 0.000 description 8
- 229920003023 plastic Polymers 0.000 description 8
- 235000010409 propane-1,2-diol alginate Nutrition 0.000 description 8
- ZWEHNKRNPOVVGH-UHFFFAOYSA-N 2-Butanone Chemical compound CCC(C)=O ZWEHNKRNPOVVGH-UHFFFAOYSA-N 0.000 description 7
- 239000011521 glass Substances 0.000 description 7
- 238000002156 mixing Methods 0.000 description 7
- 239000000203 mixture Substances 0.000 description 7
- 229920002379 silicone rubber Polymers 0.000 description 7
- 239000004945 silicone rubber Substances 0.000 description 7
- 230000007547 defect Effects 0.000 description 6
- 229910052802 copper Inorganic materials 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 238000007747 plating Methods 0.000 description 5
- 239000000126 substance Substances 0.000 description 5
- 239000004593 Epoxy Substances 0.000 description 4
- ATUOYWHBWRKTHZ-UHFFFAOYSA-N Propane Chemical compound CCC ATUOYWHBWRKTHZ-UHFFFAOYSA-N 0.000 description 4
- 239000004020 conductor Substances 0.000 description 4
- 239000011889 copper foil Substances 0.000 description 4
- XLJMAIOERFSOGZ-UHFFFAOYSA-M cyanate Chemical compound [O-]C#N XLJMAIOERFSOGZ-UHFFFAOYSA-M 0.000 description 4
- 239000000835 fiber Substances 0.000 description 4
- 125000000524 functional group Chemical group 0.000 description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 239000002966 varnish Substances 0.000 description 4
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 3
- YXFVVABEGXRONW-UHFFFAOYSA-N Toluene Chemical compound CC1=CC=CC=C1 YXFVVABEGXRONW-UHFFFAOYSA-N 0.000 description 3
- 239000012790 adhesive layer Substances 0.000 description 3
- 125000001651 cyanato group Chemical group [*]OC#N 0.000 description 3
- 230000032798 delamination Effects 0.000 description 3
- 230000006866 deterioration Effects 0.000 description 3
- 238000001035 drying Methods 0.000 description 3
- 239000003822 epoxy resin Substances 0.000 description 3
- 239000011229 interlayer Substances 0.000 description 3
- 239000002648 laminated material Substances 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 238000013508 migration Methods 0.000 description 3
- 230000005012 migration Effects 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- 239000010453 quartz Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 2
- -1 alicyclic diol Chemical class 0.000 description 2
- 125000001931 aliphatic group Chemical group 0.000 description 2
- IISBACLAFKSPIT-UHFFFAOYSA-N bisphenol A Chemical compound C=1C=C(O)C=CC=1C(C)(C)C1=CC=C(O)C=C1 IISBACLAFKSPIT-UHFFFAOYSA-N 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000007667 floating Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 150000001451 organic peroxides Chemical class 0.000 description 2
- 229920000728 polyester Polymers 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 239000001294 propane Substances 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 150000003839 salts Chemical class 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- CHJMFFKHPHCQIJ-UHFFFAOYSA-L zinc;octanoate Chemical compound [Zn+2].CCCCCCCC([O-])=O.CCCCCCCC([O-])=O CHJMFFKHPHCQIJ-UHFFFAOYSA-L 0.000 description 2
- RYHBNJHYFVUHQT-UHFFFAOYSA-N 1,4-Dioxane Chemical compound C1COCCO1 RYHBNJHYFVUHQT-UHFFFAOYSA-N 0.000 description 1
- XQUPVDVFXZDTLT-UHFFFAOYSA-N 1-[4-[[4-(2,5-dioxopyrrol-1-yl)phenyl]methyl]phenyl]pyrrole-2,5-dione Chemical compound O=C1C=CC(=O)N1C(C=C1)=CC=C1CC1=CC=C(N2C(C=CC2=O)=O)C=C1 XQUPVDVFXZDTLT-UHFFFAOYSA-N 0.000 description 1
- 229920000049 Carbon (fiber) Polymers 0.000 description 1
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 1
- OFOBLEOULBTSOW-UHFFFAOYSA-N Malonic acid Chemical compound OC(=O)CC(O)=O OFOBLEOULBTSOW-UHFFFAOYSA-N 0.000 description 1
- 229920000459 Nitrile rubber Polymers 0.000 description 1
- CTQNGGLPUBDAKN-UHFFFAOYSA-N O-Xylene Chemical compound CC1=CC=CC=C1C CTQNGGLPUBDAKN-UHFFFAOYSA-N 0.000 description 1
- XSTXAVWGXDQKEL-UHFFFAOYSA-N Trichloroethylene Chemical group ClC=C(Cl)Cl XSTXAVWGXDQKEL-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 238000004026 adhesive bonding Methods 0.000 description 1
- 239000004760 aramid Substances 0.000 description 1
- 229920003235 aromatic polyamide Polymers 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 125000003118 aryl group Chemical group 0.000 description 1
- 239000004917 carbon fiber Substances 0.000 description 1
- 125000003178 carboxy group Chemical group [H]OC(*)=O 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000003085 diluting agent Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 238000005470 impregnation Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 150000002736 metal compounds Chemical class 0.000 description 1
- 229910021645 metal ion Inorganic materials 0.000 description 1
- 239000004745 nonwoven fabric Substances 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 229920002857 polybutadiene Polymers 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
- 238000002791 soaking Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- BFKJFAAPBSQJPD-UHFFFAOYSA-N tetrafluoroethene Chemical group FC(F)=C(F)F BFKJFAAPBSQJPD-UHFFFAOYSA-N 0.000 description 1
- 229920005992 thermoplastic resin Polymers 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- UBOXGVDOUJQMTN-UHFFFAOYSA-N trichloroethylene Natural products ClCC(Cl)Cl UBOXGVDOUJQMTN-UHFFFAOYSA-N 0.000 description 1
- 239000002759 woven fabric Substances 0.000 description 1
- 239000008096 xylene Substances 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、ＩＣチップ搭載用多層板の製造法であり、多
層化用の低流動性接着シートからの樹脂流れによる内層
用プリント配線板に形成された端子部の汚れからの保護
を信頼性よく達成したものであり、特に好ましい態様に
おいては、耐マイグレーション性（高湿度下、配線導体
間の絶縁が導体金属イオンの拡散により破壊される現象
）が生じ難く、また耐水蒸気性の優れた多層板を提供す
るものである。[Detailed Description of the Invention] [Industrial Application Field] The present invention is a method for manufacturing a multilayer board for mounting an IC chip, and is a method for manufacturing a multilayer board for mounting an IC chip. It reliably protects the formed terminal from dirt, and in a particularly preferred embodiment, it has migration resistance (a phenomenon in which the insulation between wiring conductors is destroyed by the diffusion of conductor metal ions under high humidity). ) and provides a multilayer board with excellent water vapor resistance.
ＩＣチップ搭載用の多層板、例えば、多層ピン・グリッ
ド・アレイ （多層ＰＧＡ）の基板としてはセラミック
スが使用されている。しかし、セラミックスは耐衝撃性
に劣り、誘電率が高く、加工性に劣るなどの問題がある
。しかも、急速に高密度化しているＩＣチップを搭載す
る必要性から、現在はより低誘電率で、加工が簡便でよ
り低価格のものが要求されている。Ceramics are used as substrates for multilayer boards for mounting IC chips, such as multilayer pin grid arrays (multilayer PGAs). However, ceramics have problems such as poor impact resistance, high dielectric constant, and poor workability. Moreover, because of the need to mount IC chips, which are rapidly increasing in density, there is now a demand for lower dielectric constants, easier processing, and lower costs.
又、プラスチック製の両面板を使用してプラスチック両
面ＰＧＡ基板が製造されているが、加工性の点から、ピ
ン数を１５０以上とした場合には、線巾及び線間間隔を
より狭くすることが必須となる為、不良が発生し易いと
いう問題点があった。Also, plastic double-sided PGA boards are manufactured using plastic double-sided boards, but from the viewpoint of processability, when the number of pins is set to 150 or more, the line width and the line spacing must be narrower. Since this is essential, there is a problem in that defects are likely to occur.
この不良の発生の低減策として、多層化する方法がある
が、公知の低流動性の多層化用接着シートは、耐マイグ
レーション性に劣り、耐水蒸気性も不十分であるという
実用上の問題がある。さらに、この低流動性の多層化用
接着シートの樹脂流れを１００ρ以下にすると、プリン
ト配線金属箔（通常は銅箔）の間に樹脂が充分に充填さ
れず、ボイドや層間密着不良が生じるという問題が生じ
、逆に、樹脂流れを必要充分に設定した場合には端子部
先端まで樹脂が流れて端子部を汚染し、ワイヤボンディ
ング不良が発生するという問題点が生じるものである。One way to reduce the occurrence of defects is to use multiple layers, but known low-flow multilayer adhesive sheets have practical problems such as poor migration resistance and insufficient water vapor resistance. be. Furthermore, if the resin flow of this low-flow adhesive sheet for multilayering is lower than 100ρ, the resin will not be sufficiently filled between the printed wiring metal foils (usually copper foils), resulting in voids and poor interlayer adhesion. On the other hand, if the resin flow is set to a sufficient level, the resin will flow to the tip of the terminal portion, contaminating the terminal portion, and causing wire bonding defects.
この解決策として従来は、プリント配線銅箔間隙に樹脂
を予め充填したプリント配線板を使用し樹脂流れを１０
０−以下の低流動性の多層化用接着シートで多層化する
方法がとられていたが、工程面で不利となる。また、積
層成形時の大部分の空気の熱膨張・収縮、真空成形した
後の大気圧による圧縮によって多層板のベース基板が内
側に凹む現象が生じることがあった。Conventionally, as a solution to this problem, a printed wiring board with resin filled in the gaps between the printed wiring copper foils was used, and the resin flow was reduced by 10 minutes.
A method of multilayering using a multilayer adhesive sheet with low fluidity of 0- or less has been used, but this is disadvantageous in terms of process. In addition, the base substrate of the multilayer board may dent inward due to thermal expansion and contraction of most of the air during lamination molding and compression due to atmospheric pressure after vacuum molding.
本発明は、上記の問題点を解決する方法について鋭意検
討した結果、多層化積層成形時に、内層の端子部形成空
間に、耐熱性の弾性体を入れることにより端子部の樹脂
による汚染を完全に防止するとともに積層成形時に積層
板に発生する凹みなどを防止する方法を見出し、これに
基づいて完成したものである。As a result of intensive studies on methods to solve the above problems, the present invention has been developed to completely prevent contamination of the terminal portion by resin by inserting a heat-resistant elastic body into the terminal forming space of the inner layer during multilayer lamination molding. We discovered a method to prevent the occurrence of dents in laminate plates during lamination molding, and based on this, we completed the process.
すなわち、本発明は、少なくともＩＣチップ接続用の端
子部を内層にもった多層板の製造法において、所定位置
に所定の大きさの孔を形成した多層化積層接着用の低流
動性接着シート又は所望組みの該低流動性接着シート及
びＩＣチップ搭載用の穴及び接続用の端子部を有する内
層用プリント配線板を配置して形成される穴或いは空間
部（以下「穴或いは空間部」という）に、該穴或いは空
間部と同一もしくはやや小さめの耐熱性の弾性体材料を
入れた構成として多層化積層成形することを特徴とする
ＩＣチップ搭載用多層板の製造法であり、好ましい実施
態様においては、該低流動性接着シートが、（ａ）多官
能性シアン酸エステル樹脂組成物、（ｂ）実質的に非結
晶性の熱可塑性飽和ポリエステル樹脂及び（ｃ）硬化触
媒を必須成分とする熱硬化性樹脂組成物のシート若しく
はフィルム又は該熱硬化性樹脂組成物を補強基材に含浸
・乾燥してＢ−ｓｔａｇｅ化してなるものを用いること
、更に多層化積層成形を１００ｍｍ１ｇ以下の減圧状態
で行うことを特徴とするものである。That is, the present invention relates to a method for manufacturing a multilayer board having at least a terminal portion for connecting an IC chip in an inner layer, and a method for manufacturing a multilayer board having holes of a predetermined size at predetermined positions or a low-flow adhesive sheet for multilayer lamination adhesive. A hole or space formed by arranging a desired combination of the low-flow adhesive sheet and an inner layer printed wiring board having a hole for mounting an IC chip and a terminal for connection (hereinafter referred to as "hole or space") A method for producing a multilayer board for mounting an IC chip, characterized in that the hole or space is filled with a heat-resistant elastic material that is the same as or slightly smaller than the hole or space, and then multilayer laminated molding is performed, and in a preferred embodiment, The low-fluidity adhesive sheet is a thermal adhesive sheet containing (a) a polyfunctional cyanate ester resin composition, (b) a substantially non-crystalline thermoplastic saturated polyester resin, and (c) a curing catalyst. Use a sheet or film of a curable resin composition, or a sheet or film obtained by impregnating a reinforcing base material with the thermosetting resin composition and drying it to form a B-stage; It is characterized by the fact that
以下、本発明の構成について説明する。The configuration of the present invention will be explained below.
本発明のＩＣチップ搭載用の多層板（以下、単に「本多
層板」という）とは、ＩＣチップの搭載用の穴部とその
穴周囲に搭載するＩＣチップとの接続用の通常金メッキ
された端子部を形成してなる中間層を少なくとも１層有
する多層板であり、スルーホールメッキによる層間の配
線、多数のピンを立てた所謂「ピン・グリッド・アレイ
」などを含むものである。The multilayer board for mounting an IC chip of the present invention (hereinafter simply referred to as "this multilayer board") is a hole for mounting an IC chip and a hole for connecting the IC chip mounted around the hole, which is usually gold-plated. It is a multilayer board that has at least one intermediate layer that forms a terminal part, and includes interlayer wiring by through-hole plating, a so-called "pin grid array" with many pins, etc.
本多層板の製造工程は、通常の多層化積層成形方法が使
用され、例えば、両面銅張積層板の片面に公知方法で端
子部を含む配線網又はＩＣチップ搭載部若しくはＩＣチ
ップ搭載用の穴を掘り込んでなり、他面に所望の配線網
を形成してなるプリント配線板（以下「配線基板Ｉ」と
いう）、所望の孔及び端子部を含む配線網を形成した内
層用並びに外層用の片面或いは両面銅張積層板（以下「
基板■」という）及び所望の孔を形成した接着シーｌ−
Ｉを準備し、配線基板■に基板■を接着シートＩを介し
て位置合わせして所望の組数重ね、穴或いは空間部に耐
熱性の弾性体を入れ一回の積層成形により多層板とする
方法；両面銅張積層板の片面に公知方法で端子部を含む
配線網又はＩＣチツブ搭載部若しくはＩＣチップ搭載部
に穴を掘り込んでなり、他面は未処理銅箔の基板（以下
「基板■」という）、所望の孔及び端子部を含む配線網
を形成した内層用の片面或いは両面銅張積層板（以下「
内層板」という）、片面銅張積層板或いは両面銅張積層
板の片面のみに配線網を形成した外層用積層板（以下「
外層板」という）及び所望の孔を形成した接着シートＩ
を準備し、基板Ｉに内層板及び接着シー）１を介して位
置合わせして重ね、穴或いは空間部に耐熱性の弾性体を
入れ、゛さらに外層板を位置合わせして重ね積層成形に
より多層板とする方法などである。In the manufacturing process of this multilayer board, a normal multilayer lamination molding method is used. For example, a wiring network including a terminal part, an IC chip mounting part, or a hole for mounting an IC chip is formed on one side of the double-sided copper-clad laminate using a known method. A printed wiring board (hereinafter referred to as "wiring board I") formed by digging a hole and forming a desired wiring network on the other side, an inner layer and an outer layer having a wiring network including desired holes and terminals. Single-sided or double-sided copper-clad laminate (hereinafter referred to as “
(referred to as "substrate") and an adhesive seal with desired holes formed therein.
Prepare the board (I), align the board (■) to the wiring board (■) via the adhesive sheet (I), stack the desired number of sets, insert a heat-resistant elastic material into the hole or space, and form a multilayer board by one lamination molding. Method: Holes are dug in one side of a double-sided copper-clad laminate by a known method for the wiring network including the terminal part, the IC chip mounting part, or the IC chip mounting part, and the other side is made of an untreated copper foil substrate (hereinafter referred to as "substrate"). ■), one-sided or double-sided copper-clad laminate (hereinafter referred to as "
(hereinafter referred to as "inner layer board"), single-sided copper-clad laminate or double-sided copper-clad laminate with wiring network formed only on one side (hereinafter referred to as "outer layer laminate")
(referred to as "outer layer plate") and adhesive sheet I with desired holes formed therein.
Prepare the substrate I by aligning and overlapping the inner layer plate and the adhesive sheet 1, inserting a heat-resistant elastic material into the hole or space, and then aligning and overlapping the outer layer plate to form a multilayer structure by lamination molding. For example, it can be made into a board.
本発明において、穴或いは空間部に入れる耐熱性の弾性
体としては、多層化積層成形条件下にガスその他の有害
物を発生せず、かつ多層化用の低流動性接着シートとの
接着性の悪いものであれば特に限定はなく、例えば、シ
リコンゴム、ＮＢＲ、ポリブタジェン系ゴム、その他が
例示され、特に、シリコンゴムが好適である。またこれ
らの弾性体としては、予めこれらを所定の寸法に裁断し
たチップの形で通常は使用するが、特にこれは限定され
るものではなく、常温で液状の樹脂液として調製し、穴
或いは空間部にながしこみ、常温或いは加温下に適宜紫
外線などを照射して硬化させてなるものでもよい。この
場合、積層材料間に液状の樹脂液が流れ込むことを避け
るために、予め位置合わせした積層材料を短時間、低圧
プレスして一体化したものを使用するのがよい。In the present invention, the heat-resistant elastic material to be inserted into the hole or space is one that does not generate gas or other harmful substances under multilayer lamination molding conditions and has good adhesive properties with the low-flow adhesive sheet for multilayering. There is no particular limitation as long as it is bad, and examples thereof include silicone rubber, NBR, polybutadiene rubber, and others, with silicone rubber being particularly preferred. In addition, these elastic bodies are usually used in the form of chips cut into predetermined dimensions, but this is not particularly limited. They are prepared as a liquid resin at room temperature, and are used to fill holes or spaces. It may be formed by soaking it in a portion and curing it by appropriately irradiating it with ultraviolet rays or the like at room temperature or under heating. In this case, in order to prevent the liquid resin from flowing between the laminated materials, it is preferable to use a material that has been aligned in advance and pressed under low pressure for a short period of time to be integrated.
本多層板に使用するプリント配線板用の積層板としては
、ガラス繊維、石英繊維、全芳香族ポリアミド、ポリイ
ミド、セミカーボン繊維などの単独もしくは混合使用し
てなる不織布や織布強化の従来の両面又は片面金属箔張
積層板であれば何れも使用可能であるが、具体的にはガ
ラス布エポキシ積層板、耐熱性ガラス布エポキシ積層板
、石英繊維布エポキシ積層板、ガラス布シアン酸エステ
ル系樹脂積層板（三菱瓦斯化学側製、ＣＣＬ−Ｉ＋ ８
００゜ＣＣＬ−Ｈ８３０，ＣＣＬ−Ｈ８７０他）、石英
繊維布シアン酸エステル系樹脂積層板、ガラス布ポリイ
ミド系積層板などの熱硬化樹脂系の積層板および高耐熱
性の熱可塑性樹脂系の積層板が例示される。The laminates for printed wiring boards used in this multilayer board include conventional double-sided nonwoven fabrics or woven fabrics reinforced with glass fibers, quartz fibers, wholly aromatic polyamides, polyimides, semi-carbon fibers, etc., used alone or in combination. Alternatively, any one-sided metal foil-clad laminate can be used, but specifically, glass cloth epoxy laminate, heat-resistant glass cloth epoxy laminate, quartz fiber cloth epoxy laminate, glass cloth cyanate ester resin. Laminated board (manufactured by Mitsubishi Gas Chemical, CCL-I+ 8
00゜CCL-H830, CCL-H870, etc.), thermosetting resin-based laminates such as quartz fiber cloth cyanate ester-based resin laminates, glass cloth polyimide-based laminates, and highly heat-resistant thermoplastic resin-based laminates is exemplified.
本発明の多層化接着用の低流動性接着シートとしては、
通常の多層化用接着シートの場合には樹脂流れが０．０
５〜３ ｍｍの範囲のものが好適に使用可能である。樹
脂流れが少なすぎると基板との密着性が悪く、銅箔で形
成した配線導体間への樹脂の充填が不十分となり、逆に
樹脂流れが大きすぎると樹脂が前記で説明した弾性体と
基板及び外層板との間を流れて端子部を汚染することと
なる。The low fluidity adhesive sheet for multilayer adhesive of the present invention includes:
In the case of a normal multilayer adhesive sheet, the resin flow is 0.0
Thicknesses in the range of 5 to 3 mm can be suitably used. If the resin flow is too small, the adhesion with the board will be poor, and the resin will not be sufficiently filled between the wiring conductors formed of copper foil.On the other hand, if the resin flow is too large, the resin will bond with the elastic body and the board as explained above. and the outer layer plate, contaminating the terminal section.
このような特性の他に、密着性、接着性、その他の物性
面から本発明においては、（ａ）多官能性シアン酸エス
テル樹脂組成物、ら）実質的に非結晶性の熱可塑性飽和
ポリエステル樹脂及び（ｃ）硬化触媒を必須成分とする
熱硬化性樹脂組成物のシートもしくはフィルム又は該熱
硬化性樹脂組成物を補強基材に含浸・乾燥して１３１３
−５ｔａ化してなるもの（特開昭６０−１９２７７９
、同６０−２３３１７５に記載）が好ましい。ここに、
樹脂成分（ａ）である多官能性シアン酸エステル樹脂組
成物とは、シアナト基を有する多官能性シアン酸エステ
ル、そのプレポリマー等を必須成分としてなるものであ
り、シアナト樹脂く特公昭４１−１９２８ 、同４５−
１１７１２、同４４−１２２２ 、ＤＥ−１、１９０，
１８４等）、シアン酸エステル−マレイミド樹脂、シア
ン酸エステル−マレイミド−エポキシ樹脂（特公昭５４
−３０４４０． 同５２−３１２７９、ＵＳＰ−４，１
１０，３６４等）、シアン酸エステル−エポキシ樹脂（
特公昭４６−４１１１２）などで代表されるものである
。又、ら）成分の実質的に非結晶性の熱可塑性飽和ポリ
エステル樹脂とは、芳香族乃至脂肪族のジカルボン酸と
脂肪族乃至脂環族のジオール若しくはそのプレポリマー
とを主成分として重縮合させてなるものである。本発明
においては、通常、末端官能基数より算出される数平均
分子量が１．５００〜２５．０００、好ましくは５．０
００〜２２．０００のものが相溶性などより好ましい。In addition to these properties, in view of adhesion, adhesion, and other physical properties, the present invention uses (a) a polyfunctional cyanate ester resin composition, and (a) a substantially non-crystalline thermoplastic saturated polyester. A sheet or film of a thermosetting resin composition containing a resin and (c) a curing catalyst as essential components, or a reinforcing base material is impregnated with the thermosetting resin composition and dried. 1313
-5ta version (Japanese Unexamined Patent Publication No. 1987-192779
, 60-233175) is preferred. Here,
The polyfunctional cyanate ester resin composition, which is the resin component (a), is composed of a polyfunctional cyanate ester having a cyanato group, a prepolymer thereof, etc. as essential components, and is a polyfunctional cyanate ester resin composition having a cyanato group. 1928, 45-
11712, 44-1222, DE-1, 190,
184, etc.), cyanate ester-maleimide resin, cyanate ester-maleimide-epoxy resin (Japanese Patent Publication No. 54
-30440. 52-31279, USP-4,1
10,364 etc.), cyanate ester-epoxy resin (
This is typified by the Special Publication No. 46-41112). In addition, the substantially non-crystalline thermoplastic saturated polyester resin of component (3) is a resin obtained by polycondensing an aromatic or aliphatic dicarboxylic acid and an aliphatic or alicyclic diol or a prepolymer thereof as main components. That's what happens. In the present invention, the number average molecular weight calculated from the number of terminal functional groups is usually 1.500 to 25.000, preferably 5.0.
00 to 22,000 is preferable in terms of compatibility.
また、水酸基価が１〜３０ｍｇ４０１１／ｇのものが好
適である。これは、該ポリエステル樹脂に遊離の水酸基
もしくはカルボキシル基が過剰に有った場合には、これ
らの基と（ａ）成分のシアナト基とが徐々に常温におい
ても反応し、組成物の保存安定性が劣ることとなるため
である。又、結晶性は低い程好ましく、用いる酸および
アルコール成分の種類および使用量比を選択されるもの
である。かかる実質的に非結晶性の熱可塑性飽和ポリエ
ステル樹脂としては、日本合成化学工業側から商品名「
ポリエスタ−」として市販されているものが好適である
。更に、（ｃ）硬化触媒としてはシアン酸エステル系樹
脂組成物に公知のものであればいずれも使用可能である
が、特に有機過酸化物や有機金属塩、金属キレートなど
有機の金属化合物が好適である。Further, those having a hydroxyl value of 1 to 30 mg4011/g are suitable. This is because if the polyester resin has an excess of free hydroxyl groups or carboxyl groups, these groups and the cyanato groups of component (a) will gradually react even at room temperature, resulting in poor storage stability of the composition. This is because it will be inferior. Further, the lower the crystallinity, the better, and the type and amount ratio of the acid and alcohol components to be used are selected. Such substantially non-crystalline thermoplastic saturated polyester resin is available from Nippon Gosei Chemical Industry under the trade name "
Preferred are those commercially available as "Polyester". Furthermore, as the curing catalyst (c), any known catalyst for cyanate ester resin compositions can be used, but organic metal compounds such as organic peroxides, organic metal salts, and metal chelates are particularly suitable. It is.
上記した成分（ａ）と成分（ｂ）との配合比率は、特に
限定のないものであるが、通常、成分（ａ）３０〜９５
重量部、成分（ｂ）７０〜５重量部であり、成分（ａ）
及び（ｂ）の混合方法は特に限定されないが、通常、（
ａ）成分の溶液を調製し、これに（ｂ）成分又はら）成
分の溶液を混合する方法；無溶剤でそれぞれの成分を溶
融混合した後、溶液とする方法；更に、前記した併用可
能成分のなかの反応性希釈剤などを使用し無溶剤の液状
乃至ペースト状の組成物とする方法等によって樹脂組成
物を予め調製し、これに必要に応じて公知の触媒、特に
有機過酸化物、有機金属塩などを添加し混合する方法；
前記した混合時に触媒等を併用して混合する方法などに
よる。有機溶媒としては好適には、メチルエチルケトン
、アセトン、トルエン、キシレン、トリクロロエチレン
、ジオキサンなどが例示され、濃度としては含浸に必要
な樹脂量及び粘度により選択されるが、通常、２０〜６
０重量％が好適である。The blending ratio of component (a) and component (b) described above is not particularly limited, but usually component (a) is 30 to 95
parts by weight, component (b) 70 to 5 parts by weight, component (a)
The method of mixing and (b) is not particularly limited, but usually (
A method of preparing a solution of component a) and mixing it with a solution of component (b) or component (a); a method of melting and mixing each component without a solvent and then preparing a solution; A resin composition is prepared in advance by a method of making a solvent-free liquid or paste composition using a reactive diluent, etc., and if necessary, a known catalyst, especially an organic peroxide, A method of adding and mixing organic metal salts, etc.;
The above-mentioned mixing method may be performed by using a catalyst or the like at the time of mixing. Suitable examples of the organic solvent include methyl ethyl ketone, acetone, toluene, xylene, trichloroethylene, dioxane, etc., and the concentration is selected depending on the amount of resin required for impregnation and the viscosity, but usually 20 to 6
0% by weight is preferred.
補強基材としては、前記した基板Ｉに使用するものと同
様の繊維布基材類、及び四フッ化エチレン製の連続気泡
の多孔質基材が例示され、通常、厚み０．０３〜０．２
ｍｍ程度のものである。Examples of the reinforcing base material include fiber cloth base materials similar to those used for the substrate I described above, and open-cell porous base materials made of tetrafluoroethylene, and usually have a thickness of 0.03-0. 2
It is about mm.
シートもしくはフィルムは、上記で得た無溶剤或いは溶
液とした組成物を、通常、離型性を有するフィルム等に
塗布し適宜乾煙することにより製造する。また、上記で
調製した本樹脂溶液を補強基材に樹脂量３５〜８５重量
％の範囲となるように含浸した後、１２０〜１７０℃、
１〜２０分間乾燥して溶剤を除去し、所謂ｒＢ−ｓｔａ
ｇｅ 」化して基材含浸の接着シートとする。The sheet or film is usually produced by applying the above-obtained composition in the form of a solvent-free or solution onto a film having releasable properties and drying the film as appropriate. In addition, after impregnating the reinforcing base material with the resin solution prepared above so that the resin amount is in the range of 35 to 85% by weight,
The solvent is removed by drying for 1 to 20 minutes, and the so-called rB-sta
ge'' to form an adhesive sheet impregnated with a base material.
多層化積層成形の条件は、触媒・組成成分、基材の種類
などによっても変化するが、通常１００〜３００℃、０
．１〜１００ ｋｇ ／ ｃ督、好ましくは５〜５０ｋ
ｇ／ｃＪ、特に１０〜４０ｋｇ／ｃｎｆの範囲内である
。又、本発明においては、多層化積層成形を１００ｍｍ
ｔｆｇ以下の減圧状態で実施することが、ボイドの発生
などを無くす面から特に好適である。The conditions for multilayer lamination molding vary depending on the catalyst, composition components, type of base material, etc., but are usually 100 to 300°C, 0.
．． 1-100 kg/c, preferably 5-50k
g/cJ, especially within the range of 10 to 40 kg/cnf. In addition, in the present invention, multi-layer lamination molding is performed with a thickness of 100 mm.
It is particularly preferable to carry out the process under reduced pressure below tfg in order to avoid the occurrence of voids.
以下、実施例、比較例によって本発明をさらに具体的に
説明する。尚、実施例、比較例中の部は特に断らない限
り重量部である。Hereinafter, the present invention will be explained in more detail with reference to Examples and Comparative Examples. In addition, parts in Examples and Comparative Examples are parts by weight unless otherwise specified.
実施例１
２．２−ヒス（４−シアナトフェニル）プロパン８００
部を１６０℃で４時間予備反応させてプレポリマーとし
た。このプレポリマーに実質的に非結晶性の熱可塑性飽
和ポリエステル樹脂（商品名：ポリエスタ−ＬＰ−０３
５、日本合成化学工業■製、末端官能基数より算出され
る数平均分子ｆｆｉ １６，０００ 、水酸基価６ｍｇ
ＫＯＩＩ／ｇ ） ２００部、さらにビスフェノー
ルＡ型エポキシ樹脂（商品名：エピコート８２８、油化
シェルエポキシ０１製）５０部を加え、メチルエチルケ
トン（以下、ＭＥＫという）に溶解混合し、濃度６０％
の溶液とした（ワニス（ａ）という）。Example 1 2.2-his(4-cyanatophenyl)propane 800
A prepolymer was obtained by preliminarily reacting a portion at 160° C. for 4 hours. This prepolymer is a substantially non-crystalline thermoplastic saturated polyester resin (trade name: Polyester-LP-03).
5. Manufactured by Nippon Gosei Kagaku Kogyo ■, number average molecule ffi calculated from the number of terminal functional groups: 16,000, hydroxyl value: 6 mg
200 parts of KOII/g) and 50 parts of bisphenol A type epoxy resin (trade name: Epicote 828, manufactured by Yuka Shell Epoxy 01) were added and dissolved and mixed in methyl ethyl ketone (hereinafter referred to as MEK) to give a concentration of 60%.
(referred to as varnish (a)).
ワニス（ａ）に触媒としてオクチル酸亜鉛０．１２部を
加え均一に混合し、この溶液を厚み１５０−の表面処理
した離型紙の片面に連続的に塗布して、接着剤層の厚み
５０虜のＢ−ｓｔａｇｅの離型紙付き接着シート （以
下、シートＩという）を製造した。Add 0.12 parts of zinc octylate as a catalyst to varnish (a) and mix uniformly. Apply this solution continuously to one side of surface-treated release paper with a thickness of 150 mm to obtain an adhesive layer with a thickness of 50 mm. A B-stage adhesive sheet with release paper (hereinafter referred to as sheet I) was manufactured.
他方、厚み０．５ｍｍの片面銅張積層板及び厚み１ｍｍ
の両面銅張積層板として多官能性シアン酸エステル系ガ
ラス布銅張積層板（商品名；ＣＣＬ−１（Ｌ ８３０、
三菱瓦斯化学■製）を用い、両面銅張積層板に、公知方
法により片面に金メッキを施したＩＣチップ装着部を、
裏面に所望の配線網及びその保護膜を添着して基板■と
し、片面銅張積層板も同様にして金メッキした端子部の
大きさの異なる片面板Ｉを２種作製した。On the other hand, a single-sided copper clad laminate with a thickness of 0.5 mm and a 1 mm thick
Polyfunctional cyanate ester glass fabric copper clad laminate (trade name: CCL-1 (L 830,
(manufactured by Mitsubishi Gas Chemical Co., Ltd.), the IC chip mounting part is gold-plated on one side by a known method on a double-sided copper-clad laminate.
A desired wiring network and its protective film were attached to the back side to form a substrate (2), and a single-sided copper-clad laminate was similarly plated with gold to produce two types of single-sided boards I with different sizes of terminal portions.
次に、上記で得たシー）Ｉを前記で得た２種の片面板Ｉ
の裏面に重ね、温度１２０℃の熱ロールで接着剤層を転
写した後、端子部内側にＩＣチップ装着用の孔を所定の
大きさに打抜きした。Next, the sheet) I obtained above was replaced with the two types of single-sided plate I obtained above.
After the adhesive layer was transferred using a hot roll at a temperature of 120° C., a hole for mounting an IC chip was punched out to a predetermined size inside the terminal portion.
基板ＩのＩＣＣチップ装着影形成面側、接着シート層付
きの片面板Ｉを順次位置合わせして重ねた後、穴或いは
空間部にやや小さめのシリコンゴム製のチップを入れ、
温度１７５℃、圧力２０ｋｇ／ｃｎｆで２時間積層成形
し多層板を得た。この多層板の金メッキしていない部分
にシアン酸エステル−マレイミド樹脂系のコーディング
剤（商品名；ＢＴＭ４５０、三菱瓦斯化学側製）を塗布
し、乾燥した。After sequentially aligning and overlapping the ICC chip mounting shadow forming side of the board I and the single-sided board I with the adhesive sheet layer, insert a slightly smaller silicone rubber chip into the hole or space,
Lamination molding was carried out for 2 hours at a temperature of 175° C. and a pressure of 20 kg/cnf to obtain a multilayer board. A cyanate ester-maleimide resin-based coating agent (trade name: BTM450, manufactured by Mitsubishi Gas Chemical Co., Ltd.) was applied to the non-gold-plated portions of this multilayer board and dried.
この多層板の所定のピン立て位置に孔をあけ、ついで外
形加工し、スルーホールメッキを施すことなくピン立て
を行い３層のプラスチックＰＧＡとした。孔あけ時にス
ミアの発生を観察したが、スミア発生は認められなかっ
た。Holes were drilled at predetermined pin positions in this multilayer board, the external shape was processed, and pin positions were formed without through-hole plating, resulting in a three-layer plastic PGA. The occurrence of smear was observed during drilling, but no smear was observed.
このプラスチックＰＧＡの内層の表面抵抗劣化を１３０
℃、２．８気圧のプレッシャークツカーテストで測定し
た結果、抵抗値が１０８Ω以下になるまでの時間は２６
０時間であった。The surface resistance deterioration of the inner layer of this plastic PGA is 130
As a result of measuring with a pressure tester at ℃ and 2.8 atm, the time it takes for the resistance value to decrease to 108 Ω or less is 26 Ω.
It was 0 hours.
また、接着シートの端子部側へのはみ出しは、３０ρ以
下に止まるものであり（シリコンゴム製弾性体チップの
無い場合は、２ｍｍ程度である）、内層配線網間間隙に
ついて、断面切断サンプルを顕微鏡観察した結果、空隙
は全く認めらず、更に、２６０℃の半田浴に２０秒フロ
ートによっても層間剥離や膨れなどの不良の発生はなか
った。In addition, the protrusion of the adhesive sheet toward the terminal side is limited to 30ρ or less (approximately 2 mm if there is no silicone rubber elastic chip). As a result of observation, no voids were observed, and no defects such as delamination or blistering occurred even after floating in a 260° C. solder bath for 20 seconds.
実施例２
２．２−ヒス（４−シアナトフェニル）プロパン９００
部とビス（４−マレイミドフェニル）メタン１００部と
を１５０℃で１．５時間予備反応させてプレポリマーと
した。このプレポリマーに実質的に非結晶性の熱可塑性
飽和ポリエステル樹脂（商品名：ポリエスタ−ＬＰ−０
３３、日本合成化学工業側製、末端官能基数より算出さ
れる数平均分子量１６．０００、水酸基価６■ＫＯ）ｌ
／ｇ） ５５０部及び実質的に非結晶性の熱可塑性飽
和ポリエステル樹脂（商品名：ポリエスタ−ＬＰ−０４
４、日本合成化学工業■製、末端官能基数より算出され
る数平均分子量７．０００、水酸基価１５■ＫＤＨ／ｇ
） １００部を加え、ＭＢＫに溶解混合し、濃度６０％
の溶液とした（ワニス（ｂ）という）。Example 2 2.2-his(4-cyanatophenyl)propane 900
and 100 parts of bis(4-maleimidophenyl)methane were preliminarily reacted at 150° C. for 1.5 hours to obtain a prepolymer. This prepolymer is a substantially non-crystalline thermoplastic saturated polyester resin (trade name: Polyester-LP-0).
33, manufactured by Nippon Gosei Chemical Industry, number average molecular weight calculated from the number of terminal functional groups: 16.000, hydroxyl value: 6■KO)l
/g) 550 parts and substantially amorphous thermoplastic saturated polyester resin (trade name: Polyester-LP-04
4. Manufactured by Nippon Gosei Chemical Industry ■, number average molecular weight calculated from the number of terminal functional groups 7.000, hydroxyl value 15 ■KDH/g
) Add 100 parts, dissolve and mix in MBK, concentration 60%
(referred to as varnish (b)).
ワニス（ｂ）に触媒としてオクチル酸亜鉛０．０７部を
加え均一に混合し、この溶液を厚み０．０４ｍｍのガラ
ス織布に含浸・乾燥して、上下の樹脂層厚４０ρのＢ−
ｓｔａｇｅのプリプレグ（以下、シート■という）を製
造した。Add 0.07 parts of zinc octylate as a catalyst to varnish (b) and mix uniformly. This solution was impregnated into a 0.04 mm thick glass woven cloth and dried to form a B-
A stage prepreg (hereinafter referred to as sheet ①) was manufactured.
他方、厚み０．３ｎ＋ｎ＋の片面銅張積層板及び厚み１
ｍｍの両面銅張積層板として多官能性シアン酸エステル
系ガラス布銅張積層板（商品名；ＣＣＬ−ＨＬ ８３０
、三菱瓦斯化学■製）を用い、両面銅張積層板に、公知
方法により片面に金メッキを施したＩＣチップ装着部を
、裏面に所望の配線網及びその保護膜を添着して基板■
とし、片面銅張積層板も同様にして金メッキした端子部
の大きさの異なる片面板■を２種作製した。On the other hand, a single-sided copper-clad laminate with a thickness of 0.3n+n+ and a thickness of 1
Polyfunctional cyanate ester glass fabric copper clad laminate (product name: CCL-HL 830) as a double-sided copper clad laminate of mm
(manufactured by Mitsubishi Gas Chemical Co., Ltd.), a double-sided copper-clad laminate is plated with gold on one side using a known method, and a desired wiring network and its protective film are attached to the back side of the double-sided copper-clad laminate.
Two types of single-sided copper-clad laminates (1) with gold-plated terminals of different sizes were prepared in the same manner.
次に、上記で得たシート■を前記で得た２種の片面板■
の裏面に重ね、温度１４０℃の熱ロールで接着した後、
端子部内側にＩＣチップ装着用の孔を所定の大きさに打
抜きした。Next, the sheet ■ obtained above was used as the two types of single-sided plate ■ obtained above.
After stacking it on the back side of and gluing it with a hot roll at a temperature of 140℃,
A hole for mounting an IC chip was punched out to a predetermined size inside the terminal portion.
基板ＨのＩＣＣチップ装着影形成面側、接着シート層付
きの片面板■を順次位置合わせして重ねた後、圧力５ｋ
ｇ／ｃｎｆで温度１７０℃の熱盤にはさみ、１０分間積
層成形し積層材を仮接着した。After sequentially aligning and overlapping the single-sided board with an adhesive sheet layer ■ on the ICC chip mounting shadow forming side of the board H, apply a pressure of 5k.
g/cnf between heating platens at a temperature of 170° C. and laminated for 10 minutes to temporarily bond the laminated material.
この仮接着した積層材の穴或いは空間部に常温硬化型の
シリコン樹脂を流し込み、２５℃で２４時間硬化させた
後、温度１７５℃、圧力２０ｋｇ／ｃｎｆで２時間積層
成形し多層板を得、コーディング剤を塗布し、乾燥した
。A room temperature curing silicone resin is poured into the hole or space of the temporarily bonded laminated material, and after curing at 25°C for 24 hours, lamination molding is performed at a temperature of 175°C and a pressure of 20 kg/cnf for 2 hours to obtain a multilayer board. Coating agent was applied and dried.
この多層板の所定のピン立て位置に孔をあけ、ついで外
形を打抜き、スルーホールメッキを施すことなくピン立
てを行い３層のプラスチックＰＧＡとした。孔開は時に
スミアの発生を観察したが、スミア発生は認められなか
った。Holes were drilled at predetermined pin positions in this multilayer board, the outer shape was punched out, and pin positions were formed without through-hole plating, resulting in a three-layer plastic PGA. Occasionally, smear formation was observed during hole opening, but no smear formation was observed.
このプラスチックＰＧＡの内層の表面抵抗劣化を１３０
℃、２．８気圧のプレッシャークツカーテストで測定し
た結果、抵抗値が１０”Ω以下になるまでの時間は３０
０時間であった。The surface resistance deterioration of the inner layer of this plastic PGA is 130
As a result of the pressure test at 2.8 atm at ℃, the time it takes for the resistance to decrease to below 10'' is 30.
It was 0 hours.
また、接着シートからの端子部側へのはみ出しは１８−
以下に止まるものであり（シリコンゴム製のチップの無
い場合は、２ｍｍ程度）、内層配線網間間隙について、
切断したサンプルを顕微鏡観察した結果、空隙は全く認
められず、更に、２６０℃の半田浴に２０秒フロートに
よっても層間剥離や膨れなどの不良の発生はなかった。Also, the protrusion from the adhesive sheet to the terminal side is 18-
(approximately 2 mm if there is no silicone rubber chip), and the gap between the inner layer wiring networks is as follows:
As a result of microscopic observation of the cut sample, no voids were observed, and no defects such as delamination or blistering occurred even when floated in a 260° C. solder bath for 20 seconds.
実施例３
実施例１において、基板Ｉにかえて、両面銅張積層板に
、公知方法により片面は金メッキを施したＩＣチップ装
着部を形成し、裏面はそのままとしたもの（基板■）を
用い、片面板■に代えて、片面銅張積層板に同様にして
金メッキした端子部を有するもの（片面板■−１）及び
無処理の片面銅張積層板を使用し、シー）Ｉを片面板ｌ
ｌｌ−１の裏面に重ね、温度１２０℃の熱ロールで接着
剤層を転写した後、端子部内側にＩＣチップ装着用の孔
を所定の大きさに打抜き、及びシー）Ｉ単独も孔を所定
の大きさに打抜きした。Example 3 In Example 1, instead of the substrate I, a double-sided copper-clad laminate was used in which an IC chip mounting part was formed with gold plating on one side by a known method, and the back side was left as is (substrate ■). , Instead of the single-sided board ■, use a single-sided copper-clad laminate with terminals plated with gold in the same way (single-sided board ■-1) and an untreated single-sided copper-clad laminate, l
Layer it on the back side of ll-1 and transfer the adhesive layer with a hot roll at a temperature of 120°C, then punch out a hole of a predetermined size for mounting an IC chip on the inside of the terminal part, and also punch out a hole of a predetermined size for I alone. It was punched out to size.
基板■のＩＣＣチップ装着影形成面側、接着シート層付
きの片面板ｌｌｌ−１及び孔明けしたシートエを順次位
置合わせして重ねた後、穴或いは空間部にやや小さめの
シリコンゴム製のチップを入し、さ−らに片面銅張積層
板を重ね、温度１７５℃、圧力 ２０ｋｇ／ｃｎｆで２
時間積層成形し多層板を得た。After sequentially aligning and overlapping the ICC chip mounting shadow forming side of the board (1), the single-sided board with the adhesive sheet layer 11-1, and the sheet with holes, insert a slightly smaller silicone rubber chip into the hole or space. Then, a single-sided copper-clad laminate was layered, and the temperature was 175℃ and the pressure was 20kg/cnf.
A multilayer board was obtained by time lamination molding.
この多層板の所定のビン立て位置に孔をあけ、スルーホ
ールメッキ、外層配線網及び端子部の形成、ＩＣ搭載部
用の孔を外層板（上層の片面銅張積層板）をザグリによ
り形成した後、外形を打抜き、ビン立てを行い３層のプ
ラスチックＰＧＡとした。スルーホール用の孔あけ時に
スミアの発生を観察したが、スミア発生は認められなか
った。Holes were drilled in the predetermined bottle positions of this multilayer board, through-hole plating was performed, outer layer wiring networks and terminals were formed, and holes for the IC mounting area were formed by counterboring the outer layer board (upper layer single-sided copper-clad laminate). After that, the outer shape was punched out and the bottle was made into a three-layer plastic PGA. The occurrence of smear was observed during drilling for through holes, but no smear was observed.
このプラスチックＰＧＡの内層の表面抵抗劣化を１３０
℃、２．８気圧のプレッシャークツカーテストで測定し
た結果、抵抗値が１０８Ω以下になるまでの時間は３２
０時間であった。The surface resistance deterioration of the inner layer of this plastic PGA is 130
As a result of measuring by pressure tester at ℃ and 2.8 atm, the time required for the resistance value to decrease to 108 Ω or less was 32 Ω.
It was 0 hours.
また、接着シートからの端子部側へのはみ出しは ３５
ρ以下に止まるものであり（シリコンゴム製のチップの
無い場合は、２ｍｍ程度）、内層配線網間間隙について
、切断したサンプルを顕微鏡観察した結果、空隙は全く
認められず、更に、２６０℃の半田浴に２０秒フロート
によっても層間剥離や膨れなどの不良の発生はなかった
。Also, the protrusion from the adhesive sheet to the terminal side is 35
ρ or less (approximately 2 mm if there is no silicone rubber chip), and as a result of microscopic observation of the cut sample with respect to the gap between the inner layer wiring networks, no voids were observed at 260℃. Even after floating in a solder bath for 20 seconds, no defects such as delamination or blistering occurred.
以上の発明の詳細な説明および実施例等から明らかなよ
うに、本発明のＩＣチップ搭載用多層板の製法によれば
、層間接着用のシートとして配線網の導体間間隙を充分
に充填できる樹脂流れの大きい接着シートを使用しても
、樹脂流れによる端子部などの汚染が防止されるもので
あり、多層化積層成形時に生じる問題を解決できるもの
であり、新規な工業的製法として実用性の極めて大きい
ものである。As is clear from the above detailed description of the invention and examples, the method for manufacturing a multilayer board for mounting an IC chip of the present invention uses a resin that can be used as a sheet for interlayer adhesion to sufficiently fill the gaps between conductors in a wiring network. Even if an adhesive sheet with a large flow is used, contamination of terminal parts etc. due to resin flow can be prevented, and problems that occur during multilayer lamination molding can be solved, making it a practical new industrial manufacturing method. It is extremely large.
更に、本発明の好ましい態様において使用する接着シー
トは銅のマイグレーション防止の効果が著しいものであ
り、実使用時の長期の信頼性にも優れたものとなるもの
である。Further, the adhesive sheet used in a preferred embodiment of the present invention has a remarkable effect of preventing copper migration and has excellent long-term reliability during actual use.
Claims (1)
た多層板の製造法において、所定位置に所定の大きさの
孔を形成した多層化積層接着用の低流動性接着シート又
は所望組みの該低流動性接着シート及びＩＣチップ搭載
用の穴及び接続用の端子部を有する内層用プリント配線
板を配置して形成される穴或いは空間部に、該穴或いは
空間部と同一もしくはやや小さめの耐熱性の弾性体材料
を入れた構成として多層化積層成形することを特徴とす
るＩＣチップ搭載用多層板の製造法。 ２ 該低流動性接着シートが、（ａ）多官能性シアン酸
エステル樹脂組成物、（ｂ）実質的に非結晶性の熱可塑
性飽和ポリエステル樹脂及び（ｃ）硬化触媒を必須成分
とする熱硬化性樹脂組成物のシート若しくはフィルム又
は該熱硬化性樹脂組成物を補強基材に含浸・乾燥してＢ
−ｓｔａｇｅ化してなるものである特許請求の範囲第１
項記載のＩＣチップ搭載用多層板の製造法。 ３ 多層化積層成形を１００ｍｍＨｇ以下の減圧状態で
行う特許請求の範囲第１項または２項記載のＩＣチップ
搭載用多層板の製造法。[Claims] 1. A low-fluidity adhesive sheet for multilayer lamination bonding, in which holes of a predetermined size are formed at predetermined positions, in a method of manufacturing a multilayer board having at least a terminal portion for connecting an IC chip in an inner layer. Or, in a hole or a space formed by arranging a desired set of the low-flow adhesive sheet and an inner layer printed wiring board having a hole for mounting an IC chip and a terminal part for connection, Alternatively, a method for manufacturing a multilayer board for mounting an IC chip, characterized by multilayer lamination molding as a structure containing a slightly smaller heat-resistant elastic material. 2. The low-fluidity adhesive sheet is a thermosetting adhesive sheet containing (a) a polyfunctional cyanate ester resin composition, (b) a substantially non-crystalline thermoplastic saturated polyester resin, and (c) a curing catalyst as essential components. A sheet or film of the thermosetting resin composition or the thermosetting resin composition is impregnated into a reinforcing base material and dried.
-Claim 1, which is obtained by converting it into a stage.
A method for manufacturing a multilayer board for mounting an IC chip as described in . 3. A method for manufacturing a multilayer board for mounting an IC chip according to claim 1 or 2, wherein the multilayer lamination molding is carried out under a reduced pressure of 100 mmHg or less.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62110627A JPS63276257A (en) | 1987-05-08 | 1987-05-08 | Manufacture of multilayer board for carrying ic chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62110627A JPS63276257A (en) | 1987-05-08 | 1987-05-08 | Manufacture of multilayer board for carrying ic chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63276257A true JPS63276257A (en) | 1988-11-14 |
Family
ID=14540567
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62110627A Pending JPS63276257A (en) | 1987-05-08 | 1987-05-08 | Manufacture of multilayer board for carrying ic chip |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63276257A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2015002227A (en) * | 2013-06-14 | 2015-01-05 | 日本特殊陶業株式会社 | Multilayer wiring board and method for manufacturing the same |
-
1987
- 1987-05-08 JP JP62110627A patent/JPS63276257A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2015002227A (en) * | 2013-06-14 | 2015-01-05 | 日本特殊陶業株式会社 | Multilayer wiring board and method for manufacturing the same |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR101014517B1 (en) | Manufacturing process for a prepreg with a carrier, prepreg with a carrier, manufacturing process for a thin double-sided plate, thin double-sided plate and manufacturing process for a multilayer-printed circuit board | |
| JP5605259B2 (en) | Resin composition for interlayer insulation of multilayer printed wiring board, adhesive film and prepreg | |
| JP4725704B2 (en) | Resin composition for interlayer insulation of multilayer printed wiring board, adhesive film and prepreg | |
| KR20080044175A (en) | Adhesive composition, and adhesive sheet and coverlay film using same | |
| WO2006001305A1 (en) | Prepreg for printed wiring board, metal foil clad laminate and printed wiring board, and, method for manufacturing multi-layer printed wiring board | |
| US5674611A (en) | Adhesive for copper foils and an adhesive-applied copper foil | |
| JP2002187937A (en) | Epoxy resin composition, prepreg, and metal-clad laminate | |
| JPS63276257A (en) | Manufacture of multilayer board for carrying ic chip | |
| JP4747619B2 (en) | Coverlay film and flexible wiring board | |
| JP3319934B2 (en) | Metal foil with resin | |
| JP2000129086A (en) | Epoxy resin composition, prepreg, resin-coated metallic foil and laminate | |
| JPS6381999A (en) | Manufacture of multilayer board for mounting ic chips | |
| JPH11148053A (en) | Heat-resistant plastic film laminate and multilayer printed circuit using the same | |
| JP2001152108A (en) | Insulating adhesive film multi-layer printed-wiring board using the same and its manufacturing method | |
| JPS6381998A (en) | Manufacture of multilayer board for mounting ic chips | |
| JP3409453B2 (en) | Manufacturing method of multilayer printed wiring board | |
| JPS6398189A (en) | Manufacture of ic chip mounting multilayer board | |
| JPS6392091A (en) | Manufacture of ic chip mounting multilayer board | |
| JPS63291442A (en) | Manufacture of multilayered board for mounting ic chip | |
| JPS63311747A (en) | Manufacture of ic chip-mounting printed circuit board | |
| JP3940936B2 (en) | Manufacturing method of multilayer printed wiring board | |
| KR20160108968A (en) | Manufacturing method of coverlay film and manufacturing method of flexible printed circuit board | |
| JPS63284830A (en) | Manufacture of multilayered board for mounting ic chips | |
| JP2001089733A (en) | Insulating resin adhesive for multilayer printed circuit board | |
| JP2005243830A (en) | Printed wiring board |