JPS63271206A - Production of waveguide type optical circuit element - Google Patents
Production of waveguide type optical circuit elementInfo
- Publication number
- JPS63271206A JPS63271206A JP10420787A JP10420787A JPS63271206A JP S63271206 A JPS63271206 A JP S63271206A JP 10420787 A JP10420787 A JP 10420787A JP 10420787 A JP10420787 A JP 10420787A JP S63271206 A JPS63271206 A JP S63271206A
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- Prior art keywords
- layer
- photoresist film
- waveguide layer
- waveguide
- photoresist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003287 optical effect Effects 0.000 title claims description 22
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 67
- 238000000059 patterning Methods 0.000 claims abstract description 15
- 206010034972 Photosensitivity reaction Diseases 0.000 claims abstract description 3
- 230000036211 photosensitivity Effects 0.000 claims abstract description 3
- 238000000034 method Methods 0.000 claims description 21
- 238000005530 etching Methods 0.000 claims description 11
- 230000035945 sensitivity Effects 0.000 abstract description 15
- 239000000758 substrate Substances 0.000 abstract description 9
- 239000010410 layer Substances 0.000 description 77
- 239000010408 film Substances 0.000 description 51
- 238000007796 conventional method Methods 0.000 description 8
- 238000010894 electron beam technology Methods 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 239000010409 thin film Substances 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000001771 impaired effect Effects 0.000 description 2
- 230000010365 information processing Effects 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 230000005856 abnormality Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
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- Optical Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、光通信や元情報処理の分野において用いられ
る導波路形光回折素子の製造方法に係り、特に、光の回
折効率が高い導波路形光回折素子を実現するのに好適な
製造方法に関する。Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a method for manufacturing a waveguide type optical diffraction element used in the fields of optical communication and original information processing, and in particular, to a method for manufacturing a waveguide type optical diffraction element used in the field of optical communication and original information processing. The present invention relates to a manufacturing method suitable for realizing a wave-shaped optical diffraction element.
従来、薄膜から成る光導波路層を有する導波路形光回折
素子の光回折格子は、例えば西原浩著の「光集積回路」
（オーム社 昭和６０年発行）において論じられている
ように、（１）屈折率変調形と、（２）レリーフ形に大
別される。Conventionally, an optical diffraction grating for a waveguide type optical diffraction element having an optical waveguide layer made of a thin film has been proposed, for example, in "Optical Integrated Circuits" written by Hiroshi Nishihara.
(published by Ohmsha in 1985), there are two main types: (1) refractive index modulation type and (2) relief type.
前者は、導波路中に周期的に金属を拡散して屈折率を変
化させ、回折格子としたものであり、また、後者として
は、導波路層の表面を周期的にエツチング加工して、回
折格子としたもの、あるいは、薄膜を周期的に導波路層
上に装荷して回折格子としたものが知られている。これ
らの従来技術のうち、導波路層の表面を周期的にエツチ
ング加工して、深溝を形成し、回折格子を得る方法が、
回折効率の高い回折格子を得るために、有効である。The former is a diffraction grating made by periodically diffusing metal into the waveguide to change the refractive index, and the latter is a diffraction grating by periodically etching the surface of the waveguide layer. It is known to use a grating, or a diffraction grating by periodically loading a thin film onto a waveguide layer. Among these conventional techniques, the method of periodically etching the surface of the waveguide layer to form deep grooves to obtain a diffraction grating is
This is effective for obtaining a diffraction grating with high diffraction efficiency.
深溝により構成される回折格子を得るための一工程であ
る、ホトレジスト膜をパターニングする方法としては１
例えば昭和６１年出願公開第１０８１３５号に述べられ
ているように、導波路層上にホトレジスト膜を単層堆積
し、電子線（ＥＢ：エレクトａ ｙ ａビーム（Ｅｌｅ
ｃｔｒｏｎ Ｂｅａｍ ）の照射によってパターニング
する方法が用いられている。The method for patterning a photoresist film, which is one step to obtain a diffraction grating composed of deep grooves, is 1.
For example, as described in Published Application No. 108135 of 1988, a single layer of photoresist film is deposited on the waveguide layer, and an electron beam (EB) is applied to the waveguide layer.
A method of patterning by irradiation with a Ctron Beam is used.
〔発明が解決しようとする問題点）
第２図は、従来の導波路形光回折素子の製造方法の一例
を示す工程断面図である。[Problems to be Solved by the Invention] FIG. 2 is a process sectional view showing an example of a conventional method for manufacturing a waveguide type optical diffraction element.
図において、２１は基板、２２はバッファ層。In the figure, 21 is a substrate, and 22 is a buffer layer.
２３は導波路層、２６は導波路層２５をパターニングす
るためのホトレジスト膜、２７はホトレジスト膜２６の
レジスト残渣である。23 is a waveguide layer, 26 is a photoresist film for patterning the waveguide layer 25, and 27 is a resist residue of the photoresist film 26.
上記従来技術では、第２図に示すように、導波路層のエ
ツチング用マスクとなるパターン化されたホトレジスト
膜２６に、レジスト残渣２７が発生する問題がある。こ
のレジスト残渣２７により。As shown in FIG. 2, the conventional technique described above has a problem in that resist residue 27 is generated on a patterned photoresist film 26 that serves as a mask for etching the waveguide layer. Due to this resist residue 27.
導波路層２３のバターニング精度が著しく損なわれるこ
とが多く、１μｍ程度の微細パターンを形成するには、
不都合であった。また、ホトレジスと膜２６をマスクと
して、導波路層２３に深溝をエツチングするとき、ホト
レジスト膜２６もエツチングされるので、ホトレジスト
膜２６は相当の厚さが必要となり、パターニング精度の
悪化等、種々の問題が発生していた。The patterning accuracy of the waveguide layer 23 is often significantly impaired, and in order to form a fine pattern of about 1 μm, it is necessary to
It was inconvenient. Furthermore, when etching deep grooves in the waveguide layer 23 using the photoresist and film 26 as a mask, the photoresist film 26 is also etched, so the photoresist film 26 needs to be quite thick, resulting in various problems such as deterioration of patterning accuracy. A problem was occurring.
第３因および第４図（ａ） 、 （ｂ）は、従来の導波
路形光回折素子の製造方法の別の一例を示す図である。The third factor and FIGS. 4(a) and 4(b) are diagrams showing another example of a conventional method for manufacturing a waveguide type optical diffraction element.
第３図は、工程断面図、第４図（ａ）、 （ｂ）は、第
３図の一部拡大図の工程断面図である。FIG. 3 is a sectional view of the process, and FIGS. 4(a) and 4(b) are sectional views of a partially enlarged view of FIG. 3.
図において、３１は基板、３２はバッファ層。In the figure, 31 is a substrate, and 32 is a buffer layer.
３３は導波路層％ ３６はホトレジスト膜、３４は導波
路層３３をエツチングするためのマスクとなるマスク層
、５９はマスク残部である。33 is a waveguide layer, 36 is a photoresist film, 34 is a mask layer serving as a mask for etching the waveguide layer 33, and 59 is the remainder of the mask.
すなわち、第２因に示した従来の方法では、ホトレジス
ト膜２６自体をマスクとして導波路層２３をエッチレグ
したが、第３図および第４図（ａｌ、（ｂ）に示す従来
例では、例えば金属等から成るマスク層３４をマスクと
して導波路層３３をエツチングする。ホトレジスト膜３
６は、マスク層３４をリフトオフ法を用いてパターニン
グするためのものである。本従来例では、第４図（ａ）
に示す状態からホトレジスト膜３６をリフトオフすると
、第４図（ｂｌに示すように、マスク層３４のパターニ
ングが正確に行なわれず、マスク残部３９に示すように
、マスク層３４の形状に異常が生じ、導波路層３３のパ
ターニング精度を著しく損なう問題があった。That is, in the conventional method shown in the second factor, the waveguide layer 23 was etched using the photoresist film 26 itself as a mask, but in the conventional method shown in FIGS. 3 and 4 (al, (b), for example, metal The waveguide layer 33 is etched using the mask layer 34 consisting of the photoresist film 3 as a mask.
6 is for patterning the mask layer 34 using a lift-off method. In this conventional example, Fig. 4(a)
When the photoresist film 36 is lifted off from the state shown in FIG. 4, the patterning of the mask layer 34 is not performed accurately as shown in FIG. There was a problem in that the patterning accuracy of the waveguide layer 33 was significantly impaired.
このように、従来の製造方法では、導波路層のパターニ
ングを高精度に形成することができない問題があった。As described above, the conventional manufacturing method has a problem in that the waveguide layer cannot be patterned with high precision.
本発明の目的は、上記従来の問題点を解決し。An object of the present invention is to solve the above-mentioned conventional problems.
導波路層のパターニングを高精度に行なうことができ１
回折効率の高い薄膜導波路形光回折格子を実現できる製
造方法を提供することにある。The waveguide layer can be patterned with high precision.1
It is an object of the present invention to provide a manufacturing method that can realize a thin film waveguide type optical diffraction grating with high diffraction efficiency.
本発明は、上記目的を達成するために、導波路層の表面
上に、光感度の異なるホトレジスト膜を上下方向に少な
くとも２層形成する工程と、上記ホトレジスト膜をパタ
ーニングする工程と、上記パターニングされたホトレジ
スト膜を有する上記導波路層の表面上にマスク層を形成
する工程と、上記パターニングされたホトレジスト膜を
除去する工程と、上記マスク層をマスクとして上記導波
路層をエツチングする工程と、上記マスク層を除去する
工程とを具備することを特徴とする。In order to achieve the above object, the present invention comprises a step of forming at least two layers of photoresist films having different photosensitivity in the vertical direction on the surface of a waveguide layer, a step of patterning the photoresist film, and a step of patterning the photoresist film. forming a mask layer on the surface of the waveguide layer having a patterned photoresist film; removing the patterned photoresist film; etching the waveguide layer using the mask layer as a mask; The method is characterized by comprising a step of removing the mask layer.
ホトレジストにポジ型を用いる場合は、下層に感度の高
いホトレジスト膜を形成し、上層に感度の低いホトレジ
スト膜を形成する。一方、ネガ型のホトレジストを用い
る場合は、反対に、下層疋感度の低いホトレジスト膜を
形成し、上層に感度の高いホトレジスト膜を形成する。When using a positive photoresist, a photoresist film with high sensitivity is formed as a lower layer, and a photoresist film with low sensitivity is formed as an upper layer. On the other hand, when using a negative photoresist, on the contrary, a lower layer photoresist film with low sensitivity is formed, and an upper layer photoresist film with high sensitivity is formed.
第１図（ａ）〜（０）は、本発明の製造方法の基本的構
成を説明するための一例の工程断面図である。図におい
て％１は基板、２はバッファ層％３は導波路層、５は下
層ホトレジスト膜％ ６は上層レジスト膜、４は導波路
層３をエツチングするためのマスク層である。FIGS. 1(a) to 1(0) are process cross-sectional views of an example for explaining the basic configuration of the manufacturing method of the present invention. In the figure, %1 is a substrate, 2 is a buffer layer, %3 is a waveguide layer, 5 is a lower photoresist film, 6 is an upper resist film, and 4 is a mask layer for etching the waveguide layer 3.
まず１表面にバッファ層２および導波路層３が形成され
た基板１上に、感度の異なる下層ホトレジスト膜５およ
び上層ホトレジスト膜６を２層重ねて形成する。例えば
、２種類のポジ型のホトレシストを用いて、下層に感度
の高いホトレジストＭ５を塗布し、上層には感度の低い
ホトレジスト膜５を塗布する。次いで、これらのホトレ
ジスト膜５．６を同一のパターンにバターニングする。First, on a substrate 1 having a buffer layer 2 and a waveguide layer 3 formed on one surface, a lower photoresist film 5 and an upper photoresist film 6 having different sensitivities are formed in two layers. For example, using two types of positive photoresists, a highly sensitive photoresist M5 is applied as the lower layer, and a photoresist film 5 with lower sensitivity is applied as the upper layer. These photoresist films 5.6 are then patterned into the same pattern.
すなわち、下層ホトレジスト膜５は、感度が良いために
、パターニングを行なうＩＢ（電子線）の直接歯たらな
い所まで、けずり込まれて、下層ホトレジスト膜５には
、第１図（ａ）に示すように、凹部５′が形成される。That is, since the lower photoresist film 5 has good sensitivity, the IB (electron beam) used for patterning is scraped into the lower photoresist film 5 to the point where it does not directly touch the beam, as shown in FIG. 1(a). Thus, a recess 5' is formed.
その結果、ホトレジスト膜がバターニングされた基板１
上に、マスク層４を堆積すると、Ｙスフ層４は、上層ホ
トレジスト膜６のパターンの大きさに合わせて導波路層
３０表面上に堆積するため、正確な寸法のマスク層４が
得られる。したがって、第２図に示す従来法のように、
レジスト残渣２７が生じたり、第４図（ｂ）に示すよう
に、マスク層３４の形状に異常が生じるのを防止できる
。As a result, the substrate 1 with the photoresist film patterned
When the mask layer 4 is deposited thereon, the Y-splash layer 4 is deposited on the surface of the waveguide layer 30 in accordance with the size of the pattern of the upper photoresist film 6, so that the mask layer 4 with accurate dimensions can be obtained. Therefore, as in the conventional method shown in Figure 2,
It is possible to prevent the formation of resist residue 27 and the formation of abnormalities in the shape of the mask layer 34 as shown in FIG. 4(b).
次に、第１図（ｏ）に示すように、正確な寸法に形成さ
れたマスク層４をマスクとして導波路層３をエツチング
すれば、導波路層３を正確な寸法にエツチングでき、正
確なパターンを有する光回折格子を得ることができる。Next, as shown in FIG. 1(o), if the waveguide layer 3 is etched using the mask layer 4 formed to have accurate dimensions as a mask, the waveguide layer 3 can be etched to have accurate dimensions. A patterned optical grating can be obtained.
なお、マスク層４としては、耐エツチング性の大きい例
えばＣｒ等の金属を用いることにより。Note that as the mask layer 4, a metal having high etching resistance, such as Cr, is used.
導波路層３０表面の深溝エツチングが可能となる。Deep groove etching on the surface of the waveguide layer 30 becomes possible.
なお、上記の例では、ポジ型のホトレジストを用いたが
、ネガ屋のホトレジストを用いる場合は、上記例と反対
に下層ホトレジスト膜５に感度の低いホトレジストを用
い、上層ホトレジストｇ６に感度の高いホトレジストを
用いることにより、上記例と同様の作用、効果を達成で
きる。要は、ホトレジスト膜のパターニング後、下層の
ホトレジスト膜がけずり込まれるようにホトレジスト膜
を形成する。In the above example, a positive type photoresist was used, but when using a negative photoresist, contrary to the above example, a photoresist with low sensitivity is used for the lower photoresist film 5, and a photoresist with high sensitivity is used for the upper photoresist film g6. By using this, the same actions and effects as in the above example can be achieved. In short, after patterning the photoresist film, the photoresist film is formed so that the underlying photoresist film is carved into it.
実施例 １
次に、第１図を用いて本発明の製造方法の一実施例を説
明する。Example 1 Next, an example of the manufacturing method of the present invention will be described using FIG.
まず、第１図（ａ）に示すように、屈折率五４の８１（
シリコン）ウェハを用いた基板１上に、熱酸化法により
厚さα５■、屈折率１．４６のＳｉｎ、膜を形成し、バ
ッファ層２とした。このＳｉｎ、から成るノ（ッファ層
２は、このバッファ層２上にこの後形成される導波路層
３を通過する光が、基板１＆Ｃ漏洩しないために設ける
ものである。導波路層３としては、屈折率１．５４のコ
ーニング（Ｃｏｒｎｉｎｇ ）社の７０５９ガラスを用
いて、スパッタ法により厚さ１μｍの導波路層３を形成
する。次に、この導波路層３の表面に下層レジスト膜５
および上層レジスト膜６を塗布する。本実施例では、２
種類のポジ凰のホトレジスト膜を用いて、下層に感度の
高いホトレジスト膜５を塗布し、上層には感度の低いホ
トレジスト膜６を塗布する。次いで、下層レジスト膜５
および上層レジスト膜６をＥＢ（電子線）を照射して同
時にバターニングする。First, as shown in FIG. 1(a), the refractive index is 81(
A buffer layer 2 was formed on a substrate 1 using a (silicon) wafer by a thermal oxidation method to form a Sin film having a thickness of α5mm and a refractive index of 1.46. This buffer layer 2 consisting of Sin is provided to prevent light passing through the waveguide layer 3 which will be formed later on the buffer layer 2 from leaking from the substrate 1&C.The waveguide layer 3 is A waveguide layer 3 with a thickness of 1 μm is formed by sputtering using 7059 glass manufactured by Corning Co., Ltd. with a refractive index of 1.54.Next, a lower resist film 5 is formed on the surface of this waveguide layer 3.
Then, an upper resist film 6 is applied. In this example, 2
A photoresist film 5 with high sensitivity is coated on the lower layer, and a photoresist film 6 with low sensitivity is coated on the upper layer using a positive photoresist film of various types. Next, the lower resist film 5
And the upper resist film 6 is simultaneously patterned by irradiating it with EB (electron beam).
このとき、下層ホトレジスト膜５は感度が良いので、下
層ホトレジスト膜５には、凹部５′が形成される。この
後、ホトレジスト膜がパターニングされた導波路層３上
に、Ｃｒ等の金属から成るマスク層４をスパッタ法等の
蒸着法により堆積する。At this time, since the lower photoresist film 5 has good sensitivity, a recess 5' is formed in the lower photoresist film 5. Thereafter, a mask layer 4 made of metal such as Cr is deposited on the waveguide layer 3 patterned with the photoresist film by a vapor deposition method such as a sputtering method.
次に、ホトレジスト膜５および６を溶解、はく離等によ
り除去し、第１図（ｂ）に示すようなマスクパターンを
有するマスク層４を得る。Next, the photoresist films 5 and 6 are removed by dissolving, peeling, etc. to obtain a mask layer 4 having a mask pattern as shown in FIG. 1(b).
次に、第１１Ｗ（ｏ）に示すように、このマスク層４上
からプラズマイオンを注ぎ、導波路層３およびバッファ
層２をエツチングして１両者に深溝を形成する。さらに
、Ｃｒから成るマスク層４をエツチング等により除去し
て、精度の良い微細な深溝のパターンが形成された導波
路層３を有する光回折格子を形成する。Next, as shown in 11th W(o), plasma ions are poured onto the mask layer 4 to etch the waveguide layer 3 and the buffer layer 2 to form deep grooves in both. Furthermore, the mask layer 4 made of Cr is removed by etching or the like to form an optical diffraction grating having a waveguide layer 3 in which a pattern of fine deep grooves with high precision is formed.
本実施例による光回折格子は、導波路層３と、深溝部と
の間の屈折率差が、α５４と大きくでき、回折効率が７
０％程度と、従来の金属拡散形の回折格子の回折効率４
０％以下に比べ、はるかに大きな回折効率が得られた。In the optical diffraction grating according to this example, the refractive index difference between the waveguide layer 3 and the deep groove portion can be as large as α54, and the diffraction efficiency can be increased to 7.
The diffraction efficiency of conventional metal diffusion gratings is around 0%, which is 4.
A much larger diffraction efficiency was obtained compared to 0% or less.
なお１本実施例では。Note that in this embodiment.
格子の本数は、９０本以上であった。The number of grids was 90 or more.
以上説明したように、本発明によれば、従来技術に比べ
て大きな回折効率を有する薄膜光回折格子素子が容易に
得られ、光合分波器をはじめとする光集積回路の形成技
術に大きく貢献できる効果を有する。As explained above, according to the present invention, a thin-film optical diffraction grating element with higher diffraction efficiency than conventional techniques can be easily obtained, and it will greatly contribute to the formation technology of optical integrated circuits such as optical multiplexers/demultiplexers. It has the effect of
第１図（ａ）〜（Ｑ）は１本発明の一実施例の導波路形
光回折素子の製造方法を示す工程断面図、第２図は、従
来の製造方法の一例の工程断面図、第３図は、従来の製
造方法の別の一例の工程断面図、第４図（ａ）は、第３
図の一部拡大工程断面図、第４図（ｂ）は、第４図（ａ
）の次の工程を示す工程断面図である。
１．２１．３１・・・基板、２．２２．５２・・・バッ
ファ層、３．２３．３３・・・導波路層、４．３４・・
・マスク層、５・・・下層ホトレジスト膜、６・・・上
層ホトレジスト膜、８・・・光回折格子、２６．５６・
・・単層ホトレジスト膜、２７・・・レジスト残渣、３
９・・・マスク残部。
−ＮｒＩ′）＋1(a) to (Q) are process cross-sectional views showing a method for manufacturing a waveguide-type optical diffraction element according to an embodiment of the present invention; FIG. 2 is a process cross-sectional view of an example of a conventional manufacturing method; FIG. 3 is a process sectional view of another example of the conventional manufacturing method, and FIG.
A partially enlarged cross-sectional view of the process, FIG. 4(b), is a partially enlarged cross-sectional view of FIG.
) is a process sectional view showing the next process. 1.21.31... Substrate, 2.22.52... Buffer layer, 3.23.33... Waveguide layer, 4.34...
・Mask layer, 5... Lower layer photoresist film, 6... Upper layer photoresist film, 8... Optical diffraction grating, 26.56.
...Single layer photoresist film, 27...Resist residue, 3
9...Remaining part of the mask. −NrI′)+
Claims (1)
膜を上下方向に少なくとも２層形成する工程と、上記ホ
トレジスト膜をパターニングする工程と、上記パターニ
ングされたホトレジスト膜を有する上記導波路層の表面
上にマスク層を形成する工程と、上記パターニングされ
たホトレジスト膜を除去する工程と、上記マスク層をマ
スクとして上記導波路層をエッチングする工程と、上記
マスク層を除去する工程とを具備することを特徴とする
導波路層形光回折素子の製造方法。1. A step of forming at least two layers of photoresist films having different photosensitivity in the vertical direction on the surface of the waveguide layer, a step of patterning the photoresist film, and a step of forming the waveguide layer having the patterned photoresist film. The method includes the steps of forming a mask layer on the surface, removing the patterned photoresist film, etching the waveguide layer using the mask layer as a mask, and removing the mask layer. A method for manufacturing a waveguide layered optical diffraction element, characterized in that:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10420787A JPS63271206A (en) | 1987-04-30 | 1987-04-30 | Production of waveguide type optical circuit element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10420787A JPS63271206A (en) | 1987-04-30 | 1987-04-30 | Production of waveguide type optical circuit element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63271206A true JPS63271206A (en) | 1988-11-09 |
Family
ID=14374526
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10420787A Pending JPS63271206A (en) | 1987-04-30 | 1987-04-30 | Production of waveguide type optical circuit element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63271206A (en) |
-
1987
- 1987-04-30 JP JP10420787A patent/JPS63271206A/en active Pending
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