JPS6322404B2 - - Google Patents
Info
- Publication number
- JPS6322404B2 JPS6322404B2 JP57122296A JP12229682A JPS6322404B2 JP S6322404 B2 JPS6322404 B2 JP S6322404B2 JP 57122296 A JP57122296 A JP 57122296A JP 12229682 A JP12229682 A JP 12229682A JP S6322404 B2 JPS6322404 B2 JP S6322404B2
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- resistance
- transparent
- low
- gas discharge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000007747 plating Methods 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 229910052751 metal Inorganic materials 0.000 description 11
- 239000002184 metal Substances 0.000 description 11
- 238000000034 method Methods 0.000 description 10
- 239000000758 substrate Substances 0.000 description 9
- 239000010410 layer Substances 0.000 description 8
- 239000011521 glass Substances 0.000 description 6
- 238000005530 etching Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 239000011241 protective layer Substances 0.000 description 3
- 239000003054 catalyst Substances 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J9/00—Apparatus or processes specially adapted for the manufacture, installation, removal, maintenance of electric discharge tubes, discharge lamps, or parts thereof; Recovery of material from discharge tubes or lamps
- H01J9/02—Manufacture of electrodes or electrode systems
- H01J9/14—Manufacture of electrodes or electrode systems of non-emitting electrodes
Description
【発明の詳細な説明】
発明の技術分野
本発明は少なくとも片側基板上の一部に透明電
極を有するガス放電パネルに係り、特に実質的に
透明な低抵抗透明電極を備えたガス放電パネルの
製造方法に関するものである。TECHNICAL FIELD OF THE INVENTION The present invention relates to gas discharge panels having transparent electrodes on a portion of at least one substrate, and more particularly to the manufacture of gas discharge panels with substantially transparent low resistance transparent electrodes. It is about the method.
従来技術と問題点
従来、この種のガス放電パネルの低抵抗透明電
極を形成するために、インジウム・すず酸化物
（以下ITOと略称する）等の低比抵抗材料の開発
と、透明でかつ厚い膜を形成する蒸着技術の改良
が行われてきた。Conventional technology and problems Conventionally, in order to form low-resistance transparent electrodes for this type of gas discharge panel, the development of low-resistivity materials such as indium tin oxide (hereinafter abbreviated as ITO) and the development of transparent and thick electrodes. Improvements have been made to the deposition techniques for forming films.
しかし、ITOは、比抵抗が10-4Ω・cm以上で熱
処理によつてはさらに大きくなる欠点があり、し
かも数μの膜で電極抵抗が3Ω／□程度までの導
電膜が得られるが、透過率が70％程度でありかつ
蒸着に非常に時間がかかるという欠点がある。ま
た3Ω／□程度の抵抗の透明導電膜では短辺が10
cm以上の表示面積を有するガス放電パネルは実現
が困難である。 However, ITO has the disadvantage that it has a specific resistance of 10 -4 Ω・cm or more, which increases even more with heat treatment.Moreover, a conductive film with an electrode resistance of up to 3 Ω/□ can be obtained with a film of a few microns. The disadvantages are that the transmittance is about 70% and the deposition takes a very long time. In addition, in a transparent conductive film with a resistance of about 3Ω/□, the short side is 10
A gas discharge panel with a display area of cm or more is difficult to realize.
発明の目的
本発明は上述の欠点を解決するためのもので、
抵抗が100Ω／□以上の透明導電膜を用いて実質
的に抵抗が3Ω／□以下の透明導電膜を用いたの
と等価の透明電極を実現できるガス放電パネルの
製造方法を提供することを目的としている。OBJECT OF THE INVENTION The present invention aims to solve the above-mentioned drawbacks.
The purpose of the present invention is to provide a method for manufacturing a gas discharge panel that uses a transparent conductive film with a resistance of 100 Ω/□ or more to realize a transparent electrode that is substantially equivalent to using a transparent conductive film with a resistance of 3 Ω/□ or less. It is said that
発明の構成
本発明では、上述の目的を達成するため、
100Ω／□程度の抵抗の透明電極をパターニング
した後、該透明電極のエツジ部分にメツキにより
不透明な低抵抗部分を形成し、このようにするこ
とによつて、電極抵抗を3Ω／□以下に減少させ
かつ実質的には透明である低抵抗透明電極が得ら
れるようにしたものである。Structure of the Invention In order to achieve the above-mentioned object, the present invention has the following features:
After patterning a transparent electrode with a resistance of about 100Ω/□, an opaque low-resistance part is formed by plating at the edge of the transparent electrode, and by doing this, the electrode resistance is reduced to 3Ω/□ or less. This makes it possible to obtain a low-resistance transparent electrode that is transparent and substantially transparent.
発明の実施例
以下、図面に関連して本発明の実施例を説明す
る。Embodiments of the invention Hereinafter, embodiments of the invention will be described with reference to the drawings.
ガラス基板上への低抵抗透明電極の形成は次の
手順により行われる。 Formation of a low resistance transparent electrode on a glass substrate is performed by the following procedure.
まず、第１図ａに示すように、ガラス基板１の
上に抵抗が100Ω／□程度の透明導電膜２、およ
びメツキ層との密着性が良く焼成後に無電界メツ
キでCu，Ni，Au等の金属を付着形成できる透明
なキヤタペースト層３を順次形成し、その上にレ
ジストパターン４を形成する。 First, as shown in Fig. 1a, a transparent conductive film 2 with a resistance of about 100 Ω/□ is placed on a glass substrate 1, and Cu, Ni, Au, etc. are coated on top of a glass substrate 1 by electroless plating after baking, which has good adhesion to the plating layer. A transparent catalyst paste layer 3 to which a metal can be deposited is successively formed, and a resist pattern 4 is formed thereon.
次にレジストパターン４をマスクとしてエツチ
ングを行つて第１図ｂに示すようにキヤタペース
ト層３、透明導電膜２をパターニングした後、レ
ジストパターン４を付けたままキヤタペーストの
側面にメツキにより低抵抗金属電極（低抵抗部
分）５を形成した後、レジストパターン４を除去
する。金属電極５は、耐熱性が必要な場合はCu
とCr等の２層に形成する。このように形成され
た電極は、電極エツジ部分は不透明であるが、低
抵抗金属電極５が形成されており、透明導電膜は
抵抗が高くてもエツジ部分で金属電極５と導通す
るため、電極ライン長さ方向では低抵抗となる。
従つて電極幅が150μｍ、長さが15cmで抵抗300Ω
以下に容易に形成することができ、また電極幅の
大部分は透明であるため、実質的に抵抗が
0.3Ω／□以下の透明電極を使用したときと等価
になる。 Next, etching is performed using the resist pattern 4 as a mask to pattern the kyata paste layer 3 and the transparent conductive film 2 as shown in FIG. After forming the (low resistance portion) 5, the resist pattern 4 is removed. The metal electrode 5 is made of Cu if heat resistance is required.
It is formed into two layers of Cr and Cr. In the electrode formed in this way, the electrode edge portion is opaque, but the low resistance metal electrode 5 is formed, and even if the transparent conductive film has high resistance, it is electrically connected to the metal electrode 5 at the edge portion, so the electrode edge portion is opaque. The resistance is low in the line length direction.
Therefore, the electrode width is 150μm, the length is 15cm, and the resistance is 300Ω.
Since most of the electrode width is transparent, there is virtually no resistance.
This is equivalent to using a transparent electrode of 0.3Ω/□ or less.
このようにして実質的に低抵抗の透明電極を形
成したガラス基板１上に第２図に示すように、絶
縁層６、保護層７を順次形成し、このガラス基板
１と銀電極等の不透明電極８、絶縁層９、保護層
１０を形成した他の基板１１とを対向させて対向
面周辺部をシール部材１２を介し接着、封止し、
これにより形成される密封空間１３内にNe―Xe
混合ガスを封入してガス放電パネルが形成され
る。 As shown in FIG. 2, an insulating layer 6 and a protective layer 7 are sequentially formed on the glass substrate 1 on which a substantially low-resistance transparent electrode is formed. Another substrate 11 on which the electrode 8, the insulating layer 9, and the protective layer 10 are formed is made to face each other, and the periphery of the opposing surface is bonded and sealed via the sealing member 12,
In the sealed space 13 formed by this, Ne-Xe
A gas discharge panel is formed by enclosing a mixed gas.
このように形成されたガス放電パネルは、電極
抵抗が小さいため動作マージンが大きく、しかも
低抵抗金属電極５が透明電極のエツジ部分にのみ
形成されているため、放電による発光１４はその
ほとんどが透過するため高輝度のガス放電パネル
が実現できる。 The gas discharge panel formed in this way has a large operating margin due to its low electrode resistance, and since the low-resistance metal electrode 5 is formed only at the edge of the transparent electrode, most of the light emitted 14 due to the discharge is transmitted. Therefore, a high brightness gas discharge panel can be realized.
透明電極のエツジ部分に対する他の低抵抗金属
電極形成方法を第３図に示す。 Another method of forming low resistance metal electrodes on the edge portions of transparent electrodes is shown in FIG.
本例の場合は、第３図ａに示すように、ガラス
基板１０１上に形成された透明導電膜（透明電
極）１０２の上にメツキ下地となるCr―Cu等の
電極１０３を全面に形成し、さらにその上にレジ
ストパターン１０４を形成する。 In the case of this example, as shown in FIG. 3a, an electrode 103 made of Cr--Cu or the like is formed on the entire surface of a transparent conductive film (transparent electrode) 102 formed on a glass substrate 101 to serve as a plating base. Then, a resist pattern 104 is further formed thereon.
次に等方性エツチングを行うと、電極１０３の
側面がレジストパターン１０４との境界部から次
第に円弧状にエツチングされてエツジ部分にテー
パが形成される。なおこのような等方性エツチン
グの方法は周知である。このようにしてテーパー
エツチング面を形成した後、レジストパターン１
０４をつけたままAu，Ni等のメツキを行つて、
テーパーエツジ部分に第３図ｂに示すごとく低抵
抗金属電極（低抵抗部分）１０５を形成する。 Next, when isotropic etching is performed, the side surface of the electrode 103 is gradually etched into an arc shape from the boundary with the resist pattern 104, and a taper is formed at the edge. Note that such an isotropic etching method is well known. After forming the tapered etched surface in this way, resist pattern 1
Plating Au, Ni, etc. with 04 attached,
A low resistance metal electrode (low resistance portion) 105 is formed on the tapered edge portion as shown in FIG. 3b.
最後に、レジストパターン１０４を除去し抵抵
抗金属電極１０５をマスクとして電極１０３をエ
ツチングすれば、第３図ｃに示すように透明電極
のエツジ部分にのみ低抵抗金属電極１０５が形成
され、電極ライン長さ方向の抵抗が低く電極全体
でみると殆ど透明で、実質的に低抵抗透明電極と
等価な電極が得られる。 Finally, by removing the resist pattern 104 and etching the electrode 103 using the resistive metal electrode 105 as a mask, the low-resistance metal electrode 105 is formed only on the edge portion of the transparent electrode, as shown in FIG. The resistance in the longitudinal direction is low and the entire electrode is almost transparent, making it possible to obtain an electrode that is substantially equivalent to a low-resistance transparent electrode.
この場合は、キヤタペースト等の厚膜技術を用
いないので微細パターンを形成することができ、
また高温熱処理工程を通さないという利点があ
る。なお、透明導電膜をパターニングし、そのエ
ツジ部分に直接金属メツキすることも可能であ
る。 In this case, fine patterns can be formed because thick film technology such as Kyata paste is not used.
It also has the advantage of not passing through a high-temperature heat treatment process. Note that it is also possible to pattern the transparent conductive film and directly plate the edges with metal.
本発明は、AC形ガス放電パネルだけでなく、
DC形ガス放電パネルが他の低抵抗透明電極を必
要とするデバイスにも応用可能である。 The present invention is applicable not only to AC type gas discharge panels, but also to
DC type gas discharge panels can also be applied to other devices requiring low resistance transparent electrodes.
発明の効果
以上述べたように、本発明によれば、実質的に
非常に低抵抗の透明電極を形成することができる
ため、大型でしかも動作マージンの大きい高輝度
ガス放電パネルを得ることができ、しかも低抵抗
透明電極の形成は容易である。Effects of the Invention As described above, according to the present invention, since it is possible to form a transparent electrode with substantially very low resistance, it is possible to obtain a large-sized, high-intensity gas discharge panel with a large operating margin. Furthermore, it is easy to form a low resistance transparent electrode.
図面は本発明に係るガス放電パネルの製造方法
の実施例を示すもので、第１図ａ，ｂは実質的に
低抵抗の透明電極形成工程図、第２図は本発明の
方法により製造されたガス放電パネルの構造図、
第３図ａ，ｂ，ｃは他の低抵抗透明電極形成方法
を示す工程図である。
図中、１，１０１はガラス基板、２，１０２は
透明導電膜、３はキヤタペースト層、４，１０４
はレジストパターン、５，１０５はメツキにより
形成された低抵抗金属電極（低抵抗部分）、６，
９は絶縁層、７，１０は保護層、８は不透明電
極、１１は基板、１２はシール部材、１３は密封
空間である。
The drawings show an example of the method for manufacturing a gas discharge panel according to the present invention, and FIGS. 1a and 1b are process diagrams for forming transparent electrodes with substantially low resistance, and FIG. Structure diagram of gas discharge panel,
FIGS. 3a, 3b, and 3c are process diagrams showing another method of forming a low-resistance transparent electrode. In the figure, 1,101 is a glass substrate, 2,102 is a transparent conductive film, 3 is a catalyst paste layer, 4,104
is a resist pattern, 5, 105 is a low resistance metal electrode (low resistance part) formed by plating, 6,
9 is an insulating layer, 7 and 10 are protective layers, 8 is an opaque electrode, 11 is a substrate, 12 is a sealing member, and 13 is a sealed space.
Claims (1)
または１０２）を有するガス放電パネルの製造方
法において、前記透明電極（２または１０２）を
パターニングした後に該透明電極（２または１０
２）のエツジ部分にメツキにより低抵抗部分（５
または１０５）を形成したことを特徴とするガス
放電パネルの製造方法。1 A transparent electrode (2
or 102), in which the transparent electrode (2 or 102) is patterned and then the transparent electrode (2 or 102) is patterned;
A low resistance part (5) is formed by plating the edge part of 2).
or 105). A method for producing a gas discharge panel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57122296A JPS5914237A (en) | 1982-07-14 | 1982-07-14 | Production method of gas discharge panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57122296A JPS5914237A (en) | 1982-07-14 | 1982-07-14 | Production method of gas discharge panel |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5914237A JPS5914237A (en) | 1984-01-25 |
| JPS6322404B2 true JPS6322404B2 (en) | 1988-05-11 |
Family
ID=14832441
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57122296A Granted JPS5914237A (en) | 1982-07-14 | 1982-07-14 | Production method of gas discharge panel |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5914237A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61139559U (en) * | 1985-02-20 | 1986-08-29 | ||
| US6380677B1 (en) | 1998-07-16 | 2002-04-30 | Lg Electronics Inc. | Plasma display panel electrode |
| JP3960064B2 (en) * | 2002-02-05 | 2007-08-15 | 松下電器産業株式会社 | Method for manufacturing plasma display panel |
-
1982
- 1982-07-14 JP JP57122296A patent/JPS5914237A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5914237A (en) | 1984-01-25 |
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