JPS63221325A - Thin film transistor matrix - Google Patents

Thin film transistor matrix

Info

Publication number
JPS63221325A
JPS63221325A JP62057202A JP5720287A JPS63221325A JP S63221325 A JPS63221325 A JP S63221325A JP 62057202 A JP62057202 A JP 62057202A JP 5720287 A JP5720287 A JP 5720287A JP S63221325 A JPS63221325 A JP S63221325A
Authority
JP
Japan
Prior art keywords
line
bus
bus line
short
opening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62057202A
Other languages
Japanese (ja)
Inventor
Atsushi Inoue
淳 井上
Kenichi Oki
沖 賢一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62057202A priority Critical patent/JPS63221325A/en
Publication of JPS63221325A publication Critical patent/JPS63221325A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/1306Details
    • G02F1/1309Repairing; Testing
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136259Repairing; Defects
    • G02F1/136263Line defects

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Liquid Crystal (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

PURPOSE:To permit elimination of a short-circuit generated in a crossing part of two bus lines by providing the slit-shaped aperture of one bus line in such a manner that both ends thereof project to both transverse sides of the other bus line. CONSTITUTION:The slit-shaped aperture 4 along the direction of the gate bus line 2 is provided to the crossing part 3 of said line with the drain bus line 1 at the time of forming the bus lines 2 on a transparent insulating substrate. The aperture 4 is formed to the shape that both ends thereof project to the transverse sides of the line 1. A very small area 7 enclosed by two pieces of laser trimming parts 6 and the aperture 4 can be electrically separated from the line 2 by cutting the line 2 from both ends of the aperture 4 toward either of the transverse sides of the line 2 by a laser trimmer, etc. Selection of the cutting line in such a manner that a short-circuit part 5 enters the area 7 is, therefore, satisfactory if the short-circuit defect exists in the crossing part 3. The area 7 is thereby connected only to the line 1 and is isolated from the line 2. The short-circuiting between the two bus lines is thus eliminated.

Description

【発明の詳細な説明】 〔概 要〕 本発明は透明絶縁性基板上に行方向および列方向に配設
された2組のバスラインを有する薄膜トランジスタマト
リクスにおいて、上記2組のバスラインの各交差部に、
一方のバスラインの略中央部にそのバスラインの配設方
向に沿ったスリット状の開口を設け、且つこの開口両端
部が、他方のバスラインの幅方向両側に突出する如く形
成したことにより、該開口両端部を始点とする線分に沿
って一方のバスラインを一部切断することで、一方のバ
スラインの交差部の微小区域をもとのバスラインから電
気的に分離可能としたものである。
Detailed Description of the Invention [Summary] The present invention provides a thin film transistor matrix having two sets of bus lines arranged on a transparent insulating substrate in the row direction and column direction. In the department,
By providing a slit-shaped opening along the arrangement direction of one bus line approximately in the center of one bus line, and forming both ends of this opening to protrude to both sides of the other bus line in the width direction, By cutting a portion of one bus line along a line segment starting from both ends of the opening, a minute area at the intersection of one bus line can be electrically separated from the original bus line. It is.

〔産業上の利用分野〕[Industrial application field]

本発明は、液晶等の駆動に用いる薄膜トランジスタマト
リクスに関する。
The present invention relates to a thin film transistor matrix used for driving liquid crystals and the like.

〔従来の技術〕[Conventional technology]

アクティブマトリクス型表示装置は、画素対応にマトリ
クス状に配列した薄膜トランジスタでもって、液晶セル
を選択駆動する。
An active matrix display device selectively drives liquid crystal cells using thin film transistors arranged in a matrix corresponding to pixels.

この種の表示装置は、行方向および列方向に配設された
多数のドレインバスラインとゲートバスラインに電圧を
印加することにより、所望の薄膜トランジスタを選択し
て対応する画素の表示を行う。
This type of display device selects a desired thin film transistor and displays a corresponding pixel by applying voltages to a large number of drain bus lines and gate bus lines arranged in row and column directions.

かかる構造では第2図に示す如く、多数のドレインバス
ライン1とゲートバスライン2が行方向および列方向に
配設されているため、両者の交差部3が多数形成される
。この交差部3でバスライン1.2間の短絡が存在する
と、周知の如く表示画面上ではライン欠陥となり、致命
的な障害となる。
In such a structure, as shown in FIG. 2, a large number of drain bus lines 1 and gate bus lines 2 are arranged in the row direction and column direction, so that a large number of intersections 3 between them are formed. If a short circuit exists between the bus lines 1 and 2 at this intersection 3, as is well known, it will become a line defect on the display screen, resulting in a fatal failure.

ドレインバスライン1とゲートバスライン2との交差部
における短絡は、主として、バスラインや層間絶縁膜等
を形成する際の各種膜の下地不良や、眉間絶縁膜のピン
ホール、または静電気等による絶縁破壊等である。この
ような短絡は、例えば1μm程度のごく小さな点状をな
し、交差部3の微小部分を占めるのみである。従ってこ
の部分を切除することができれば、表示装置を無欠陥と
なし得る性格のものである。
A short circuit at the intersection of the drain bus line 1 and the gate bus line 2 is mainly caused by poor grounding of various films when forming the bus line or interlayer insulating film, pinholes in the glabella insulating film, or insulation caused by static electricity, etc. Destruction, etc. Such a short circuit is in the form of a very small point of, for example, about 1 μm, and occupies only a minute portion of the intersection 3. Therefore, if this portion can be removed, the display device can be made defect-free.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

基板上に形成された薄膜等の微小部分を切除する手段と
して、レーザトリマのうよなものが知られている。これ
を用いると、薄膜の一部分を切除することは可能である
が、絶縁膜を挟んで積層された2つの導電膜の一部分を
、両者間の絶縁性を損なうことなく切除することは困難
である。
A laser trimmer is known as a means for cutting a minute portion such as a thin film formed on a substrate. Using this method, it is possible to remove a portion of a thin film, but it is difficult to remove a portion of two conductive films stacked with an insulating film in between without damaging the insulation between them. .

上述の薄膜トランジスタマトリクスにおいて発生する短
絡は、導電性を有する2つのバスラインが絶縁膜を介し
て対向する部分で発生するため、上記レーザトリマ等に
よって短絡部分を切除することは、実際上はきわめて困
難である。
The short circuit that occurs in the above-mentioned thin film transistor matrix occurs at the part where the two conductive bus lines face each other with an insulating film interposed between them, so it is actually extremely difficult to cut out the short circuit part using the laser trimmer or the like. be.

そこで本発明は薄膜トランジスタマトリクスのバスライ
ン間で発生した短絡個所を、レーザトリマにより切除可
能とし、もってバスライン間の短絡を容易に修復し得る
ようにすることを目的とする。
SUMMARY OF THE INVENTION Therefore, it is an object of the present invention to make it possible to remove short circuits between bus lines of a thin film transistor matrix using a laser trimmer, thereby making it possible to easily repair short circuits between bus lines.

〔問題点を解決するための手段〕[Means for solving problems]

本発明においては、基板上に行方向および列方向に配設
された2つのバスラインの交差部において、一方のバス
ラインにその配設方向に沿ったスリット状の開口を、そ
の開口の両端部が他方のバスラインの幅方向両側に突出
する如く設けた構成を採っている。
In the present invention, at the intersection of two bus lines arranged in the row and column directions on a substrate, a slit-shaped opening is formed in one of the bus lines along the arrangement direction, and both ends of the opening are formed. The two bus lines are arranged so as to protrude from both sides in the width direction of the other bus line.

〔作 用〕[For production]

上記スリット状の開口を設けたバスラインを、開口両端
を始点とする線分に沿って幅方向にレーザトリマ等によ
り切断するのみで、この切断線と上記スリット状の開口
とに抱かれた微小区域を、もとのバスラインから切り離
すことができる。
By simply cutting the bus line provided with the slit-shaped opening in the width direction along a line segment starting from both ends of the opening using a laser trimmer, etc., a minute area surrounded by this cutting line and the slit-shaped opening can be obtained. can be separated from the original bus line.

交差部におけるバスライン間の短絡は、主として下層の
バスラインのエツジ部でスポット状に発生する。従って
レーザトリマ等により、上記開口から見てこの短絡部が
存在する方に向かって、上述のようにバスラインを切断
することにより、短絡部を含む微小区域をもとのバスラ
インとは電気的に無縁なものすることができる。
Short circuits between bus lines at intersections mainly occur in spots at the edges of the underlying bus lines. Therefore, by cutting the bus line as described above with a laser trimmer or the like toward the direction where the short circuit exists when viewed from the opening, the minute area including the short circuit can be electrically separated from the original bus line. It can be something unrelated.

〔実 施 例〕〔Example〕

以下本発明の一実施例を第1図(a)、 (b)を参照
しながら説明する。
An embodiment of the present invention will be described below with reference to FIGS. 1(a) and 1(b).

本実施例においては同図(alに見られるように、透明
絶縁性基板1例えばガラス基板上に、ゲート電極2′を
含むゲートバスライン2を形成する際に、ドレインバス
ラインlとの交差部3に、ゲートバスライン2の配設方
向に沿ったスリット状の開口4を設けた。
In this embodiment, as shown in FIG. 3 is provided with a slit-shaped opening 4 along the direction in which the gate bus line 2 is arranged.

この開口4の大きさは、幅凡そ5μm、長さ約40μm
であって、その両端部は交差するドレインバスライン1
の幅方向両側に突き出た形状とする。
The size of this opening 4 is approximately 5 μm in width and approximately 40 μm in length.
The drain bus lines 1 intersect with each other at both ends thereof.
The shape should protrude from both sides in the width direction.

ドレインバスライン10幅方向両側に突き出ている開口
4の両端部から、同図伽)に示すように、ゲートバスラ
イン2の幅方向(配設方向に直交する方向)のいずれか
一方に向かって、レーザトリマ等によってゲートバスラ
イン2を切断することにより、2個のレーザトリミング
部6と開口4とによって抱かれた微小区域7を、もとの
ゲートバスライン2から電気的に分離できる。
From both ends of the opening 4 protruding on both sides in the width direction of the drain bus line 10, as shown in the same figure (Fig. By cutting the gate bus line 2 with a laser trimmer or the like, the minute area 7 surrounded by the two laser trimming parts 6 and the opening 4 can be electrically separated from the original gate bus line 2.

従ってドレインバスライン1とゲートバスライン2との
交差部3に短絡欠陥が存在する場合にはその短絡部5が
、開口4及びこの間口4の両端部を始点とする線分く図
のレーザトリミング部6)とに抱かれた微小区域7内に
入るように、上述の切断方向を選択すればよい。
Therefore, if a short-circuit defect exists at the intersection 3 between the drain bus line 1 and the gate bus line 2, the short-circuit defect 5 is removed by laser trimming of the opening 4 and the line segment starting from both ends of the opening 4. The above-mentioned cutting direction may be selected so as to enter the micro area 7 surrounded by the portion 6).

即ち、開口4の両端部からの切断方向を、開口4から見
て短絡部5が存在する方向に選べばよいこのように本実
施例ではもし交差部3にバスライン間の短絡が発生して
も、その短絡部5を含む微小区域7を一方のバスライン
(図ではゲートバスライン2)から切り離すことにより
、上記微小区域7は電気的には他方のバスライン(図で
はドレインバスライン1)にのみ接続し、一方のバスラ
インとは無縁のものとなり、2つのバスライン間の短絡
は解消される。
That is, the cutting direction from both ends of the opening 4 can be selected in the direction in which the short circuit 5 exists when viewed from the opening 4. In this way, in this embodiment, if a short circuit occurs between the bus lines at the intersection 3, However, by separating the minute area 7 including the short-circuit portion 5 from one bus line (gate bus line 2 in the figure), the minute area 7 is electrically connected to the other bus line (drain bus line 1 in the figure). The bus line is connected only to the bus line, and is unrelated to one of the bus lines, eliminating the short circuit between the two bus lines.

従って交差部3において短絡が生じても、本実施例では
その短絡を修復し、線欠陥は勿論点欠陥となることもな
く、良質の表示を得ることができる。
Therefore, even if a short circuit occurs at the intersection 3, the short circuit is repaired in this embodiment, and a high-quality display can be obtained without becoming a point defect, let alone a line defect.

なお上記一実施例では、スリット状の開口4を、  ゲ
ートバスライン2に設けた例を示したが、この間口4は
ドレインバスライン1に設けてもよく、また開口4を設
けるバスラインは上層に形成されるものであっても、下
層に形成されるものであっても良いことは、容易に理解
されよう。
In the above embodiment, the slit-shaped opening 4 is provided in the gate bus line 2, but this opening 4 may also be provided in the drain bus line 1, and the bus line provided with the opening 4 may be provided in the upper layer. It will be easily understood that it may be formed on the top layer or on the lower layer.

。  〔発明の効果〕 以上説明した如く本発明によれば、薄膜トランジスタマ
トリクスの交差部で短絡が発生しても、短絡部をレーザ
トリマ等によって容易に切り離すことが可能であり、そ
の結果短絡を解消できる。
. [Effects of the Invention] As explained above, according to the present invention, even if a short circuit occurs at the intersection of the thin film transistor matrix, the short circuit can be easily separated by a laser trimmer or the like, and as a result, the short circuit can be eliminated.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)及び山)は本発明一実施例構成説明図、第
2図は従来の薄膜トランジスタマトリクスの説明図であ
る。 図において、1はドレインバスライン、2はゲートハス
ライン、3は交差部、4はスリット状の開口、5は短絡
部、6はレーザトリミング部、7第1図
FIG. 1(a) and crest) are explanatory diagrams of the configuration of an embodiment of the present invention, and FIG. 2 is an explanatory diagram of a conventional thin film transistor matrix. In the figure, 1 is a drain bus line, 2 is a gate lot line, 3 is an intersection, 4 is a slit-shaped opening, 5 is a short circuit, 6 is a laser trimming part, 7

Claims (1)

【特許請求の範囲】[Claims] 透明絶縁性基板上に配列された複数の薄膜トランジスタ
マトリクスを駆動すべく行方向および列方向に配設され
た2つのバスラインの交差部において、一方のバスライ
ンの略中央部にその配設方向に沿ったスリット状の開口
を、該開口の両端部が他方のバスラインの幅方向両側に
突出する如く設け、該開口両端部を始点とする線分に沿
って前記一方のバスラインの一部を切断することにより
前記開口及び2本の切断線に抱かれた区域を、当該バス
ラインから分離可能としたことを特徴とする薄膜トラン
ジスタマトリクス。
At the intersection of two bus lines arranged in the row and column directions to drive a plurality of thin film transistor matrices arranged on a transparent insulating substrate, a bus line is installed approximately at the center of one of the bus lines in the arrangement direction. A slit-shaped opening along the line is provided so that both ends of the opening protrude to both sides in the width direction of the other bus line, and a part of the one bus line is formed along a line segment starting from both ends of the opening. 1. A thin film transistor matrix characterized in that by cutting, a region surrounded by the opening and two cutting lines can be separated from the bus line.
JP62057202A 1987-03-11 1987-03-11 Thin film transistor matrix Pending JPS63221325A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62057202A JPS63221325A (en) 1987-03-11 1987-03-11 Thin film transistor matrix

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62057202A JPS63221325A (en) 1987-03-11 1987-03-11 Thin film transistor matrix

Publications (1)

Publication Number Publication Date
JPS63221325A true JPS63221325A (en) 1988-09-14

Family

ID=13048910

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62057202A Pending JPS63221325A (en) 1987-03-11 1987-03-11 Thin film transistor matrix

Country Status (1)

Country Link
JP (1) JPS63221325A (en)

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5045753A (en) * 1989-03-28 1991-09-03 Sharp Kabushiki Kaisha Matrix display apparatus with repair wires
EP0458173A2 (en) * 1990-05-22 1991-11-27 Daimler-Benz Aktiengesellschaft Liquid crystal display device
US5303074A (en) * 1991-04-29 1994-04-12 General Electric Company Embedded repair lines for thin film electronic display or imager devices
WO1995012144A1 (en) * 1993-10-29 1995-05-04 Litton Systems Canada Limited Repairable bus structure for amlcd array
JPH08106108A (en) * 1994-10-05 1996-04-23 Fujitsu Ltd Thin-film transistor matrix and its production
JP2001147649A (en) * 1999-11-19 2001-05-29 Fujitsu Ltd Display device and its defect repair method
JP2007304557A (en) * 2006-05-09 2007-11-22 Lg Philips Lcd Co Ltd Liquid crystal display and method of fabricating the same
WO2008050501A1 (en) 2006-09-29 2008-05-02 Sharp Kabushiki Kaisha Display device and method of producing display device
JP2008268860A (en) * 2007-04-17 2008-11-06 Beijing Boe Optoelectronics Technology Co Ltd Liquid crystal display, and manufacturing method and repairing method thereof
JP2009288467A (en) * 2008-05-29 2009-12-10 Sony Corp Display device
US20100141849A1 (en) * 2007-02-09 2010-06-10 Kenji Enda Active matrix substrate, liquid crystal panel, liquid crystal display unit, liquid crystal display device, television receiver, active matrix substrate manufacturing method, and liquid crystal panel manufacturing method
US8351016B2 (en) 2007-04-23 2013-01-08 Sharp Kabushiki Kaisha Display device and manufacturing method of display device
US8363175B2 (en) 2007-06-28 2013-01-29 Sharp Kabushiki Kaisha Active matrix substrate, liquid crystal panel, liquid crystal display unit, liquid crystal display device, television receiver, and method of manufacturing liquid crystal panel

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61147285A (en) * 1984-12-21 1986-07-04 キヤノン株式会社 Display element and repair thereof

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61147285A (en) * 1984-12-21 1986-07-04 キヤノン株式会社 Display element and repair thereof

Cited By (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5045753A (en) * 1989-03-28 1991-09-03 Sharp Kabushiki Kaisha Matrix display apparatus with repair wires
EP0458173A2 (en) * 1990-05-22 1991-11-27 Daimler-Benz Aktiengesellschaft Liquid crystal display device
EP0458173A3 (en) * 1990-05-22 1992-07-22 Daimler-Benz Aktiengesellschaft Liquid crystal display device
US5303074A (en) * 1991-04-29 1994-04-12 General Electric Company Embedded repair lines for thin film electronic display or imager devices
WO1995012144A1 (en) * 1993-10-29 1995-05-04 Litton Systems Canada Limited Repairable bus structure for amlcd array
JPH08106108A (en) * 1994-10-05 1996-04-23 Fujitsu Ltd Thin-film transistor matrix and its production
JP2001147649A (en) * 1999-11-19 2001-05-29 Fujitsu Ltd Display device and its defect repair method
JP2007304557A (en) * 2006-05-09 2007-11-22 Lg Philips Lcd Co Ltd Liquid crystal display and method of fabricating the same
WO2008050501A1 (en) 2006-09-29 2008-05-02 Sharp Kabushiki Kaisha Display device and method of producing display device
US8228480B2 (en) 2006-09-29 2012-07-24 Sharp Kabushiki Kaisha Display device and manufacturing method of display device
US20100141849A1 (en) * 2007-02-09 2010-06-10 Kenji Enda Active matrix substrate, liquid crystal panel, liquid crystal display unit, liquid crystal display device, television receiver, active matrix substrate manufacturing method, and liquid crystal panel manufacturing method
US8319906B2 (en) * 2007-02-09 2012-11-27 Sharp Kabushiki Kaisha Active matrix substrate, liquid crystal panel, liquid crystal display unit, liquid crystal display device, television receiver, active matrix substrate manufacturing method, and liquid crystal panel manufacturing method
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