JPS63205974A - Manufacture of josephson junction - Google Patents

Manufacture of josephson junction

Info

Publication number
JPS63205974A
JPS63205974A JP62037800A JP3780087A JPS63205974A JP S63205974 A JPS63205974 A JP S63205974A JP 62037800 A JP62037800 A JP 62037800A JP 3780087 A JP3780087 A JP 3780087A JP S63205974 A JPS63205974 A JP S63205974A
Authority
JP
Japan
Prior art keywords
metal
mask
film
etching
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62037800A
Other languages
Japanese (ja)
Other versions
JPH0523510B2 (en
Inventor
Mutsuo Hidaka
睦夫 日高
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP62037800A priority Critical patent/JPS63205974A/en
Publication of JPS63205974A publication Critical patent/JPS63205974A/en
Publication of JPH0523510B2 publication Critical patent/JPH0523510B2/ja
Granted legal-status Critical Current

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  • Superconductor Devices And Manufacturing Methods Thereof (AREA)

Abstract

PURPOSE:To prevent an electrode film from being damaged and to enhance the reliability by a method wherein, after a contaminant on the surface of a metal used as an etching mask has been removed, an upper wiring part is formed on the surface of the metal. CONSTITUTION:After a lower electrode 12, a tunnel barrier layer 13 and an upper electrode 14 have been formed on an Si substrate 11, an Al film as a masking metal 15 is formed. Then, a resist pattern 16 is formed in a junction region; the metal 15 is etched by making use of the pattern as a mask. In succession, the pattern 16 is removed; after that, the upper electrode 14 is removed by making use of the metal as the mask. An organic coating film is coated on the whole surface and is flattened. Then, the assembly is etched until the surface of the metal 15 is exposed; an interlayer insulating film 17 is formed; a contaminant on the surface of the metal 15 is removed. Then, an upper wiring film is formed and is patterned so as to form an upper wiring part 18. By this setup, the electrode film is not damaged and the reliability is enhanced.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は超伝導集積回路等に用いるトンネル型ジョセフ
ソン接合の形成方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for forming a tunnel-type Josephson junction used in superconducting integrated circuits and the like.

(従来の技術) フォトレジストマスクを用いたドライエツチングで微細
パターンを形成する場合、フォトレジストマスクを薄く
するとパターンの解像度は高くなるが、エツチング耐性
が低くなるという欠点を有していた。このため、微細な
エッチンンパターンを精度よく得るために、第2図に示
す、エツチング耐性のある金属マスクを用いたエツチン
グ方法が用いられていた。
(Prior Art) When a fine pattern is formed by dry etching using a photoresist mask, the resolution of the pattern increases as the photoresist mask becomes thinner, but it has the disadvantage that etching resistance decreases. Therefore, in order to obtain fine etched patterns with high precision, an etching method using a metal mask having etching resistance, as shown in FIG. 2, has been used.

以下第2図を用いて従来の技術の説明を行う。The conventional technology will be explained below using FIG. 2.

被エツチング金属22上に比較的薄いマスク金属23を
成膜する。マスク金属23上にフォトレジストを塗布し
、露光、現像を行うことによってレジストチング方法を
用いて、第2図(c)に示すように被エツチング金属の
エツチングを行う、エツチング終了後、金属マスク25
を除去し、第2図(d)に示すエツチングパターンを得
る。
A relatively thin mask metal 23 is formed on the metal 22 to be etched. The metal to be etched is etched using a resist etching method by applying a photoresist on the mask metal 23, exposing it to light, and developing it as shown in FIG. 2(c). After etching, the metal mask 25 is etched.
is removed to obtain the etching pattern shown in FIG. 2(d).

(発明が解決しようとする問題点) 従来の技術で述べた金属マスクを用いたエツチング方法
では第2図(d)に示す金属マスク25を除去する工程
が問題となる0通常は、被エツチング金属22.より金
属マスク25の方がエツチングレートが大きいエツチン
グ条件でエツチングを行い金属マスク25を除去するが
、このとき基板21や被エツチング金属22表面が損傷
を受ける。。
(Problems to be Solved by the Invention) In the etching method using a metal mask as described in the prior art, there is a problem in the process of removing the metal mask 25 shown in FIG. 22. Etching is performed under etching conditions in which the etching rate of the metal mask 25 is higher than that of the metal mask 25 to remove the metal mask 25, but at this time, the surfaces of the substrate 21 and the metal 22 to be etched are damaged. .

特にニオブまたはニオブ化合物を電極材料に用いたジョ
セフソン接合のエツチングの場合、金属膜の加工に通常
用いる反応性イオンエツチングに。
Especially when etching Josephson junctions using niobium or niobium compounds as electrode materials, reactive ion etching is commonly used for processing metal films.

おいて一般に用いられるフッ素系ガス、塩素系ガスどち
らにもニオブがエツチングされやすいため、前記金属マ
スク25を除去する際に電極膜が大きな損傷を受けると
いう欠点を有していた。
Since niobium is easily etched by both the fluorine-based gas and the chlorine-based gas that are commonly used in the manufacturing process, the electrode film has the drawback of being severely damaged when the metal mask 25 is removed.

本発明は上記従来例の欠点を克服し、電極膜が損傷を受
けることのない、金属マスクを用いた高解像度のジョセ
フソン接合の製造方法を提供することを特徴としている
The present invention is characterized by overcoming the drawbacks of the above-mentioned conventional examples and providing a method for manufacturing a high-resolution Josephson junction using a metal mask in which the electrode film is not damaged.

(問題点を解決するための手段) 本発明によれば、超伝導体からなる下部電極と上部°電
極がトンネル障壁層を介して結合したトンネル型ジョセ
フソン接合の製造方法において、基板全面に前記下部電
極、前記トンネル障壁層、前記上部電極からなる接合構
成層を成膜する工程、前記接合構成層表面が酸化されて
いない状態で前記接合構成層上に金属膜を成膜する工程
、前記金属膜を加工し接合領域以外の部分を除去する工
程、前記金属膜をマスクとして前記接合領域以外の少く
とも前記上部電極をエツチング除去する工程、前記金属
膜表面上の酸化物等の汚染物を除去した後、超伝導体か
らなる上部配線を少くとも前記接合領域を含む領域に形
成する工程とを含み、前記上部配線形成後の前記金属膜
の膜厚が、近接効果によって生じる前記金属膜のコヒー
レンス長以下であることを特徴とするジョセフソン接合
の製造方法が得られる。
(Means for Solving the Problems) According to the present invention, in a method for manufacturing a tunnel-type Josephson junction in which a lower electrode and an upper electrode made of a superconductor are coupled via a tunnel barrier layer, the a step of forming a junction constituent layer consisting of a lower electrode, the tunnel barrier layer, and the upper electrode; a step of forming a metal film on the junction constituent layer in a state where the surface of the junction constituent layer is not oxidized; Processing the film to remove parts other than the bonding area; etching away at least the upper electrode other than the bonding area using the metal film as a mask; removing contaminants such as oxides on the surface of the metal film. and then forming an upper wiring made of a superconductor in a region including at least the junction region, the thickness of the metal film after the formation of the upper wiring is determined by the coherence of the metal film caused by the proximity effect. A method for manufacturing a Josephson junction characterized in that the length is less than or equal to the length of the Josephson junction is obtained.

(作用) ジョセフソン接合の電極材料に対してエラチン照点があ
った9本発明においては上記金属マスクを除去すること
なしに、表面の酸化物等の汚染物を除去しただけで、上
部配線をその上に形成しているため、前記金属マスク除
去に伴う電極膜損傷等の問題が生じない。
(Function) In the present invention, the electrode material of the Josephson junction had an elatin illumination point.9 In the present invention, the upper wiring can be removed by simply removing contaminants such as oxides on the surface without removing the metal mask. Since it is formed thereon, problems such as damage to the electrode film due to removal of the metal mask do not occur.

常伝導金属が超伝導金属に接している場合、近接効果に
よって常伝導金属のコヒーレンス長ξN程度の範囲にわ
たって、常伝導金属中に超伝導の波動関数のしみ出しが
生じる0本発明の方法を適用するとジョセフソン接合上
に常伝導金属を二つの超伝導体ではさんだSNS接合が
形成されるが、常伝導金属の膜厚がξN以下であれば一
定の臨界電流密度Jcまで、電圧を発生することなしに
超伝導電流が流れる。
When a normal conducting metal is in contact with a superconducting metal, the superconducting wave function seeps into the normal conducting metal over a range of approximately the coherence length ξN of the normal conducting metal due to the proximity effect.The method of the present invention is applied. Then, an SNS junction is formed on the Josephson junction with a normal conducting metal sandwiched between two superconductors, but if the film thickness of the normal conducting metal is less than ξN, a voltage can be generated up to a certain critical current density Jc. Superconducting current flows without

前記ξNは温度や金属中の電子のフェルミ速度、金属の
純度、結晶状態等によって異なるが、液体ヘリウム温度
(4,2k)で一般に数百nmから数μmnの程度であ
る。 − 前記、+cと常伝導金属の膜厚りの間にはJccexp
(−L/ξN)の関係式が成立するが、常伝導金属の常
伝導抵抗が非常に小さいためその比例係数は非常10分
間の熱酸化を施した5NIS接合(IはIn5ulat
or:絶縁膜)においても4 X lO’A/am2の
Jeが得られていることから、絶縁膜のないSNS接合
においてはJcはさらに桁違いに大きいと考えられる。
The ξN varies depending on the temperature, the Fermi velocity of electrons in the metal, the purity of the metal, the crystal state, etc., but is generally on the order of several hundred nanometers to several micrometers at the liquid helium temperature (4.2K). - As mentioned above, between +c and the film thickness of the normal conductive metal, there is Jccexp.
The relational expression (-L/ξN) holds true, but since the normal conduction resistance of the normal conduction metal is very small, its proportional coefficient is very small.
Since Je of 4 X 1O'A/am2 is obtained also in the case of (or: insulating film), Jc is considered to be an order of magnitude larger in an SNS junction without an insulating film.

超伝導集積回路等に用いられるジョセフソン接合のJc
が〜10’A/am′程度であることを考えると、ジョ
セフソン接合の上にSNS接合が存在しても、その常伝
導金属の膜厚がコヒーレンス長ξN以下であれば、ジョ
セフソン接合の動作に影響を及ぼすことはない。
Josephson junction Jc used in superconducting integrated circuits, etc.
Considering that is about ~10'A/am', even if there is an SNS junction on top of the Josephson junction, if the film thickness of the normal metal is less than the coherence length ξN, the Josephson junction is It has no effect on operation.

(実施例) 第1図は本発明の詳細な説明するための図である。以下
第1図を用いて本発明の詳細な説明を行う。
(Example) FIG. 1 is a diagram for explaining the present invention in detail. The present invention will be explained in detail below using FIG.

表面を熱酸化したシリコン基板ll上にニオブを厚さ3
00nmスパッタで成膜し下部電極12とする。
Niobium is deposited to a thickness of 3 on a silicon substrate whose surface has been thermally oxidized.
A film is formed by sputtering to a thickness of 00 nm to form the lower electrode 12.

下部電極12上にアルミニウムを6nmスパッタで成膜
し、表面を40Pa、10分間の酸化条件で熱酸化を行
いトンネル障壁層13を形成する0次に上部電極14と
してニオブを300nmスパッタで成膜する。続いて、
真空を破ることなしにマスク金EL15とじて、トれる
ことばない。
A 6 nm film of aluminum is formed on the lower electrode 12 by sputtering, and the surface is thermally oxidized under oxidation conditions of 40 Pa for 10 minutes to form a tunnel barrier layer 13.Next, a 300 nm film of niobium is formed as the upper electrode 14 by sputtering. . continue,
Mask gold EL15 can be closed without breaking the vacuum, so there is no chance of it coming off.

真空室外に取り出し、ポジ型レジストAZ−1350J
(商品名)を500nmスピン塗布した後、露光、現像
を行い、第1図(a)に示す接合領域を規定するレジス
トパターン16を形成する。このレジストパターン16
をマスクにして、アルゴンスパッタエツチングを行い、
レジストパターン16に覆われていないマスク金属15
を除去する。アルゴンガス圧2、OPa、エツチング電
力0.16w/crn”のエツチング条件でアルゴンス
パッタエツチングを行った場合、ニオブ、アルミニウム
、AZ1350Jのエツチングレートはそれぞれ2.O
nm/分、2.5nm/分、19nm/分である。レジ
ストパターン16領域以外のマスク金属15を完全に除
去するためにオーバーエツチング時間も含めて20分間
のアルゴンスパッタエツチングを行うと、^Z1350
Jは380nmエツチングされるが、このエツチングは
非常に異方的なエツチングであるため゛、横方向へのエ
ツチング等によるレジストの細りがおこらず、レジスト
パターン16の形状は正確にマスク金属15に転写され
る。またエツチングマスク材15が40nmと上部電極
14の300nmよりずっと薄いため、レジストパター
ン16もずっと薄くてすみ、フォトレジストの解像度が
向上する。
Take it out of the vacuum chamber and remove the positive resist AZ-1350J.
(trade name) to a thickness of 500 nm, exposure and development are performed to form a resist pattern 16 defining the bonding area shown in FIG. 1(a). This resist pattern 16
Perform argon sputter etching using as a mask.
Mask metal 15 not covered by resist pattern 16
remove. When argon sputter etching is performed under the etching conditions of argon gas pressure 2, OPa, and etching power 0.16 w/crn, the etching rate of niobium, aluminum, and AZ1350J is 2.0
nm/min, 2.5 nm/min, and 19 nm/min. When argon sputter etching is performed for 20 minutes including overetching time to completely remove the mask metal 15 other than the resist pattern 16 area, ^Z1350
J is etched by 380 nm, but since this etching is very anisotropic, thinning of the resist due to lateral etching does not occur, and the shape of the resist pattern 16 is accurately transferred to the mask metal 15. be done. Furthermore, since the etching mask material 15 is 40 nm, which is much thinner than the 300 nm of the upper electrode 14, the resist pattern 16 can also be much thinner, and the resolution of the photoresist is improved.

前記アルゴンスパッタエツチング終了後、基板力0.1
6w/am”のエツチング条件で反応性イオンエツチン
グを行い接合領域以外の上部電極14を除去する。上記
条件の反応性イオンエツチングにおいては、上部電極1
4の材料であるニオブは1100n /分のエツチング
レートでエツチングされ、オーバーエツチング時間も含
めて5分間のエツチングで上部電極14は完全に除去さ
れる。一方上記条件の反応性イオンエツチングではマス
ク金属15の材料であるアルミニウムのエツチングレー
トは、2nmZ分である。従ってアルミニウムは°、上
記5分間のエツチングの間に10nm Lかエツチング
されないため、接合領域を規定する前記上部電極14エ
ツチング終了後、接合領域上には厚さ30nmのマスク
金属15が残る(第1図(c))。
After finishing the argon sputter etching, the substrate force was 0.1
Reactive ion etching is performed under etching conditions of 6 w/am" to remove the upper electrode 14 other than the bonding area. In the reactive ion etching under the above conditions, the upper electrode 1
Niobium, which is the material No. 4, is etched at an etching rate of 1100 n/min, and the upper electrode 14 is completely removed by etching for 5 minutes including the over-etching time. On the other hand, in the reactive ion etching under the above conditions, the etching rate of aluminum, which is the material of the mask metal 15, is 2 nmZ. Therefore, only 10 nm of aluminum is etched during the 5-minute etching process, so after the etching of the upper electrode 14 that defines the bonding area is completed, a mask metal 15 with a thickness of 30 nm remains on the bonding area (first Figure (c)).

二酸化シリコン(Si02)をスパッタで400nm成
膜後、有機塗布膜を全面に塗布し表面を平坦にする。エ
ッチバック法を用いて前記有機塗布膜と5i02膜をマ
スク金属15の表面が現れるまでエツチングし、厚さ3
30nmの5i02からなる層間絶縁膜17ときの5i
02のエツチングレートは3nm/分であるので層間絶
縁膜17は15nm Lかエツチングされず、ジョセフ
ソン接合の動作を妨げることはない、ニオブを40nm
スパッタで成膜し、フォトレジストマスクを用いたCF
4による反応性イオンエツチングで加工することにより
上部配線18を形成する(第1図(e))。
After forming a film of silicon dioxide (Si02) to a thickness of 400 nm by sputtering, an organic coating film is applied to the entire surface to make the surface flat. The organic coating film and the 5i02 film are etched using an etch-back method until the surface of the mask metal 15 is exposed, and a thickness of 3
5i when the interlayer insulating film 17 is made of 5i02 with a thickness of 30 nm
Since the etching rate of 02 is 3 nm/min, the interlayer insulating film 17 is not etched at 15 nm and does not interfere with the operation of the Josephson junction.
CF deposited by sputtering and using a photoresist mask
The upper wiring 18 is formed by reactive ion etching according to No. 4 (FIG. 1(e)).

以上述べた本実施例によるジョセフソン接合の加工方法
においては、CF4ガスによる反応性イオンエツチング
によってほとんどエツチングされないアルミニウムをマ
スク金属15として用いているため、接合領域を規定す
る上部電極14のエツチングの際に、エツチングマスク
がレジストマスクを用いた場合のように細くなることが
なく、高いパターン転写精度を有する接合が得られる。
In the Josephson junction processing method according to the present embodiment described above, aluminum, which is hardly etched by reactive ion etching using CF4 gas, is used as the mask metal 15, so that when etching the upper electrode 14 that defines the junction area, aluminum is used as the mask metal 15. In addition, the etching mask does not become thinner as in the case where a resist mask is used, and a bond with high pattern transfer accuracy can be obtained.

また超伝導体であるニオブからなる上部電極14と上部
配線1Bにはさまれたマスク金属15は液体ヘリウム温
度(4,2K)で常伝導であるがその膜厚が20nmと
十分薄いため、(作用)の項で示した近接効果により、
十分大きな超伝導電流が流れるため、ジョセセスの信頼
性が向上する。
Furthermore, the mask metal 15 sandwiched between the upper electrode 14 made of niobium, which is a superconductor, and the upper wiring 1B is normal conductive at liquid helium temperature (4.2 K), but its film thickness is sufficiently thin at 20 nm, so ( Due to the proximity effect shown in the section
Because a sufficiently large superconducting current flows, the reliability of Joseses is improved.

(発明の効果) 以上説明したように本発明によるジョセフソン接合の製
造方法は、金属マスクを用いたジョセフソン接合の高精
度な加工が可能な上に、その金属マスクを除去する必要
がなく、従来金属マスク除去の際に生じていた電極膜の
損傷等がおこらず、ジョセフソン接合形成プロセスの信
頼性が向上するという利点を有する。
(Effects of the Invention) As explained above, the method for manufacturing a Josephson junction according to the present invention not only enables high-precision processing of a Josephson junction using a metal mask, but also eliminates the need to remove the metal mask. This method has the advantage that damage to the electrode film, which conventionally occurs when removing a metal mask, does not occur, and the reliability of the Josephson junction formation process is improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)〜(e)は、本発明の詳細な説明するため
の断面図、第2図(a)〜(d)は従来の技術を説明す
るための断面図である。 図において 11・・・基板      12・・・下部電極13・
・・トンネル障壁層 14・・・上部電極15・・・マ
スク金属   16・・・レジストパターン17・・・
層間絶縁膜   18・・・上部配線21・・・基板 
     22・・・被エツチング金属23・・・、マ
スク金属   24・・・レジストパターン25・・・
金属マスク
FIGS. 1(a) to 1(e) are sectional views for explaining the present invention in detail, and FIGS. 2(a) to 2(d) are sectional views for explaining the conventional technique. In the figure, 11...substrate 12... lower electrode 13.
...Tunnel barrier layer 14...Top electrode 15...Mask metal 16...Resist pattern 17...
Interlayer insulating film 18... Upper wiring 21... Substrate
22...Metal to be etched 23..., Mask metal 24...Resist pattern 25...
metal mask

Claims (1)

【特許請求の範囲】[Claims] 超伝導体からなる下部電極と上部電極がトンネル障壁層
を介して結合したトンネル型ジョセフソン接合の製造方
法において、基板全面に前記下部電極、前記トンネル障
壁層、前記上部電極からなる接合構成層を成膜する工程
、前記接合構成層表面が酸化されていない状態で前記接
合構成層上に金属膜を成膜する工程、前記金属膜を加工
し接合領域以外の部分を除去する工程、前記金属膜をマ
スクとして前記接合領域以外の少くとも前記上部電極を
エッチング除去する工程、前記金属膜表面上の汚染物を
除去した後、超伝導体からなる上部配線を少くとも前記
接合領域を含む領域に形成する工程とを含み、前記上部
配線形成後の前記金属膜の膜厚が、近接効果によつて生
じる前記金属膜のコヒーレンス長以下であることを特徴
とするジョセフソン接合の製造方法。
In a method for manufacturing a tunnel Josephson junction in which a lower electrode and an upper electrode made of a superconductor are coupled via a tunnel barrier layer, a junction constituent layer consisting of the lower electrode, the tunnel barrier layer, and the upper electrode is provided on the entire surface of the substrate. a step of forming a metal film on the bonding layer in a state where the surface of the bonding layer is not oxidized; a step of processing the metal film to remove a portion other than the bonding region; a step of etching away at least the upper electrode other than the bonding region using a mask as a mask, and after removing contaminants on the surface of the metal film, forming an upper wiring made of a superconductor in a region including at least the bonding region. A method for manufacturing a Josephson junction, characterized in that the thickness of the metal film after forming the upper wiring is equal to or less than a coherence length of the metal film caused by a proximity effect.
JP62037800A 1987-02-23 1987-02-23 Manufacture of josephson junction Granted JPS63205974A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62037800A JPS63205974A (en) 1987-02-23 1987-02-23 Manufacture of josephson junction

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62037800A JPS63205974A (en) 1987-02-23 1987-02-23 Manufacture of josephson junction

Publications (2)

Publication Number Publication Date
JPS63205974A true JPS63205974A (en) 1988-08-25
JPH0523510B2 JPH0523510B2 (en) 1993-04-02

Family

ID=12507582

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62037800A Granted JPS63205974A (en) 1987-02-23 1987-02-23 Manufacture of josephson junction

Country Status (1)

Country Link
JP (1) JPS63205974A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5646582A (en) * 1979-09-21 1981-04-27 Mitsubishi Electric Corp Formation of pattern of filmlike article
JPS61263180A (en) * 1985-05-16 1986-11-21 Agency Of Ind Science & Technol Manufacture of josephson junction element

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5646582A (en) * 1979-09-21 1981-04-27 Mitsubishi Electric Corp Formation of pattern of filmlike article
JPS61263180A (en) * 1985-05-16 1986-11-21 Agency Of Ind Science & Technol Manufacture of josephson junction element

Also Published As

Publication number Publication date
JPH0523510B2 (en) 1993-04-02

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