JPS63184486A - Cyclic type noise reducing device - Google Patents
Cyclic type noise reducing deviceInfo
- Publication number
- JPS63184486A JPS63184486A JP62015383A JP1538387A JPS63184486A JP S63184486 A JPS63184486 A JP S63184486A JP 62015383 A JP62015383 A JP 62015383A JP 1538387 A JP1538387 A JP 1538387A JP S63184486 A JPS63184486 A JP S63184486A
- Authority
- JP
- Japan
- Prior art keywords
- video signal
- band
- circuit
- signal
- input video
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 125000004122 cyclic group Chemical group 0.000 title claims abstract description 20
- 230000003111 delayed effect Effects 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 abstract description 3
- 206010047571 Visual impairment Diseases 0.000 description 8
- 238000010586 diagram Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 230000001934 delay Effects 0.000 description 3
- 125000002015 acyclic group Chemical group 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
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- Picture Signal Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
この発明は、巡回型雑音低減にともなう残像発生を、効
果的に抑制するようにした巡回型雑音低減装置に関する
。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a cyclic noise reduction device that effectively suppresses the generation of afterimages due to cyclic noise reduction.
［従来の技術］
映像信号のフィールド相関又はフレーム相関を利用して
雑音を低減する雑音低減装置のうち、単一の画像メモリ
を用い、雑音低減対象を巡回させることで等測的に複数
の画像メモリを用いたに等しい効果を得ることのできる
巡回型雑音低減装置は、非巡回型に比べて低コストで製
造できる魅力がある。[Prior Art] Among noise reduction devices that reduce noise using field correlation or frame correlation of a video signal, a single image memory is used and a plurality of images are isometrically generated by circulating the noise reduction target. A cyclic noise reduction device that can achieve the same effect as using a memory is attractive because it can be manufactured at a lower cost than an acyclic noise reduction device.
第３図に示す従来の巡回型雑音低減装置１は、入力映像
信号を、係数Ｋが１に満たない係数回路２を挟む一対の
減算器３．４に被減算入力として供給するとともに、減
算器４から得られる出力映像信号をフィールド又はフレ
ーム期間の遅延手段である画像メモリ５を介して減算器
３の減算入力とする構成をとる。入力映像信号は、減算
器３と係数回路２を通過したのち減算器４にて原信号か
ら減算されることで（１−Ｋ）倍され、一方減算器４の
出力で画像メモリ５にて遅延された遅延出力映像信号は
、減算器３と係数回路２及び減算器４を通ることでに倍
される。ここで、減算器３から得られる入力映像信号と
遅延出力映像信号の差分信号は、動きのある映像はどレ
ベルが大であり、動きの激しい映像では、雑音低減効果
を上げようとして係数Ｋを大に設定するほど、残像発生
が顕著になるといったジレンマがあった。The conventional cyclic noise reduction device 1 shown in FIG. The output video signal obtained from the subtracter 3 is input to the subtracter 3 via an image memory 5 which is a field or frame period delay means. The input video signal passes through a subtracter 3 and a coefficient circuit 2, and then is subtracted from the original signal in a subtracter 4 to be multiplied by (1-K), while the output of the subtracter 4 is delayed in an image memory 5. The delayed output video signal is multiplied by passing through a subtracter 3, a coefficient circuit 2, and a subtracter 4. Here, the level of the difference signal between the input video signal and the delayed output video signal obtained from the subtracter 3 is high for videos with movement, and for videos with rapid movement, the coefficient K is set to increase the noise reduction effect. The dilemma was that the higher the setting, the more noticeable the afterimage would be.
本例では、係数回路２自体を読み出し専用メモリ（ＲＯ
Ｍ）で構成し、その入力差分信号が一定レベルを越えた
ときに係数値を零に強制することで、信号巡回と雑音低
減を停止するよう、係数回路５に対しＳ字型の振幅制限
特性を設定していた。In this example, the coefficient circuit 2 itself is stored in a read-only memory (RO
M), and an S-shaped amplitude limiting characteristic is provided for the coefficient circuit 5 so that the coefficient value is forced to zero when the input difference signal exceeds a certain level, thereby stopping signal circulation and noise reduction. was set.
［発明が解決しようとする問題点」
上記従来の巡回型雑音低減装置ｌは、入力映像信号と遅
延出力映像信号の差分に、差分信号をアドレスとするＲ
ＯＭから読み出される固有の係数Ｋを乗算する構成であ
るため、画像メモリ５のほかにＲＯＭが必要であり、装
置全体の製造コストを押し上げる要因ともなり、さらに
ＲＯＭに記憶させた差分入力に対する係数乗算出力が、
零点を中心に点対称な８字関数により規定されるため、
動画部分に発生する過大な差分入力に対しては係数乗算
出力が零に強制され、雑音低減動作が中断されるが、第
４図に示したように、動きを表す差分信号が８字の変曲
点と端点の間にある場合は、差分信号と係数乗算された
出力の極性が逆になる結果、同図に点線で示したような
偽信号が発生してしまう問題点があった。[Problems to be Solved by the Invention] The above-mentioned conventional cyclic noise reduction device 1 uses an R, which uses the difference signal as an address, for the difference between the input video signal and the delayed output video signal.
Since the configuration is such that a unique coefficient K read out from the OM is multiplied, a ROM is required in addition to the image memory 5, which increases the manufacturing cost of the entire device. The output is
Since it is defined by an 8-figure function that is point symmetric around the zero point,
For excessive differential input that occurs in the moving image part, the coefficient multiplication output is forced to zero and the noise reduction operation is interrupted, but as shown in Figure 4, when the differential signal representing the movement is When the curve is between the curved point and the end point, the polarity of the output obtained by multiplying the difference signal by the coefficient is reversed, resulting in the generation of a false signal as shown by the dotted line in the figure.
［問題点を解決するための手段］
この発明は、上記問題点を解決したものであり、入力映
像信号を１フィールド又は１フレ一ム期間遅延し、これ
を巡回的に入力映像信号に加算することで雑音を低減す
る巡回型雑音低減装置であって、入力映像信号と遅延出
力映像信号の差分信号に、その主要帯域成分を強調する
帯域強調回路と、この帯域強調回路の出力を振幅制限す
る振幅制限回路と、この振幅制限回路の出力を前記帯域
強調回路とは逆の特性に従って帯域強調解除する帯域強
調解除回路とを設けて構成したことを特徴とするもので
ある。[Means for Solving the Problems] This invention solves the above problems by delaying the input video signal by one field or one frame period and adding this cyclically to the input video signal. This is a cyclic noise reduction device that reduces noise by using a differential signal between an input video signal and a delayed output video signal, and includes a band emphasis circuit that emphasizes the main band components, and an amplitude limit on the output of this band emphasis circuit. The present invention is characterized in that it is constructed by providing an amplitude limiting circuit and a band emphasizing circuit that cancels band emphasizing the output of the amplitude limiting circuit according to characteristics opposite to those of the band emphasizing circuit.
［作用］
この発明は、入力映像信号を１フィールド又は１フレ一
ム期間遅延し、これを巡回的に入力映像信号に加算する
ことで雑音を低減するさいに、入＝３＝
力映像信号と遅延出力映像信号の差分信号にその主要帯
域成分に帯域強調を施し、続いて一定の振幅制限を施し
たのち、前記帯域強調とは逆の特性に従って帯域強調を
解除することで、画面上での動きの部分の情報をもつ差
分信号のうち一定の振幅レベルを越える過大な動き信号
を重点的に抑圧し、この過大な動き信号が巡回型雑音低
減に供されることによる残像発生を、効果的に抑制する
。[Operation] This invention delays the input video signal by one field or one frame period and adds this cyclically to the input video signal to reduce noise. After band-emphasizing the main band components of the differential signal of the delayed output video signal, and then applying a certain amplitude limit, the band-emphasis is canceled according to the opposite characteristics to the above-mentioned band-emphasis. This method effectively suppresses excessive motion signals that exceed a certain amplitude level among differential signals that contain information about motion, and effectively prevents afterimages from occurring due to this excessive motion signal being subjected to cyclic noise reduction. to be suppressed.
［実施例］
以下、この発明の実施例について、第１．２図を参照し
て説明する。第１図は、この発明の巡回型雑音低減装置
の一実施例を示す回路構成図、第２図は、第１図に示し
た振幅制限回路の入・出力信号の信号波形図である。[Example] Hereinafter, an example of the present invention will be described with reference to FIG. 1.2. FIG. 1 is a circuit configuration diagram showing an embodiment of the cyclic noise reduction device of the present invention, and FIG. 2 is a signal waveform diagram of input/output signals of the amplitude limiting circuit shown in FIG. 1.
第１図中、巡回型雑音低減装置１１は、従来の係数回路
２に代え、帯域強調回路１２と振幅制限回路１３及び帯
域強調解除回路１４の直列接続回路が前段に接続された
係数器１５を設けたものである。勿論、係数器１５の係
数には、０≦Ｋ＜１なる条件下で設定される。帯域強調
回路１２は、人力映像信号と遅延出力映像信号の差分信
号に、その主要帯域成分を強調するものであり、この実
施例では低域強調回路で構成しである。振幅制限回路Ｉ
３は、帯域強調回路１２の出力を振幅制限するものであ
り、一定レベルを越える入力差分信号の振幅を一定値に
制限する飽和型の特性をもつ。In FIG. 1, a cyclic noise reduction device 11 includes a coefficient multiplier 15 in which, in place of the conventional coefficient circuit 2, a series connection circuit of a band emphasizing circuit 12, an amplitude limiting circuit 13, and a band emphasizing canceling circuit 14 is connected at the front stage. It was established. Of course, the coefficients of the coefficient unit 15 are set under the condition of 0≦K<1. The band emphasizing circuit 12 is for emphasizing the main band component of the difference signal between the human input video signal and the delayed output video signal, and in this embodiment is composed of a low frequency emphasizing circuit. Amplitude limiting circuit I
3 limits the amplitude of the output of the band emphasizing circuit 12, and has a saturation type characteristic that limits the amplitude of the input difference signal exceeding a certain level to a certain value.
帯域強調解除回路１４は、振幅制限回路１３の出力を前
記帯域強調回路Ｉ２とは逆の特性に従って帯域強調解除
するものであり、この実施例では高域強調回路で構成し
である。The band emphasis canceling circuit 14 cancels band emphasis on the output of the amplitude limiting circuit 13 according to characteristics opposite to those of the band emphasizing circuit I2, and in this embodiment is constituted by a high frequency emphasizing circuit.
ここで、振幅制限回路１３の入力である差分信号は、そ
の前段で低域強調されることで、その主要帯域成分が強
調されており、このため振幅制限回路１３では、低域成
分のうちの過大振幅成分が重点的に振幅制限を受けるこ
とになる。従って、動きのある映像については、その動
きの主要成分が、振幅制限回路１３にて効果的に抑圧さ
れることになる。また、振幅制限回路１３は、第２図に
示したように、振幅制限レベルを越える差分入力信号に
対しては、出力信号を一定レベルに振幅制限するだけで
あるため、偽信号が発生する余地はない。さらに、振幅
制限回路１３にて振幅制限された差分信号は、帯域強調
解除回路１４にて帯域強調を解除されるため、結局、映
像の動きを示す部分の信号は、最終的には振幅制限回路
１３にて振幅制限を免れた制限レベル以下の低レベルの
低域成分とともに抑圧される。従って、減算器３゜４間
で、動き情報が集中する低域成分だけを重点的に抑圧す
ることができ、残像を抑制しつつ雑音低減効果を挙げる
ことができる。Here, the difference signal that is input to the amplitude limiting circuit 13 is low-frequency emphasized in the previous stage, so that its main band components are emphasized. Excessive amplitude components will be subjected to amplitude limitation primarily. Therefore, for moving images, the main components of the movement are effectively suppressed by the amplitude limiting circuit 13. Furthermore, as shown in FIG. 2, the amplitude limiting circuit 13 only limits the amplitude of the output signal to a certain level for differential input signals that exceed the amplitude limiting level, so there is room for false signals to occur. There isn't. Furthermore, since the differential signal whose amplitude has been limited by the amplitude limiting circuit 13 has its band emphasis canceled by the band emphasis canceling circuit 14, the signal of the portion indicating the movement of the video is ultimately transferred to the amplitude limiting circuit. 13, the signal is suppressed along with low-level low-frequency components below the limit level that have escaped the amplitude limit. Therefore, between the subtracters 3 and 4, it is possible to intensively suppress only the low-frequency components where motion information is concentrated, and it is possible to achieve a noise reduction effect while suppressing afterimages.
このように、上記巡回型雑音低減装置ＩＩは、入力映像
信号を画像メモリ５にてｌフィールド又は１フレ一ム期
間遅延し、これを巡回的に入力映像信号に加算すること
で雑音を低減するさいに、人力映像信号と遅延出力映像
信号の差分信号に、帯域強調回路１２にて主要帯域成分
に帯域強調を施し、続いて振幅制限回路１３にて一定の
振幅制限を施したのち、帯域強調解除回路１４にて前記
帯域強調とは逆の特性に従って帯域強調を解除する構成
としたから、画面上での動きの部分の情報をもつ差分信
号のうち一定の振幅レベルを越える過大な動き信号を重
点的に抑圧し、この過大な動き信号が巡回型雑音低減に
供されることによる残像発生を、効果的に抑制すること
ができる。また、振幅制限回路１３のように構成が簡単
な回路素子を用いて、動画に対する残像発生を抑制でき
るため、ＲＯＭ等の記憶素子を用いる装置に比し、製造
コストの切り下げが容易である。In this way, the cyclic noise reduction device II delays the input video signal by one field or one frame period in the image memory 5, and cyclically adds this to the input video signal to reduce noise. Finally, the band emphasis circuit 12 applies band emphasis to the main band components of the difference signal between the human input video signal and the delayed output video signal, and then, after applying a certain amplitude limit to the amplitude limiting circuit 13, the band emphasis is performed. Since the cancellation circuit 14 is configured to cancel the band emphasis according to the characteristics opposite to the band emphasis, excessive movement signals exceeding a certain amplitude level among the difference signals having information about movement on the screen can be canceled. It is possible to effectively suppress the generation of afterimages due to the excessive motion signal being subjected to cyclic noise reduction. Furthermore, since the generation of afterimages in moving images can be suppressed using a circuit element with a simple configuration like the amplitude limiting circuit 13, manufacturing costs can be reduced more easily than in a device using a storage element such as a ROM.
［発明の効果］
以上説明したように、この発明は、人力映像信号を１フ
ィールド又は１フレ一ム期間遅延し、これを巡回的に入
力映像信号に加算することで雑音を低減するさいに、入
力映像信号と遅延出力映像信号の差分信号にその主要帯
域成分に帯域強調を施し、続いて一定の振幅制限を施し
たのち、前記帯域強調とは逆の特性に従って帯域強調を
解除することで、画面上での動きの部分の情報をもつ差
分信号のうち一定の振幅レベルを越える過大な動き信号
を重点的に抑圧し、この過大な動き信号が巡回型雑音低
減に供されることによる残像発生を、効果的に抑制する
ことができ、また振幅制限回路のように構成が簡単な回
路素子を用いて、動画に対する残像発生を抑制できるた
め、ＲＯＭ等の記憶素子を用いる装置に比し、製造コス
トを容易に切り下げることができる等の優れた効果を奏
する。[Effects of the Invention] As explained above, the present invention delays a human video signal by one field or one frame period and cyclically adds this to the input video signal to reduce noise. By applying band emphasis to the main band components of the difference signal between the input video signal and the delayed output video signal, then applying a certain amplitude limit, and then canceling the band emphasis according to the opposite characteristics to the band emphasis, Afterimages are generated by intensively suppressing excessive motion signals that exceed a certain amplitude level among differential signals that contain information about motion on the screen, and using these excessive motion signals for cyclic noise reduction. In addition, it is possible to suppress the occurrence of afterimages in moving images by using a circuit element with a simple configuration such as an amplitude limiting circuit. It has excellent effects such as being able to easily reduce costs.
第１図は、この発明の巡回型雑音低減装置の一実施例を
示す回路構成図、第２図は、第１図に示した振幅制限回
路の入・出力信号の信号波形図、第３図は、従来の巡回
型雑音低減装置の一例を示す回路構成図、第４図は、第
３図に示した係数回路の入・出力信号の信号波形図であ
る。
３．４．、、減算器、５．、、画像メモリ。
１１、、、巡回型雑音低減装置、１２．、、帯域強調回
路、１３．、、振幅制限回路、１４．、。
帯域強調解除回路。FIG. 1 is a circuit configuration diagram showing an embodiment of the cyclic noise reduction device of the present invention, FIG. 2 is a signal waveform diagram of input/output signals of the amplitude limiting circuit shown in FIG. 1, and FIG. 4 is a circuit configuration diagram showing an example of a conventional cyclic noise reduction device, and FIG. 4 is a signal waveform diagram of input/output signals of the coefficient circuit shown in FIG. 3. 3.4. ,,subtractor,5. ,,image memory. 11., cyclic noise reduction device, 12. , ,Band emphasis circuit, 13. , , amplitude limiting circuit, 14. ,. Band emphasis de-emphasis circuit.
Claims (1)
、これを巡回的に入力映像信号に加算することで雑音を
低減する巡回型雑音低減装置であって、入力映像信号と
遅延出力映像信号の差分信号に、その主要帯域成分を強
調する帯域強調回路と、この帯域強調回路の出力を振幅
制限する振幅制限回路と、この振幅制限回路の出力を前
記帯域強調回路とは逆の特性に従って帯域強調解除する
帯域強調解除回路とを設けてなる巡回型雑音低減装置。A cyclic noise reduction device that reduces noise by delaying an input video signal for one field or one frame period and cyclically adding it to the input video signal, the device generating a difference signal between the input video signal and the delayed output video signal. a band emphasizing circuit that emphasizes the main band components; an amplitude limiting circuit that limits the amplitude of the output of the band emphasizing circuit; and a band emphasizing circuit that deemphasizes the output of the amplitude limiting circuit according to characteristics opposite to those of the band emphasizing circuit. A cyclic noise reduction device comprising a band emphasis cancellation circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62015383A JPS63184486A (en) | 1987-01-26 | 1987-01-26 | Cyclic type noise reducing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62015383A JPS63184486A (en) | 1987-01-26 | 1987-01-26 | Cyclic type noise reducing device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63184486A true JPS63184486A (en) | 1988-07-29 |
| JPH0523672B2 JPH0523672B2 (en) | 1993-04-05 |
Family
ID=11887228
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62015383A Granted JPS63184486A (en) | 1987-01-26 | 1987-01-26 | Cyclic type noise reducing device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63184486A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02153689A (en) * | 1988-12-06 | 1990-06-13 | Casio Comput Co Ltd | Liquid crystal driving device |
| JPH02153687A (en) * | 1988-12-06 | 1990-06-13 | Casio Comput Co Ltd | Liquid crystal driving device |
| JPH02153688A (en) * | 1988-12-06 | 1990-06-13 | Casio Comput Co Ltd | Liquid crystal driving device |
| JPH02153686A (en) * | 1988-12-06 | 1990-06-13 | Casio Comput Co Ltd | Liquid crystal driving device |
| US5200835A (en) * | 1990-02-15 | 1993-04-06 | Sony Corporation | Demodulator for fm modulated video signals with pre-demodulation sideband suppression and post-demodulation sideband restoration |
-
1987
- 1987-01-26 JP JP62015383A patent/JPS63184486A/en active Granted
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02153689A (en) * | 1988-12-06 | 1990-06-13 | Casio Comput Co Ltd | Liquid crystal driving device |
| JPH02153687A (en) * | 1988-12-06 | 1990-06-13 | Casio Comput Co Ltd | Liquid crystal driving device |
| JPH02153688A (en) * | 1988-12-06 | 1990-06-13 | Casio Comput Co Ltd | Liquid crystal driving device |
| JPH02153686A (en) * | 1988-12-06 | 1990-06-13 | Casio Comput Co Ltd | Liquid crystal driving device |
| JPH088670B2 (en) * | 1988-12-06 | 1996-01-29 | カシオ計算機株式会社 | Liquid crystal drive |
| JPH088671B2 (en) * | 1988-12-06 | 1996-01-29 | カシオ計算機株式会社 | Liquid crystal drive |
| JPH088672B2 (en) * | 1988-12-06 | 1996-01-29 | カシオ計算機株式会社 | Liquid crystal drive |
| US5200835A (en) * | 1990-02-15 | 1993-04-06 | Sony Corporation | Demodulator for fm modulated video signals with pre-demodulation sideband suppression and post-demodulation sideband restoration |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0523672B2 (en) | 1993-04-05 |
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