JPS63127530A - Vapor growth of gallium arsenide epitaxial crystal - Google Patents
Vapor growth of gallium arsenide epitaxial crystalInfo
- Publication number
- JPS63127530A JPS63127530A JP27468286A JP27468286A JPS63127530A JP S63127530 A JPS63127530 A JP S63127530A JP 27468286 A JP27468286 A JP 27468286A JP 27468286 A JP27468286 A JP 27468286A JP S63127530 A JPS63127530 A JP S63127530A
- Authority
- JP
- Japan
- Prior art keywords
- buffer layer
- gas
- forming
- layer
- source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000013078 crystal Substances 0.000 title claims description 20
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 title claims description 17
- 229910001218 Gallium arsenide Inorganic materials 0.000 title claims description 17
- 238000001947 vapour-phase growth Methods 0.000 claims abstract description 11
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 claims abstract description 9
- 229910001882 dioxygen Inorganic materials 0.000 claims abstract description 7
- OEYOHULQRFXULB-UHFFFAOYSA-N arsenic trichloride Chemical compound Cl[As](Cl)Cl OEYOHULQRFXULB-UHFFFAOYSA-N 0.000 claims abstract description 6
- 229910052733 gallium Inorganic materials 0.000 claims abstract description 6
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims abstract description 5
- 239000000758 substrate Substances 0.000 claims description 22
- 238000000034 method Methods 0.000 claims description 15
- 239000004065 semiconductor Substances 0.000 claims description 10
- 239000001257 hydrogen Substances 0.000 claims description 3
- 229910052739 hydrogen Inorganic materials 0.000 claims description 3
- 229910052785 arsenic Inorganic materials 0.000 claims description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 2
- 239000007789 gas Substances 0.000 abstract description 24
- 239000012535 impurity Substances 0.000 abstract description 8
- 229910017009 AsCl3 Inorganic materials 0.000 abstract 2
- 230000000593 degrading effect Effects 0.000 abstract 1
- 239000010453 quartz Substances 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- 230000007423 decrease Effects 0.000 description 6
- 240000002329 Inga feuillei Species 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000012071 phase Substances 0.000 description 2
- 235000012431 wafers Nutrition 0.000 description 2
- RWSOTUBLDIXVET-UHFFFAOYSA-N Dihydrogen sulfide Chemical compound S RWSOTUBLDIXVET-UHFFFAOYSA-N 0.000 description 1
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229910000037 hydrogen sulfide Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Landscapes
- Junction Field-Effect Transistors (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はヒ化ガリウム エピタキシャル結晶の気相成長
方法に関し、特にショットキバリヤゲート型電界効果ト
ランジスタに使用されるヒ化ガリウム エピタキシャル
ウェーハのバッファ層の気相成長方法に関する。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a method for vapor phase growth of gallium arsenide epitaxial crystals, and in particular to a method for growing a buffer layer of gallium arsenide epitaxial wafers used in Schottky barrier gate field effect transistors. Concerning vapor phase growth methods.
ショットキバリヤゲート型ＦＥＴ用結晶では半絶縁性Ｇ
ａＡｓ基板上に数百ｎｍの厚さの能動層が形成される。Semi-insulating G for Schottky barrier gate type FET crystals
An active layer several hundred nm thick is formed on the aAs substrate.
これを気相成長法により行う場合、直接基板上に能動層
を成長させると基板の影響により結晶性の悪い能動層し
か得られず、そのため能動層と基板との間に比抵抗の高
いバッファ層を成長させる方法がとられてきた。三塩化
ヒ素（ＡｓＣｊ’ ３）−ガリウム（Ｇａ）−水素（ｔ
ｌｚ）反応系で得られるアンドープ結晶中の残留不純物
はシリコン（Ｓｉ）であり、通常２〜５ Ｘ １０ ”
ａｒｍ−３の濃度で含まれる。Ｓｉは以下の反応機構で
結晶中に取り込まれる。気相成長時、Ｇａをガス状原料
として基板上に輸送するため石英ボートに収容されたソ
ースＧａ上にＡｓＣｆｆ５が供給されるが、この時＾ｓ
Ｃｅ ３は次式の反応
４＾ｓＣｊ’ ３ ＋ ６ Ｈ２−＋Ａｓ４ ＋ １２
ＨＣ！！ ・・・（１）により１１２中で容易に分
解し、気相中に塩酸ガス（ＨＣｆｆ）が生成する。さて
、ソースＧａを収容する石英ボートはＧａと次式の反応
ＳｉＯ□＋ ４ Ｇａ＝ ５ｉ（ｉｎＧａ）＋ ２ Ｇ
ａ２Ｏ・＝ （２）を起こしＳｉがＧａ中に溶は込み、
このＳｉが（１）式で生成したＨＣｆｆとの反応
５ｉ（ｉｎＧａ）＋ ｎ ＨＣｅ ＋ （４−ｎ
） Ｈ２＝ＳｉＣｆｆ 、、Ｈ１４−ａ ＋ ２
Ｈ２，（ｎ ＝１．２．３．４ ）・・・（３）
で５ｉＣｆ、ｌＩ４、（ｎ＝１．２．３．４）となり、
基板上へ輸送される。そして基板上において５ｉＣ１ｆ
ｌＨ４−０とＨ２との次式の反応５ｉＣｅ １ｌＨ４、
＋（ｎ−２）ｌ１２＝Ｓｉ（ｉｎＧａＡｓ）＋ｎＨＣｆ
ｆ、 （ｎ＝１．２．３．４）・・・（４）
によりＳｉがエピタキシャルＧａＡｓ結晶中に取り込ま
れる。When this is done by vapor phase growth, if the active layer is grown directly on the substrate, only an active layer with poor crystallinity will be obtained due to the influence of the substrate, and therefore a buffer layer with high resistivity will be formed between the active layer and the substrate. Methods have been taken to grow the Arsenic trichloride (AsCj' 3)-Gallium (Ga)-Hydrogen (t
lz) The residual impurity in the undoped crystal obtained in the reaction system is silicon (Si), and is usually 2 to 5 × 10 ”
Contained at a concentration of arm-3. Si is incorporated into the crystal by the following reaction mechanism. During vapor phase growth, AsCff5 is supplied onto the source Ga housed in a quartz boat in order to transport Ga onto the substrate as a gaseous raw material, but at this time ^s
Ce 3 is the reaction of the following formula 4^sCj' 3 + 6 H2- + As4 + 12
HC! ! According to (1), it is easily decomposed in 112, and hydrochloric acid gas (HCff) is generated in the gas phase. Now, the quartz boat that accommodates the source Ga has the following reaction with Ga: SiO + 4 Ga = 5i (inGa) + 2 G
a2O・= (2) occurs and Si dissolves into Ga,
The reaction of this Si with HCff generated in equation (1) 5i (inGa) + n HCe + (4-n
) H2=SiCff,,H14-a+2
H2, (n = 1.2.3.4)...(3) becomes 5iCf, lI4, (n = 1.2.3.4),
transported onto the substrate. And on the board 5iC1f
The reaction between lH4-0 and H2 of the following formula 5iCe 1lH4,
+(n-2)l12=Si(inGaAs)+nHCf
f, (n=1.2.3.4) (4) Si is incorporated into the epitaxial GaAs crystal.
高抵抗バッファ層を形成するためには、結晶中にＳｉが
取り込まれないようにすることが必要であり、そのため
に従来ソースＧａ上に酸素ガス（０２〉を供給する方法
と、ソースＧａと基板との中間位置より八ｓＣ！！３を
供給する方法が用いられてきた。In order to form a high-resistance buffer layer, it is necessary to prevent Si from being incorporated into the crystal. For this purpose, conventional methods of supplying oxygen gas (02) onto the source Ga and the method of supplying oxygen gas (02) between the source Ga and the substrate A method of supplying 8sC!!3 from a position intermediate between the two has been used.
すなわち前者の場合、ソースＧａ上に０２を供給すると
次式の反応
４ Ｇａ＋ ０２＝ ２ Ｇａ２Ｏ−（５）が生じ、そ
の結果（２）式の反応は左側に進行するから、ソースＧ
ａ中へのＳｉの溶は込み量は減少し、従って（３）式で
生ずる５ｉＣ１！。Ｈ４−、、が減り、（４）式によっ
てＧａＡｓ結晶中に取り込まれるＳｉ量が減る。後者の
場合、ソースＧａと基板の間より＾ｓＣ（！ｇを供給す
ると（＋）式により、ＨＣｆが生じ、その結果（４）式
の反応は左側に進行するからＧａＡｓ結晶中に取り込ま
れるＳｉ量が減る。That is, in the former case, when 02 is supplied onto the source Ga, the following reaction 4 Ga + 02 = 2 Ga2O- (5) occurs, and as a result, the reaction of equation (2) proceeds to the left, so the source G
The amount of Si dissolved into a decreases, and therefore 5iC1!, which occurs in equation (3)! . H4- decreases, and the amount of Si incorporated into the GaAs crystal decreases according to equation (4). In the latter case, when ^sC(!g is supplied between the source Ga and the substrate, HCf is generated according to the (+) equation, and as a result, the reaction of equation (4) proceeds to the left, so that Si incorporated into the GaAs crystal is quantity decreases.
しかしながらソースＧａ上に０□を供給する方法では、
必然的にＧａＡｓ結晶中に酸素（０）がドープされるこ
とになり、この０は単体のままで、もしくは他の元素と
の複合体として結晶中で深い不純物準位を形成する。深
い不純物準位はＦＥＴ特性に影響を及ぼすが、特に能動
層との界面付近に存在するバッファ層中の深い不純物準
位はキャリアをトラップし、ＦＥＴ特性を著しく低下さ
せる。一方、ソースＧａと基板との中間位置よりｋｓＣ
ｅ３を供給する方法では上述の問題は生じないが、気相
中のＨＣｆｆ分圧が増大するため異常成長が起こり、エ
ピタキシャル成長層表面に異常成長核を基にしたヒロッ
ク（ｈｉｌｌｏｃｋ）が発生し易いという問題がある。However, in the method of supplying 0□ on the source Ga,
Inevitably, the GaAs crystal is doped with oxygen (0), and this 0 forms a deep impurity level in the crystal, either as a single element or as a complex with other elements. Deep impurity levels affect FET characteristics, and in particular, deep impurity levels in the buffer layer near the interface with the active layer trap carriers and significantly deteriorate FET characteristics. On the other hand, from the intermediate position between the source Ga and the substrate, ksC
Although the above-mentioned problem does not occur with the method of supplying e3, abnormal growth occurs due to an increase in the HCff partial pressure in the gas phase, and hillocks based on abnormal growth nuclei are likely to occur on the surface of the epitaxial growth layer. There's a problem.
ヒロックの数は成長時間と共に増え、また個々のヒロッ
クは時間と共に成長し大きくなる。The number of hillocks increases with growth time, and individual hillocks grow and become larger over time.
従って成長時間が増加する程、すなわちバッファ層厚が
厚くなる程エピタキシャル層の表面外観歩留の低下が顕
著となり、この方法で歩留を低下させずに成長できるバ
ッファ層の厚さは高々１μｍ程度である。ところが基板
の影響をなくすためにはバッファ層の厚さは約５μｍ以
上必要なため、この方法ではヒロックの発生による歩留
低下の問題が避は難かった。Therefore, the longer the growth time increases, that is, the thicker the buffer layer becomes, the more the surface appearance yield of the epitaxial layer decreases, and the thickness of the buffer layer that can be grown using this method without decreasing the yield is about 1 μm at most. It is. However, in order to eliminate the influence of the substrate, the thickness of the buffer layer needs to be about 5 μm or more, so with this method, it was difficult to avoid the problem of a decrease in yield due to the occurrence of hillocks.
本発明の目的は、基板の影響をなくすために所望の厚み
を有し、しかも能動層との界面付近で深い不純物準位の
少ないバッファ層をエピタキシャル成長層表面外観の歩
留を低下させずに形成することの可能なヒ化ガリウム
エピタキシャル結晶の気相成長方法を提供することにあ
る。The purpose of the present invention is to form a buffer layer having a desired thickness and having few impurity levels near the interface with the active layer, without reducing the yield of the surface appearance of the epitaxially grown layer, in order to eliminate the influence of the substrate. Gallium arsenide that can be
An object of the present invention is to provide a method for vapor phase growth of epitaxial crystals.
本発明のヒ化ガリウム エピタキシャル結晶の気相成長
方法は、三塩化ヒ素−ガリウム−水素の反応系で半導体
基板上にヒ化ガリウム層をエピタキシャル成長させる場
合において、先づソースガリウム上に酸素ガスを供給し
つつ第１のバッファ層を形成し、しかる後酸素ガスの供
給を停止し、前記ソースガリウムと前記半導体基板との
中間位置より三塩化砒素を供給しつつ前記第１のバッフ
ァ層より薄い第２のバッファ層を形成する工程を含んで
構成される。In the vapor phase growth method of gallium arsenide epitaxial crystal of the present invention, when a gallium arsenide layer is epitaxially grown on a semiconductor substrate using a reaction system of arsenic trichloride-gallium-hydrogen, oxygen gas is first supplied onto the source gallium. Then, the supply of oxygen gas is stopped, and a second buffer layer thinner than the first buffer layer is formed while supplying arsenic trichloride from an intermediate position between the source gallium and the semiconductor substrate. The method includes the step of forming a buffer layer.
次に、本発明の実施例について図面を参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.
第１図は本発明の一実施例で使用する横型気相成長装置
の断面図、第２図は第１図の反応管内部の温度分布図で
ある。FIG. 1 is a sectional view of a horizontal vapor phase growth apparatus used in an embodiment of the present invention, and FIG. 2 is a temperature distribution diagram inside the reaction tube of FIG.
第１図において１１は石英反応管、１２．１３は共にガ
ス供給管、１４はソースＧａ、１５は石英ボート、１６
はＧａＡｓからなる半導体基板、１７はガス排気口、１
８は電気炉である。１２のガス供給管の出口はソースＧ
ａ１４と半導体基板１６との中間位置にくるよう配置さ
れている。かかる装置を使用してＧａＡｓエピタキシャ
ル結晶の気相成長は次のように行う。ガス供給管１３に
＾ｓｃｌ ３とＨ２の混合ガスを流すと反応式（１）に
よりＡｓ４と１Ｉｃｅが生成する。このＨＣ１！が高温
領域に設置したソースＧａ１４と反応してＧａＣｅが発
生し、Ａｓ４とＧａｌ’はキャリヤガスのＨ２によって
ＧａＡｓからなる半導体基板１６上に輸送され、次式の
反応４ＧａＣ１！＋Ａｓ４＋２Ｈ２＝４ＧａＡｓ＋４）
Ｉｃｅ−１６）によりＧａＡｓエピタキシャル成長が行
われる。この際、前述したようにソースＧａ１４と石英
ボート１５から反応式（２）により生じたＳｉが式（３
） 、 （４）の反応を通じてＧａＡＳ結晶中に取り込
まれる。In Fig. 1, 11 is a quartz reaction tube, 12 and 13 are both gas supply tubes, 14 is a source Ga, 15 is a quartz boat, and 16
1 is a semiconductor substrate made of GaAs; 17 is a gas exhaust port;
8 is an electric furnace. The outlet of gas supply pipe 12 is source G
It is arranged so as to be located at an intermediate position between a14 and the semiconductor substrate 16. Vapor phase growth of GaAs epitaxial crystal using such an apparatus is carried out as follows. When a mixed gas of ^scl 3 and H2 flows through the gas supply pipe 13, As4 and 1Ice are generated according to reaction formula (1). This HC1! reacts with the source Ga14 placed in a high temperature region to generate GaCe, and As4 and Gal' are transported onto the semiconductor substrate 16 made of GaAs by the carrier gas H2, resulting in the reaction 4GaC1! +As4+2H2=4GaAs+4)
GaAs epitaxial growth is performed using Ice-16). At this time, as mentioned above, Si generated from the source Ga 14 and the quartz boat 15 according to the reaction formula (2) is
), is incorporated into the GaAS crystal through the reaction (4).
バッファ層を形成するには次のように行う。ガス供給管
１３に＾ｓＣｅ ３の供給量を約４Ｘ１０−’ｍｏｅ／
ｓｉｎとした＾ｓｃｌ！３とＨ２の混合ガスを流し気層
成長を開始するが、この時同時に約２×１０−７ｔｓｏ
ｅ ／ ＋＊ｉ口の０２をガス供給管１３に流す。The buffer layer is formed as follows. The supply amount of ^sCe 3 to the gas supply pipe 13 is approximately 4X10-'moe/
Sin and ^scl! Gas layer growth is started by flowing a mixed gas of 3 and H2, but at the same time about 2 x 10-7
Flow 02 from e/+*i port into gas supply pipe 13.
これによって１０分間の成長時間で約４．５μｍの厚さ
の第１のバッファ層を形成する。その後０２の供給を止
め、同時にガス供給管１２にＡｓＣｊ’３の供給量を約
６ Ｘ １０−５ａｏｅ ／ ｗｉｎとしたｋｓｃｌ
３と１１２の混合ガスを流し、３分間の成長時間で約０
．５μｍの厚さの第２のバッファ層を形成する。As a result, a first buffer layer having a thickness of about 4.5 μm is formed in a growth time of 10 minutes. After that, the supply of 02 was stopped, and at the same time, the amount of AsCj'3 supplied to the gas supply pipe 12 was set to about 6 x 10-5 aoe/win.
A mixed gas of 3 and 112 was flowed, and the growth time was about 0 for 3 minutes.
．． A second buffer layer is formed with a thickness of 5 μm.
バッファ層形成終了後、ガス供給管１２よりＡｓＣｆ３
の供給を停止し、ガス供給管１２に硫化水素、シラン等
のｎ型ドーパントガスを流し、不純物濃度的１０１７Ｃ
ＩＩ−’の能動層を約０．５μｍ成長することによりＦ
ＥＴ用エピタキシャル結晶が得られる。After completing the buffer layer formation, AsCf3 is supplied from the gas supply pipe 12.
The supply of 1017C is stopped, and an n-type dopant gas such as hydrogen sulfide or silane is supplied to the gas supply pipe 12 to reduce the impurity concentration to 1017C.
By growing the active layer of II-' to a thickness of about 0.5 μm, F
An epitaxial crystal for ET is obtained.
第３図に本発明により半絶縁性半導体基板１上に第１の
バッファ層２、第２のバッファ層３を形成し、さらにそ
の上に能動層４を成長したＦＥＴ用エピタキシャル結晶
の断面図を示す。FIG. 3 shows a cross-sectional view of an epitaxial crystal for FET in which a first buffer layer 2 and a second buffer layer 3 are formed on a semi-insulating semiconductor substrate 1 according to the present invention, and an active layer 4 is further grown thereon. show.
以上説明したように本発明はバッファ層形成にあたって
、ソースＧａ上に０２を供給しつつ厚い領域を、次にソ
ースＧａと基板との中間位置よりｋｓｃｌ３を供給しつ
つ能動層との界面付近の薄い領域を形成することにより
、エピタキシャル成長層表面外観を劣化させることなく
、所望の厚みを有し、かつ能動層との界面付近で深い不
純物準位の少ないバッファ層を得ることができる。従っ
て高品質なＦＥＴの得られるエピタキシャル ウェハを
高歩留で製造可能となり、その効果は顕著である。As explained above, in forming the buffer layer, the present invention supplies 02 on the source Ga to form a thick region, and then supplies kscl3 from an intermediate position between the source Ga and the substrate to form a thin layer near the interface with the active layer. By forming the region, a buffer layer having a desired thickness and having few deep impurity levels near the interface with the active layer can be obtained without deteriorating the surface appearance of the epitaxially grown layer. Therefore, epitaxial wafers from which high-quality FETs can be obtained can be manufactured at a high yield, and the effect is remarkable.
第１図は横型気相成長装置の断面図、第２図は反応管内
部の温度分布図５、第３図はＦＥＴ用エピタキシャル結
晶の断面図である。
１・・・半絶縁性半導体基板、２・・・第１のバッファ
層、３・・・第２のバッファ層、４・・・能動層、１１
・・・石英反応管、１２・・・ガス供給管、１３・・・
ガス供給管、１４・・・ソースＧａ、１５石英ボート、
１６・・・半導体基板、１７・・・ガス排気口、１８・
・・電気炉、１９・・・サセプタ。
代理人 弁理士 内 原 音（・Ｚ
＼、−
箭１旧
箭２図
［３回FIG. 1 is a sectional view of a horizontal vapor phase growth apparatus, FIG. 2 is a temperature distribution diagram 5 inside a reaction tube, and FIG. 3 is a sectional view of an FET epitaxial crystal. DESCRIPTION OF SYMBOLS 1... Semi-insulating semiconductor substrate, 2... First buffer layer, 3... Second buffer layer, 4... Active layer, 11
...Quartz reaction tube, 12...Gas supply pipe, 13...
Gas supply pipe, 14... source Ga, 15 quartz boat,
16... Semiconductor substrate, 17... Gas exhaust port, 18.
...Electric furnace, 19...Susceptor. Agent Patent Attorney Oto Uchihara (・Z ＼, - 箭１ 古箭２fig. [3 times
Claims (1)
ヒ化ガリウム層をエピタキシャル成長させる場合におい
て、先づソースガリウム上に酸素ガスを供給しつつ第１
のバッファ層を形成し、しかる後酸素ガスの供給を停止
し、前記ソースガリウムと前記半導体基板との中間位置
より三塩化砒素を供給しつつ前記第１のバッファ層より
薄い第２のバッファ層を形成する工程を含むことを特徴
とするヒ化ガリウムエピタキシャル結晶の気相成長方法
。When epitaxially growing a gallium arsenide layer on a semiconductor substrate using a reaction system of arsenic trichloride-gallium-hydrogen, firstly, while supplying oxygen gas onto the source gallium,
After that, the supply of oxygen gas is stopped, and a second buffer layer thinner than the first buffer layer is formed while supplying arsenic trichloride from an intermediate position between the source gallium and the semiconductor substrate. A method for vapor phase growth of a gallium arsenide epitaxial crystal, the method comprising the step of forming a gallium arsenide epitaxial crystal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27468286A JPS63127530A (en) | 1986-11-17 | 1986-11-17 | Vapor growth of gallium arsenide epitaxial crystal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27468286A JPS63127530A (en) | 1986-11-17 | 1986-11-17 | Vapor growth of gallium arsenide epitaxial crystal |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63127530A true JPS63127530A (en) | 1988-05-31 |
Family
ID=17545093
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP27468286A Pending JPS63127530A (en) | 1986-11-17 | 1986-11-17 | Vapor growth of gallium arsenide epitaxial crystal |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63127530A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5480833A (en) * | 1991-02-19 | 1996-01-02 | Fujitsu Limited | Semiconductor device having an isolation region enriched in oxygen and a fabrication process thereof |
| US5844303A (en) * | 1991-02-19 | 1998-12-01 | Fujitsu Limited | Semiconductor device having improved electronic isolation |
| JP2007154468A (en) * | 2005-12-02 | 2007-06-21 | Hideo Fujita | United clip |
-
1986
- 1986-11-17 JP JP27468286A patent/JPS63127530A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5480833A (en) * | 1991-02-19 | 1996-01-02 | Fujitsu Limited | Semiconductor device having an isolation region enriched in oxygen and a fabrication process thereof |
| US5569953A (en) * | 1991-02-19 | 1996-10-29 | Fujitsu Limited | Semiconductor device having an isolation region enriched in oxygen |
| US5844303A (en) * | 1991-02-19 | 1998-12-01 | Fujitsu Limited | Semiconductor device having improved electronic isolation |
| JP2007154468A (en) * | 2005-12-02 | 2007-06-21 | Hideo Fujita | United clip |
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