JPS63113978U - - Google Patents

Info

Publication number
JPS63113978U
JPS63113978U JP470487U JP470487U JPS63113978U JP S63113978 U JPS63113978 U JP S63113978U JP 470487 U JP470487 U JP 470487U JP 470487 U JP470487 U JP 470487U JP S63113978 U JPS63113978 U JP S63113978U
Authority
JP
Japan
Prior art keywords
semiconductor device
terminals
conductive pattern
substrate
mounting part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP470487U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP470487U priority Critical patent/JPS63113978U/ja
Publication of JPS63113978U publication Critical patent/JPS63113978U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す半導体素子評
価試験用治具の正面図、第2図は裏面図、第3図
は底面図、第4図は側面図である。 1……基板、2……半導体素子実装部分、3…
…スルーホール、4……導体パターン、5……端
子、6……被覆部材。
FIG. 1 is a front view, FIG. 2 is a back view, FIG. 3 is a bottom view, and FIG. 4 is a side view of a semiconductor device evaluation test jig showing an embodiment of the present invention. 1... Board, 2... Semiconductor element mounting part, 3...
...Through hole, 4... Conductor pattern, 5... Terminal, 6... Covering member.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 評価半導体素子の実装部分と接続する導体パタ
ーン及び端子を形成した基板において、少なくと
も端子を除く基板表面の導体パターン上及び側面
が被覆部材で被覆されていることを特徴とする半
導体素子評価試験用治具。
A cure for semiconductor device evaluation testing, characterized in that, in a substrate on which a conductive pattern and terminals are formed to connect to a mounting part of a semiconductor device to be evaluated, at least the top and side surfaces of the conductive pattern on the surface of the substrate excluding the terminals are covered with a covering member. Ingredients.
JP470487U 1987-01-14 1987-01-14 Pending JPS63113978U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP470487U JPS63113978U (en) 1987-01-14 1987-01-14

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP470487U JPS63113978U (en) 1987-01-14 1987-01-14

Publications (1)

Publication Number Publication Date
JPS63113978U true JPS63113978U (en) 1988-07-22

Family

ID=30785611

Family Applications (1)

Application Number Title Priority Date Filing Date
JP470487U Pending JPS63113978U (en) 1987-01-14 1987-01-14

Country Status (1)

Country Link
JP (1) JPS63113978U (en)

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