JPS63107057U - - Google Patents
Info
- Publication number
- JPS63107057U JPS63107057U JP19882586U JP19882586U JPS63107057U JP S63107057 U JPS63107057 U JP S63107057U JP 19882586 U JP19882586 U JP 19882586U JP 19882586 U JP19882586 U JP 19882586U JP S63107057 U JPS63107057 U JP S63107057U
- Authority
- JP
- Japan
- Prior art keywords
- storage means
- processing device
- dual port
- selection
- port memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000009977 dual effect Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Multi Processors (AREA)
- Information Transfer Systems (AREA)
Description
第１図は本考案のブロツク図、第２図は本考案
の一実施例の全体システムブロツク図、第３図は
第２図を説明する為のタイムチヤートである。 １……記憶手段、２……選択手段、３……第１
の処理装置、４……第２の処理装置。
の一実施例の全体システムブロツク図、第３図は
第２図を説明する為のタイムチヤートである。 １……記憶手段、２……選択手段、３……第１
の処理装置、４……第２の処理装置。
Claims (1)
- 第１、第２の処理装置のデータを記憶する記憶
手段と、前記第１または第２の処理装置から前記
記憶手段へのデータ書込みの選択及び前記記憶手
段から前記第１または第２の処理装置へのデータ
の読出しの選択を行う選択手段とを有することを
特徴とするデユアルポートメモリ。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19882586U JPS63107057U (ja) | 1986-12-26 | 1986-12-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19882586U JPS63107057U (ja) | 1986-12-26 | 1986-12-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63107057U true JPS63107057U (ja) | 1988-07-11 |
Family
ID=31159875
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19882586U Pending JPS63107057U (ja) | 1986-12-26 | 1986-12-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63107057U (ja) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8906618B2 (en) | 2000-02-18 | 2014-12-09 | The Board Of Trustees Of The Leland Stanford Junior University | Apparatus and methods for parallel processing of micro-volume liquid reactions |
| US9266108B2 (en) | 2004-03-12 | 2016-02-23 | Life Technologies Corporation | Nanoliter array loading |
| US9428800B2 (en) | 2002-12-20 | 2016-08-30 | Life Technologies Corporation | Thermal cycling apparatus and method |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS593665A (ja) * | 1982-06-30 | 1984-01-10 | Fujitsu Ltd | マルチアクセツサブル・メモリ・システム |
| JPS5953958A (ja) * | 1982-09-20 | 1984-03-28 | Sanyo Electric Co Ltd | メモリアクセス回路 |
-
1986
- 1986-12-26 JP JP19882586U patent/JPS63107057U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS593665A (ja) * | 1982-06-30 | 1984-01-10 | Fujitsu Ltd | マルチアクセツサブル・メモリ・システム |
| JPS5953958A (ja) * | 1982-09-20 | 1984-03-28 | Sanyo Electric Co Ltd | メモリアクセス回路 |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8906618B2 (en) | 2000-02-18 | 2014-12-09 | The Board Of Trustees Of The Leland Stanford Junior University | Apparatus and methods for parallel processing of micro-volume liquid reactions |
| US9518299B2 (en) | 2000-02-18 | 2016-12-13 | The Board Of Trustees Of The Leland Stanford Junior University | Apparatus and methods for parallel processing of micro-volume liquid reactions |
| US9428800B2 (en) | 2002-12-20 | 2016-08-30 | Life Technologies Corporation | Thermal cycling apparatus and method |
| US9266108B2 (en) | 2004-03-12 | 2016-02-23 | Life Technologies Corporation | Nanoliter array loading |