JPS6288398A - Soldering of flat package part - Google Patents

Soldering of flat package part

Info

Publication number
JPS6288398A
JPS6288398A JP22903985A JP22903985A JPS6288398A JP S6288398 A JPS6288398 A JP S6288398A JP 22903985 A JP22903985 A JP 22903985A JP 22903985 A JP22903985 A JP 22903985A JP S6288398 A JPS6288398 A JP S6288398A
Authority
JP
Japan
Prior art keywords
solder
flat package
soldering
printed circuit
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22903985A
Other languages
Japanese (ja)
Inventor
照男 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP22903985A priority Critical patent/JPS6288398A/en
Publication of JPS6288398A publication Critical patent/JPS6288398A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔概要〕 フラットパッケージ形部品をプリント基板に半田付は実
装する際に、リードの所定の部分を半田レジスト被膜で
覆うことにより、リードのパッドに対応する部分のみに
半田が付着するようにして、半田がリード間をブリッジ
状に短絡するのを阻止する。
[Detailed Description of the Invention] [Summary] When mounting a flat package component on a printed circuit board by soldering, by covering a predetermined portion of the lead with a solder resist film, soldering is applied only to the portion of the lead that corresponds to the pad. This prevents the solder from forming a bridge-like short circuit between the leads.

〔産業上の利用分野〕[Industrial application field]

本発明は、フラットパッケージ形部品の半田付は方法の
改良に関する。
The present invention relates to an improved method for soldering flat packaged components.

近年はプリント基板に高密度に部品を実装可能とするた
めに、リードのピンチを小さく (例えば。
In recent years, lead pinching has become smaller (for example) in order to enable high-density mounting of components on printed circuit boards.

1.2. 0.8. 0.65111) してチップ状
のパッケージの外に導出し、スルーホールを使用するこ
となく、直接、プリント基板の導体パターンに半田付け
する所謂、フラットパッケージ形部品が広く使用されて
いる。
1.2. 0.8. 0.65111) is led out of a chip-like package and soldered directly to a conductor pattern on a printed circuit board without using a through hole, so-called flat package type components are widely used.

このようにリード間隔が小さいフラットパッケージ形部
品を半田イ]げするにあたり、半田がリード間にブリッ
ジ状に付着しないよう留意する必要がある。
When soldering a flat package type component with such a small lead spacing, care must be taken to prevent solder from adhering between the leads in the form of a bridge.

〔従来の技術〕[Conventional technology]

第2図は従来の実装方法に係わるフラットパッケージ形
部品の斜視図、第3図は従来例の側断面図である。
FIG. 2 is a perspective view of a flat package type component according to a conventional mounting method, and FIG. 3 is a side sectional view of the conventional example.

第2図、第3図において、フラットパソケージ形部品4
には、合成樹脂よりなる矩形板状のパッケージ4Aの側
面に、リード5が所定の小さいピッチで並設されている
。それぞれのり一ド5の先端部は、導体パターン1への
パッドに密接すべく屈曲させ、接着座部5aを設けであ
る。
In Fig. 2 and Fig. 3, the flat package part 4
In this example, leads 5 are arranged in parallel at a predetermined small pitch on the side surface of a rectangular plate-shaped package 4A made of synthetic resin. The tip of each glue 5 is bent so as to come into close contact with the pad to the conductor pattern 1, and an adhesive seat 5a is provided.

このようなフラットパッケージ形部品4を、プリント基
板1に半田付は実装するには、導体パターン1へのバン
ド上に、例えばペースト状の半田3をスクリーン印刷塗
布した後に、リード5を対応する導体パターンIAのパ
ッド上に位置合わせして、フラットパッケージ形部品4
をプリント基板1に仮固着する。
In order to solder and mount such a flat package type component 4 on the printed circuit board 1, after applying, for example, paste-like solder 3 by screen printing on the band to the conductor pattern 1, the leads 5 are connected to the corresponding conductor. Align with the pad of pattern IA, flat package part 4
is temporarily fixed to the printed circuit board 1.

その後、連続加熱炉等に送り込み、半田3を加熱硬化さ
せ導体パターン1八とり−ド5とを半田付けして、フラ
ットパッケージ形部品4をプリント基板1に実装してい
る。
Thereafter, the flat package component 4 is mounted on the printed circuit board 1 by feeding it into a continuous heating furnace or the like, heating and hardening the solder 3, and soldering the conductor pattern 18 to the lead 5.

上述の半田付は方法は、プリント基板1が、セラミック
基板のような場合に有利である。
The soldering method described above is advantageous when the printed circuit board 1 is a ceramic board.

一方、プリン)l板1が、例えばガラス入りエポキシ樹
脂のような積層基板の場合は、パッケージ4への裏面に
接着剤を塗布して、プリント基板1に仮固着し、その後
半田ディツプして、フラットパッケージ形部品4を半田
付けする方法が作業能率が良い。
On the other hand, if the printed circuit board 1 is a laminated board such as a glass-containing epoxy resin, an adhesive is applied to the back side of the package 4 to temporarily fix it to the printed circuit board 1, and then solder is dipped. The method of soldering the flat package type parts 4 has good work efficiency.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかしながら上記従来の半田付は方法は、リード5が金
属材で半田3の濡れ性が良く、且つり一ド5の並列ピッ
チが小さいことに起因して、表面張力により半田3が、
リード5の側面に沿って上昇し、本来は半田3が付着し
ないパッケージ4Aの側面のリード5間に浸透・付着し
て、ブリッジ部3aとなり、隣接するリード5間が、半
田によりブリッジされて、短絡するという問題点がある
However, in the conventional soldering method described above, the leads 5 are made of a metal material and the solder 3 has good wettability, and the parallel pitch of the leads 5 is small.
The solder rises along the side surface of the lead 5, penetrates and adheres between the leads 5 on the side surface of the package 4A to which the solder 3 would not normally adhere, forming a bridge portion 3a, and the adjacent leads 5 are bridged by the solder. There is a problem of short circuit.

〔問題点を解決するための手段〕[Means for solving problems]

上記従来の問題点を解決するため本発明は、第1図のよ
うに、リード5の先端部に設けた接着座部5aを除いた
り一ド5の全面に、半田レジスト被膜10を塗布し、そ
の後、接着座部5aをプリント基板に形成した対応する
導体パターンIAのパッドに、位置合わせし半田付は実
装するようにしたものである。
In order to solve the above-mentioned conventional problems, the present invention, as shown in FIG. Thereafter, the adhesive seat portions 5a are aligned and soldered to the pads of the corresponding conductor patterns IA formed on the printed circuit board.

〔作用〕[Effect]

上記本発明の手段によれば、リード5の接着座部5aを
除いた全面は、半田3がイリ着することを阻止する半田
レジスト被膜10で覆われている。
According to the means of the present invention, the entire surface of the lead 5 except for the adhesive seat portion 5a is covered with a solder resist film 10 that prevents the solder 3 from sticking.

したがって、フラットパッケージ形部品4をプリント基
板Iに半田付は実装するにあたり、隣接したリード間が
短絡することがない。
Therefore, when the flat package type component 4 is soldered and mounted on the printed circuit board I, there is no possibility of short-circuiting between adjacent leads.

〔実施例〕〔Example〕

以下図示実施例により、本発明を具体的に説明する。な
お、全図を通じて同一符号は同一対象物を示す。
The present invention will be specifically explained below with reference to illustrated examples. Note that the same reference numerals indicate the same objects throughout the figures.

第1図は本発明の1実施例の要部斜視であって、フラッ
トパッケージ形部品4の、合成樹脂よりなるパッケージ
4^の側面に、アングル形に突出した形成したり一ド5
が、所定の小さいピッチで並設されている。
FIG. 1 is a perspective view of a main part of an embodiment of the present invention, in which a side surface of a package 4 made of synthetic resin of a flat package component 4 is formed with an angular protrusion or a door 5.
are arranged in parallel at a predetermined small pitch.

そして、それぞれのり−ド5の先端部を、パッケージ4
Aの底面に並行する方向に折曲げて、導体パターンのパ
ッドに半田付けする接着座部5aを設けである。
Then, attach the tip of each glue 5 to the package 4.
An adhesive seat portion 5a is provided which is bent in a direction parallel to the bottom surface of A and soldered to the pad of the conductor pattern.

フラットパッケージ形部品4をプリント基板に半田付は
実装する場合、まず、リード5の接着座部5aを除く全
面に、例えば刷毛で塗り、或いは浸漬等して、半田レジ
ストを塗布して、半田が付着することない半田レジスト
被膜1.0(影線で示す)を形成する。
When soldering and mounting the flat package type component 4 on a printed circuit board, first, a solder resist is applied to the entire surface of the lead 5 except for the adhesive seat 5a, for example by brushing or dipping, so that the solder resists. A non-adhesive solder resist film 1.0 (indicated by a shaded line) is formed.

このように、リード5を表面処理後、導体パターン1Δ
のパッド上に、ペースト状の半田をスクリーン印刷塗布
し、接着座部5aを載せて加熱して半田付は作業を行う
。或いは、フラットパッケージ形部品4を接着剤で仮接
着後、プリント基板を溶融半田槽にディップして、接着
座部5aをプリント基板のバンドに半田付けする。
In this way, after surface treatment of the lead 5, the conductor pattern 1Δ
Paste solder is applied by screen printing onto the pad, and the adhesive seat portion 5a is placed and heated to perform soldering. Alternatively, after temporarily bonding the flat package type component 4 with an adhesive, the printed circuit board is dipped in a molten solder tank, and the adhesive seat portion 5a is soldered to the band of the printed circuit board.

上述のような前処理後に、半田付は実装を行うと、リー
ド5の接着座部5aを除いた全面は、半田が付着するこ
とを阻止する半田レジスト被膜10で覆われているので
、隣接したリード間が半田により短絡することがない。
When soldering and mounting are performed after the pretreatment as described above, the entire surface of the lead 5 except for the adhesive seat 5a is covered with a solder resist film 10 that prevents solder from adhering to the adjacent lead 5. There will be no short circuit between the leads due to solder.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、リードの接着座部のみに
半田が付着し、他の部分は半田が付着しないように半田
レジスト被膜で覆って、半田付は作業を行うものであっ
て、隣接したリード間が、付着半田により短絡する恐れ
がなく、且つ前処理が簡単で低コストである等、実用上
で優れた効果がある。
As explained above, in the present invention, solder adheres only to the adhesive seat part of the lead, and the other parts are covered with a solder resist film to prevent solder from adhering. There are excellent practical effects, such as there is no risk of short-circuiting between the leads due to adhesion of solder, and the pretreatment is simple and low cost.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の1実施例の要部斜視目。 第2図は従来の実装方法に係わるフラットパッケージ形
部品の斜視図、 第3図は従来例の側断面図である。 図において、 1はプリント基板、 1へは琳イ本パターン、 3は半田、 3aはブリッジ部、 4はフラントパッケージ形部品、 5はリード、 5aは接着座部、 10は半田レジスト被膜をそれぞれ示す。
FIG. 1 is a perspective view of the main parts of one embodiment of the present invention. FIG. 2 is a perspective view of a flat package type component according to a conventional mounting method, and FIG. 3 is a side sectional view of the conventional example. In the figure, 1 is a printed circuit board, 1 is a main pattern, 3 is solder, 3a is a bridge part, 4 is a flat package type component, 5 is a lead, 5a is an adhesive seat part, and 10 is a solder resist film. .

Claims (1)

【特許請求の範囲】 プリント板にフラットパッケージ形部品(4)を実装す
るにあたり、 先端部に設けた接着座部(5a)を除いたリード(5)
の全面に、半田レジスト被膜(10)を形成する前処理
工程を挿入したことを、特徴とするフラットパッケージ
形部品の半田付け方法。
[Claims] When mounting a flat package type component (4) on a printed circuit board, a lead (5) excluding the adhesive seat (5a) provided at the tip thereof.
1. A method for soldering flat package components, characterized by inserting a pre-treatment step of forming a solder resist film (10) on the entire surface of the component.
JP22903985A 1985-10-15 1985-10-15 Soldering of flat package part Pending JPS6288398A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22903985A JPS6288398A (en) 1985-10-15 1985-10-15 Soldering of flat package part

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22903985A JPS6288398A (en) 1985-10-15 1985-10-15 Soldering of flat package part

Publications (1)

Publication Number Publication Date
JPS6288398A true JPS6288398A (en) 1987-04-22

Family

ID=16885784

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22903985A Pending JPS6288398A (en) 1985-10-15 1985-10-15 Soldering of flat package part

Country Status (1)

Country Link
JP (1) JPS6288398A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0226273U (en) * 1988-08-08 1990-02-21
JPH0274097A (en) * 1988-09-09 1990-03-14 Fujitsu Ltd Soldering method of electronic component lead terminal
JPH02122467U (en) * 1989-03-22 1990-10-08

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0226273U (en) * 1988-08-08 1990-02-21
JPH0274097A (en) * 1988-09-09 1990-03-14 Fujitsu Ltd Soldering method of electronic component lead terminal
JPH02122467U (en) * 1989-03-22 1990-10-08

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