JPS6260271A - Photovoltaic device - Google Patents

Photovoltaic device

Info

Publication number
JPS6260271A
JPS6260271A JP60200745A JP20074585A JPS6260271A JP S6260271 A JPS6260271 A JP S6260271A JP 60200745 A JP60200745 A JP 60200745A JP 20074585 A JP20074585 A JP 20074585A JP S6260271 A JPS6260271 A JP S6260271A
Authority
JP
Japan
Prior art keywords
amorphous semiconductor
layer
semiconductor layer
type amorphous
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60200745A
Other languages
Japanese (ja)
Inventor
Takeo Fukatsu
深津 猛夫
Kazuyuki Goto
一幸 後藤
Masaru Takeuchi
勝 武内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP60200745A priority Critical patent/JPS6260271A/en
Publication of JPS6260271A publication Critical patent/JPS6260271A/en
Pending legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/545Microcrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/548Amorphous silicon PV cells

Abstract

PURPOSE:To avoid degradation of photovoltaic characteristics by providing a blocking layer with a specific thickness for prevention of impurity diffusion between an I-type amorphous semiconductor layer and an N-type amorphous semiconductor layer. CONSTITUTION:A blocking layer 7, such as an amorphous silicon carbide layer, with a thickness of 10-100Angstrom is provided between an I-type amorphous semiconductor layer 4 and an N-type amorphous semiconductor layer 5. The thickness of the blocking layer 7 is selected to be in the range of 10-100Angstrom because, if the thickness is less than 10Angstrom , blocking effect against P is not sufficient and, if the thickness is more than 100Angstrom , flow of produced carriers effected by tunnel effect is obstructed and, in both cases, the characteristics are degraded. As material for the blocking layer 7, not only amorphous silicon carbide but also SnO2, In2O3.SnO2, microcrystalline silicon or the like can be employed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は非晶質半導体を用いた光起電力装置に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a photovoltaic device using an amorphous semiconductor.

〔従来技術〕[Prior art]

ところで従来のこの種光起電力装置は第3図に示す如く
構成されている。第3図は従来における光起電力装置を
示す断面構造図であり、ガラス等の透光性絶縁基板1上
にSnO2+In2O3・SnO2等を材料とする透明
電極2、p型非晶質半導体層3、j型非晶質半導体層4
、n型非晶質半導体層5をこの順序で積層形成する一方
、更にこの上にAA’等を材料とする裏面電極6を積層
形成して構成されており、透光性絶縁基板1、透明電極
2を通して各p、t、n型の半導体M3.4.5内に光
を導入し、これらの各半導体層3,4.5内で生起せし
められた光起電力を透明電極2及び裏面電極6を通じて
外部に取り出すようになっている。
By the way, a conventional photovoltaic device of this type is constructed as shown in FIG. FIG. 3 is a cross-sectional structural diagram showing a conventional photovoltaic device, in which a transparent electrode 2 made of SnO2+In2O3, SnO2, etc. is placed on a transparent insulating substrate 1 such as glass, a p-type amorphous semiconductor layer 3, J-type amorphous semiconductor layer 4
, an n-type amorphous semiconductor layer 5 are laminated in this order, and a back electrode 6 made of AA' or the like is further laminated thereon. Light is introduced into each p-, t-, and n-type semiconductor M3.4.5 through the electrode 2, and the photovoltaic force generated in each of these semiconductor layers 3, 4.5 is transferred to the transparent electrode 2 and the back electrode. It is designed to be taken out to the outside through 6.

〔本発明が解決しようとする問題点〕[Problems to be solved by the present invention]

ところで、このような光起電力装置に光を入射させた場
合、光起電力特性が急速に低下する、所謂光劣化が生ず
ることが知ら−れている。これはn型部晶質半導体JW
5中の添加不純物たるPがn型非晶質半導体層4中に拡
散することによるものであり、このためPの拡散防止手
段が種々試みられているが、まだ十分な効果が得られて
いないのが現状である。
By the way, it is known that when light is incident on such a photovoltaic device, so-called photodeterioration occurs, in which the photovoltaic characteristics rapidly deteriorate. This is an n-type crystalline semiconductor JW
This is because P, which is an added impurity in 5, diffuses into the n-type amorphous semiconductor layer 4. For this reason, various methods for preventing P diffusion have been attempted, but no sufficient effect has been obtained yet. is the current situation.

第4図は上記光起電力装置におけるp、i、n型非晶質
半導体層3,4.5のマイクロイオンアナライダによる
分析結果を示すグラフであり、横軸にp型非晶質半導体
層表面側からの深さを、また縦軸にPfi度(対数、任
意目盛)をとって示してあり、このグラフから明らかな
ように、n型半導体層5中の添加不純物であるPがl型
半導体層内に深く拡散していることが解る。第5図は横
軸にPH3/SiH4の比を、また縦軸に光劣化率(初
期特性/光照射後の特性)をとって示してあり、このグ
ラフから明らかなように、例えばオーミック接合性を高
める等のためにPH3/SiH4の比率を大きくしてゆ
くとこれに従って劣化が大きくなることが解る。
FIG. 4 is a graph showing the analysis results of the p-, i-, and n-type amorphous semiconductor layers 3 and 4.5 in the photovoltaic device using a micro ion analyzer, and the horizontal axis indicates the p-type amorphous semiconductor layer. The depth from the surface side is shown, and the vertical axis shows the degree of Pfi (logarithm, arbitrary scale).As is clear from this graph, P, which is an added impurity in the n-type semiconductor layer 5, is l-type. It can be seen that it is deeply diffused within the semiconductor layer. Figure 5 shows the ratio of PH3/SiH4 on the horizontal axis and the photodegradation rate (initial characteristics/characteristics after light irradiation) on the vertical axis. It can be seen that as the ratio of PH3/SiH4 is increased in order to increase the PH3/SiH4 ratio, the deterioration increases accordingly.

〔問題点を解決するための手段〕[Means for solving problems]

本発明はかかる事情に鑑みなされたものであって、その
目的とするところは非晶質シリコンカーバイド、 Sn
O2.In2O3・SnO2又は微結晶シリコン等にて
構成したブロッキング層を用いることによって容易に、
しかも確実にPの拡散を防止し、劣化を抑制し得るよう
にした光起電力装置を提供するにある。
The present invention has been made in view of the above circumstances, and its object is to produce amorphous silicon carbide, Sn
O2. By using a blocking layer made of In2O3/SnO2 or microcrystalline silicon, it is easy to
Moreover, it is an object of the present invention to provide a photovoltaic device that can reliably prevent diffusion of P and suppress deterioration.

本発明に係る光起電力装置は透光性絶縁基板上にp型、
i型、n型の各非晶質半導体層を積層形成した光起電力
装置において、前記n型非晶質半導体層とn型非晶質半
導体層との間に10〜100人の厚さに不純物の拡散防
止のためのブロッキング層を介装せしめたことを特徴と
する。
The photovoltaic device according to the present invention has p-type,
In a photovoltaic device in which i-type and n-type amorphous semiconductor layers are laminated, a thickness of 10 to 100 layers is provided between the n-type amorphous semiconductor layer and the n-type amorphous semiconductor layer. It is characterized by interposing a blocking layer to prevent diffusion of impurities.

〔実施例〕〔Example〕

以下本発明をその実施例を示す図面に基づき具体的に説
明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be specifically described below based on drawings showing embodiments thereof.

第1図は本発明に係る光起電力装置(以下本発明装置と
いう)の断面構造図であり、図中1はガラス等の透光性
絶縁基板、2はSnO2 、 In2O3・SnO2等
を材料とする透明電極、3. 4. 5は各p型。
FIG. 1 is a cross-sectional structural diagram of a photovoltaic device according to the present invention (hereinafter referred to as the device of the present invention). transparent electrode; 3. 4. 5 is each p type.

i型、n型の非晶質半導体層、6はA1等を材料とする
裏面電極を示している。そしてl型非晶質半導体層4と
n型非晶質半導体層5との間に非晶質シリコンカーバイ
ド等のブロッキング層7が10〜100人の厚さに介在
せしめられている。
I-type and n-type amorphous semiconductor layers, and 6 indicate a back electrode made of A1 or the like. A blocking layer 7 made of amorphous silicon carbide or the like is interposed between the l-type amorphous semiconductor layer 4 and the n-type amorphous semiconductor layer 5 to a thickness of 10 to 100 layers.

ブロッキング層の厚さを10〜100人としたのは10
Å以下でばPに対するブロッキング効果が十分でなく、
また100Å以上では発生キャリヤのトンネル効果によ
る流れが阻害され、特性の変化を招くからである。
The thickness of the blocking layer was set to 10 to 100 people.
If it is less than Å, the blocking effect against P is not sufficient,
Further, if the thickness is 100 Å or more, the flow of generated carriers due to the tunnel effect is inhibited, leading to changes in characteristics.

なお、ブロッキング層7の材料としては非晶質シリコン
カーバイドに限らず、SnO2+In2O3・SnO2
゜或いは微結晶シリコン等であってもよい。
Note that the material for the blocking layer 7 is not limited to amorphous silicon carbide, but also SnO2+In2O3/SnO2
Alternatively, microcrystalline silicon or the like may be used.

次に上記した各ブロッキング層7の形成条件の一例を示
す。
Next, an example of the conditions for forming each of the blocking layers 7 described above will be shown.

】)非晶質シリコンカーバイドの場合 原料ガス: SiH4+ CH4(又はC2112+ 
C2H6等)基板温度:150〜300℃ RFパワー=10〜200W ガス圧カニ 0.1〜I Torr 2 ) SnO2 、 In2O1・SnO2の場合エ
レクトロビーム法、スパック法(TCOターゲット)或
いは熱CVO法に依る。
]) For amorphous silicon carbide, raw material gas: SiH4+ CH4 (or C2112+
C2H6, etc.) Substrate temperature: 150-300℃ RF power = 10-200W Gas pressure 0.1-I Torr 2) In the case of SnO2, In2O1/SnO2, it depends on the electro beam method, spackle method (TCO target) or thermal CVO method .

3)微結晶シリコンの場合 成長ガス: SiH4+H2等 基板温度:150〜300℃ RFパワー:100〜300W ガス圧カニ 0.1〜I Torr 第2図は上述の如く構成した本発明装置におけるn型非
晶質半導体層5中の添加不純物であるPOi型非晶質半
導体層4への拡散状態を示すマイクロイオンアナライザ
の分析結果を示すグラフであり、横軸にはp型非晶質半
導体層の表面側からの深さを、また縦軸にP濃度(対数
、任意単位)をとって示しである。
3) For microcrystalline silicon Growth gas: SiH4 + H2 etc. Substrate temperature: 150-300°C RF power: 100-300W Gas pressure 0.1-I Torr This is a graph showing the analysis results of a micro ion analyzer showing the state of diffusion of added impurities in the crystalline semiconductor layer 5 into the POi-type amorphous semiconductor layer 4, and the horizontal axis shows the surface of the p-type amorphous semiconductor layer. The depth from the side is shown, and the vertical axis shows the P concentration (logarithm, arbitrary unit).

このグラフから明らかなように破線で示す従来の拡散態
様に比較して1型非晶質半導体層4中でのPの濃度は格
段に低減されており、ブロッキング層7によるPの拡散
阻止効果が大きいことが解る− 〔効果〕 以上の如く本発明装置にあっては、n型非晶質半導体層
中の添加不純物であるP等がi非晶質半導体層中に拡散
するのを確実に阻止することができて光劣化を抑制出来
、光起電力特性の低下を防止出来て品質の向上が図れる
など本発明は優れた効果を奏するものである。
As is clear from this graph, the concentration of P in the type 1 amorphous semiconductor layer 4 is significantly reduced compared to the conventional diffusion mode shown by the broken line, and the blocking layer 7 has an effect of inhibiting P diffusion. It can be seen that the effect is large. [Effect] As described above, in the device of the present invention, diffusion of P, etc., which is an added impurity in the n-type amorphous semiconductor layer, into the i-amorphous semiconductor layer can be reliably prevented. The present invention has excellent effects such as being able to suppress photodeterioration and preventing deterioration of photovoltaic properties and improving quality.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明装置の断面構造図、第2図はp。 i、n型非晶質半導体層中のPの濃度を示すグラフ、第
3図は従来装置の断面構造図、第4図は従来装置のp、
i、n型非晶質半導体層中のPの濃度を示すグラフ、第
5図は光劣化とPとの関係を示すグラフである。 I・・・透光性絶縁基板  2・・・透明電極  3・
・・p型非晶質半導体層  4・・・j型非晶質半導体
層5・・・n型非晶質半導体層  6・・・裏面電極7
・・・ブロッキング層 特 許 出願人 三洋電機株式会社 代理人 弁理士 河 野  登 夫 梯 1 図 俤 2目 答 3 図 蕃 4 回
FIG. 1 is a cross-sectional structural diagram of the device of the present invention, and FIG. 2 is p. A graph showing the concentration of P in the i, n-type amorphous semiconductor layer, FIG. 3 is a cross-sectional structural diagram of the conventional device, and FIG. 4 is the p,
FIG. 5 is a graph showing the concentration of P in the i, n-type amorphous semiconductor layer, and FIG. 5 is a graph showing the relationship between photodegradation and P. I...Transparent insulating substrate 2...Transparent electrode 3.
...p-type amorphous semiconductor layer 4...j-type amorphous semiconductor layer 5...n-type amorphous semiconductor layer 6...back electrode 7
...Blocking layer patent Applicant Sanyo Electric Co., Ltd. Agent Patent attorney Noboru Kawano 1 Illustration 2 Answers 3 Illustrations 4 times

Claims (1)

【特許請求の範囲】 1、透光性絶縁基板上にp型、i型、n型の各非晶質半
導体層を積層形成した光起電力装置において、前記i型
非晶質半導体層とn型非晶質半導体層との間に10〜1
00Åの厚さに不純物の拡散防止のためブロッキング層
を介装せしめたことを特徴とする光起電力装置。 2、前記ブロッキング層はアモルファスシリコンカーバ
イド層である特許請求の範囲第1項記載の光起電力装置
。 3、前記ブロッキング層はSnO_2層、In_2O_
3・SnO_2層である特許請求の範囲第1項記載の光
起電力装置。 4、前記ブロッキング層は微結晶シリコン層である特許
請求の範囲第1項記載の光起電力装置。
[Scope of Claims] 1. In a photovoltaic device in which p-type, i-type, and n-type amorphous semiconductor layers are stacked on a transparent insulating substrate, the i-type amorphous semiconductor layer and the n-type amorphous semiconductor layer are stacked. 10 to 1 between type amorphous semiconductor layer
1. A photovoltaic device characterized by interposing a blocking layer with a thickness of 0.00 Å to prevent diffusion of impurities. 2. The photovoltaic device according to claim 1, wherein the blocking layer is an amorphous silicon carbide layer. 3. The blocking layer is SnO_2 layer, In_2O_
3. The photovoltaic device according to claim 1, which is a SnO_2 layer. 4. The photovoltaic device according to claim 1, wherein the blocking layer is a microcrystalline silicon layer.
JP60200745A 1985-09-10 1985-09-10 Photovoltaic device Pending JPS6260271A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60200745A JPS6260271A (en) 1985-09-10 1985-09-10 Photovoltaic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60200745A JPS6260271A (en) 1985-09-10 1985-09-10 Photovoltaic device

Publications (1)

Publication Number Publication Date
JPS6260271A true JPS6260271A (en) 1987-03-16

Family

ID=16429463

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60200745A Pending JPS6260271A (en) 1985-09-10 1985-09-10 Photovoltaic device

Country Status (1)

Country Link
JP (1) JPS6260271A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63274184A (en) * 1987-05-06 1988-11-11 Hitachi Ltd Photoelectric transducer and manufacture thereof
JPH0352271A (en) * 1989-07-20 1991-03-06 Sanyo Electric Co Ltd Photovoltaic device
JPH03106079A (en) * 1989-09-20 1991-05-02 Sanyo Electric Co Ltd Photovoltaic device
JPH08116073A (en) * 1994-10-17 1996-05-07 Hitachi Cable Ltd Compound semiconductor wafer and semiconductor device
US5897332A (en) * 1995-09-28 1999-04-27 Canon Kabushiki Kaisha Method for manufacturing photoelectric conversion element
JPH11186587A (en) * 1997-12-18 1999-07-09 Sanyo Electric Co Ltd Photodetecting element

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55108780A (en) * 1979-02-14 1980-08-21 Sharp Corp Thin film solar cell
JPS5743477A (en) * 1980-04-24 1982-03-11 Sanyo Electric Co Ltd Photovoltaic device
JPS59972A (en) * 1982-04-12 1984-01-06 シエブロン・リサ−チ・コンパニ− Compensating amorphous solar battery associated with insulating layer
JPS5955081A (en) * 1982-09-22 1984-03-29 Fuji Electric Corp Res & Dev Ltd Photoelectric conversion semiconductor device
JPS6050973A (en) * 1983-08-31 1985-03-22 Agency Of Ind Science & Technol Semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55108780A (en) * 1979-02-14 1980-08-21 Sharp Corp Thin film solar cell
JPS5743477A (en) * 1980-04-24 1982-03-11 Sanyo Electric Co Ltd Photovoltaic device
JPS59972A (en) * 1982-04-12 1984-01-06 シエブロン・リサ−チ・コンパニ− Compensating amorphous solar battery associated with insulating layer
JPS5955081A (en) * 1982-09-22 1984-03-29 Fuji Electric Corp Res & Dev Ltd Photoelectric conversion semiconductor device
JPS6050973A (en) * 1983-08-31 1985-03-22 Agency Of Ind Science & Technol Semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63274184A (en) * 1987-05-06 1988-11-11 Hitachi Ltd Photoelectric transducer and manufacture thereof
JPH0352271A (en) * 1989-07-20 1991-03-06 Sanyo Electric Co Ltd Photovoltaic device
JPH03106079A (en) * 1989-09-20 1991-05-02 Sanyo Electric Co Ltd Photovoltaic device
JPH08116073A (en) * 1994-10-17 1996-05-07 Hitachi Cable Ltd Compound semiconductor wafer and semiconductor device
US5897332A (en) * 1995-09-28 1999-04-27 Canon Kabushiki Kaisha Method for manufacturing photoelectric conversion element
JPH11186587A (en) * 1997-12-18 1999-07-09 Sanyo Electric Co Ltd Photodetecting element

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