JPH0878710A - Solar battery and its manufacture - Google Patents

Solar battery and its manufacture

Info

Publication number
JPH0878710A
JPH0878710A JP6212425A JP21242594A JPH0878710A JP H0878710 A JPH0878710 A JP H0878710A JP 6212425 A JP6212425 A JP 6212425A JP 21242594 A JP21242594 A JP 21242594A JP H0878710 A JPH0878710 A JP H0878710A
Authority
JP
Japan
Prior art keywords
silicon semiconductor
semiconductor layer
hydrogen
type
containing hydrogen
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6212425A
Other languages
Japanese (ja)
Other versions
JP3346907B2 (en
Inventor
Minoru Kaneiwa
実 兼岩
Satoshi Okamoto
諭 岡本
Ichiro Yamazaki
一郎 山嵜
Makoto Nishida
誠 西田
Yuji Komatsu
雄爾 小松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP21242594A priority Critical patent/JP3346907B2/en
Publication of JPH0878710A publication Critical patent/JPH0878710A/en
Application granted granted Critical
Publication of JP3346907B2 publication Critical patent/JP3346907B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0368—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors
    • H01L31/03682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors including only elements of Group IV of the Periodic Table
    • H01L31/03685—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors including only elements of Group IV of the Periodic Table including microcrystalline silicon, uc-Si
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H01L31/1872—Recrystallisation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/545—Microcrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/548—Amorphous silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Development (AREA)
  • Photovoltaic Devices (AREA)

Abstract

PURPOSE: To provide a manufacturing method of a solar battery which can constitute a solar battery with high photoelectric conversion efficiency, can restrain change of PN characteristic and substrate characteristic and enables easy manufacturing in a short time. CONSTITUTION: The title solar battery is constituted of a first conductivity type silicon semiconductor substrate 11, a second conductivity type silicon semiconductor layer 12 formed at an optical incidence side of the silicon semiconductor substrate 11, an amorphous silicon semiconductor layer 16 with hydrogen formed on a rear of the silicon semiconductor substrate 11 and a fine crystalline silicon semiconductor layer 17 with hydrogen of a first conductivity type formed in contact with a rear of the silicon semiconductor substrate 11 and scattered in the amorphous silicon semiconductor layer 16 with hydrogen. The fine crystalline silicon semiconductor layer 17 with hydrogen of a first conductivity type is formed by such a method as to cast laser light on a part of the amorphous silicon semiconductor layer 16 with hydrogen in atmosphere of impurities of a first conductivity type.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は太陽電池に関し、特に、
高い光電変換効率を有する結晶系シリコン太陽電池とそ
の製造方法に関する。FIELD OF THE INVENTION This invention relates to solar cells, and in particular
The present invention relates to a crystalline silicon solar cell having high photoelectric conversion efficiency and a method for manufacturing the same.

【０００２】[0002]

【従来の技術】結晶系シリコン太陽電池の光電変換効率
を高めるために、シリコン半導体基板の光入射側(以
下、受光面と記す)の反対側の裏面に、基板と同一導電
型で、より高濃度の不純物を含んだ水素を有する微結晶
シリコン半導体層を設けた構造の太陽電池が知られてい
る（例えば、特開平４−１９２５６９号公報）。2. Description of the Related Art In order to increase the photoelectric conversion efficiency of a crystalline silicon solar cell, a silicon semiconductor substrate with the same conductivity type as that of the substrate is provided on the back surface on the side opposite to the light incident side (hereinafter referred to as the light receiving surface). There is known a solar cell having a structure in which a microcrystalline silicon semiconductor layer containing hydrogen containing a concentration of impurities is provided (for example, Japanese Patent Laid-Open No. 4-192569).

【０００３】この太陽電池の断面図を図９に示す。第１
導電型のシリコン半導体基板３１の受光面には第２導電
型のシリコン半導体層３２が形成されており、裏面は熱
酸化膜層４０によって覆われている。熱酸化膜層４０に
は複数のドット状の開孔が設けられており、熱酸化膜層
４０の底面を覆うように形成された第１導電型の水素を
有する微結晶シリコン半導体層３７はそれらの開孔を介
してシリコン半導体基板３１に接触している。図１０の
エネルギバンド図に示すように、水素を有する微結晶シ
リコン半導体層３７はバンドギャップがシリコン半導体
基板３１より大きく、また、高濃度に不純物が添加され
ているため、シリコン半導体基板３１内の水素を有する
微結晶シリコン半導体層３７の近傍に内部電界が形成さ
れる。この内部電界により、シリコン半導体基板３１裏
面近傍で発生した多数キャリアは効率的に裏面電極３８
へ取り出され、少数キャリアはシリコン半導体基板３１
内へ押し戻されて、シリコン半導体基板３１裏面近傍で
のキャリアの再結合が低減される。A cross-sectional view of this solar cell is shown in FIG. First
A second conductivity type silicon semiconductor layer 32 is formed on the light receiving surface of the conductivity type silicon semiconductor substrate 31, and the back surface is covered with a thermal oxide film layer 40. The thermal oxide film layer 40 is provided with a plurality of dot-shaped openings, and the microcrystalline silicon semiconductor layer 37 having hydrogen of the first conductivity type formed so as to cover the bottom surface of the thermal oxide film layer 40 includes Is in contact with the silicon semiconductor substrate 31 through the opening. As shown in the energy band diagram of FIG. 10, since the band gap of the microcrystalline silicon semiconductor layer 37 containing hydrogen is larger than that of the silicon semiconductor substrate 31, and impurities are added at a high concentration, An internal electric field is formed in the vicinity of the microcrystalline silicon semiconductor layer 37 containing hydrogen. Due to this internal electric field, the majority carriers generated in the vicinity of the back surface of the silicon semiconductor substrate 31 are efficiently back surface electrodes 38.
And the minority carriers are taken out to the silicon semiconductor substrate 31.
By being pushed back in, the recombination of carriers near the back surface of the silicon semiconductor substrate 31 is reduced.

【０００４】そして、シリコン半導体基板３１の裏面に
接して、上記水素を有する微結晶半導体層を形成した開
孔部以外には、熱酸化膜層４０が存在するようにしてい
るので、この層４０中の酸素原子により、シリコン半導
体基板３１の裏面における多数キャリアを取り出さない
部分の欠陥を不活性化(パッシベート)させ、光電変換に
より形成されたキャリアが上記欠陥を介して再結合する
ことを抑制することができる(以下、裏面パッシベーシ
ョン効果と記す)。Since the thermal oxide film layer 40 is provided in contact with the back surface of the silicon semiconductor substrate 31 except for the opening where the microcrystalline semiconductor layer containing hydrogen is formed, this layer 40 is formed. Oxygen atoms in the layer inactivate defects (passivation) in a portion of the back surface of the silicon semiconductor substrate 31 from which majority carriers are not taken out, and suppress recombination of carriers formed by photoelectric conversion through the defects. (Hereinafter referred to as back surface passivation effect).

【０００５】[0005]

【発明が解決しようとする課題】しかしながら、裏面パ
ッシベーション効果を引き出すための層(以下、裏面パ
ッシベーション層と記す)として熱酸化膜層４０を用い
ると、作製に際して８００℃以上の高温での処理が必要
となる。結晶系シリコン太陽電池の作製において、この
ような高温での処理は以下に示すような問題を引き起こ
すため、できる限り避ける必要がある。However, when the thermal oxide film layer 40 is used as a layer for deriving the back surface passivation effect (hereinafter referred to as the back surface passivation layer), a high temperature treatment of 800 ° C. or higher is required for fabrication. Becomes In the production of a crystalline silicon solar cell, such a treatment at a high temperature causes the following problems and should be avoided as much as possible.

【０００６】第２導電型のシリコン半導体層３２のド
ーパントプロファイルが変化して、ＰＮ接合の特性が変
わってしまうため、太陽電池の作製工程において、この
変化を考慮した条件設定を行う必要が生じ、作製条件の
管理が複雑となる。Since the dopant profile of the second conductivity type silicon semiconductor layer 32 changes and the characteristics of the PN junction change, it is necessary to set the conditions in consideration of this change in the manufacturing process of the solar cell. The management of manufacturing conditions becomes complicated.

【０００７】シリコン半導体基板３１の特性の低下
(特に、基板でのキャリア寿命の低下)を引き起こす。Degradation of characteristics of silicon semiconductor substrate 31
(In particular, the carrier life of the substrate is shortened).

【０００８】また、熱酸化膜層４０は、シリコン半導体
基板３１の裏面近傍で発生したキャリアを通さないた
め、裏面でのキャリアの取り出し効率が低下するという
問題があった。Further, since the thermal oxide film layer 40 does not pass carriers generated in the vicinity of the back surface of the silicon semiconductor substrate 31, there is a problem that the carrier extraction efficiency on the back surface is reduced.

【０００９】更に、シリコン半導体基板３１の裏面に熱
酸化膜層４０及び水素を有する微結晶シリコン半導体層
３７を作製する工程には、堆積速度が非常に遅い(０．
１ｎｍ／ｓ以下)プラズマＣＶＤ法による水素を有する
微結晶シリコン半導体層３７の堆積工程や、フォトエッ
チング等の工程が含まれており、裏面での処理工程は複
雑で長時間（通常数十分）かかるものであった。Further, in the step of forming the thermal oxide film layer 40 and the microcrystalline silicon semiconductor layer 37 containing hydrogen on the back surface of the silicon semiconductor substrate 31, the deposition rate is very slow (0.
(1 nm / s or less) A step of depositing the microcrystalline silicon semiconductor layer 37 having hydrogen by a plasma CVD method, a step of photoetching, and the like are included, and a treatment step on the back surface is complicated and takes a long time (usually several tens of minutes). It was such a thing.

【００１０】本発明は以上の問題点を解決するもので、
ＰＮ特性や基板特性の変化が抑制された高光電変換効率
を有する太陽電池の構成、及び、作製を簡略かつ短時間
に行える太陽電池の製造方法を提供することを目的とす
る。The present invention solves the above problems.
It is an object of the present invention to provide a structure of a solar cell having high photoelectric conversion efficiency in which changes in PN characteristics and substrate characteristics are suppressed, and a method for manufacturing a solar cell that can be manufactured simply and in a short time.

【００１１】[0011]

【課題を解決するための手段】上記目的を達成するため
に請求項１に記載の太陽電池は、第１導電型のシリコン
半導体基板と、このシリコン半導体基板の受光面に形成
した第２導電型のシリコン半導体層と、シリコン半導体
基板の裏面上に形成した水素を有する非晶質シリコン半
導体層と、シリコン半導体基板裏面上にあって、前記水
素を有する非晶質シリコン半導体層部に分散させて形成
された第１導電型の水素を有する微結晶シリコン半導体
層と、を有する構成としたものである。In order to achieve the above object, a solar cell according to claim 1 is a first conductivity type silicon semiconductor substrate, and a second conductivity type formed on a light receiving surface of the silicon semiconductor substrate. And a hydrogen-containing amorphous silicon semiconductor layer formed on the back surface of the silicon semiconductor substrate, and dispersed on the hydrogen-containing amorphous silicon semiconductor layer portion on the back surface of the silicon semiconductor substrate. And a formed microcrystalline silicon semiconductor layer containing first conductivity type hydrogen.

【００１２】また、請求項２に記載の太陽電池は、上記
水素を有する非晶質シリコン半導体層の導電型を基板と
同一の導電型としたものである。Further, in the solar cell according to the second aspect, the conductivity type of the amorphous silicon semiconductor layer containing hydrogen is the same as that of the substrate.

【００１３】請求項３に記載の太陽電池の製造方法は、
少なくとも第１導電型のシリコン半導体基板の受光面に
第２導電型のシリコン半導体を形成する工程と、シリコ
ン半導体基板の裏面上の全面に水素を有する非晶質シリ
コン半導体層を形成する工程と、この水素を有する非晶
質シリコン半導体層の一部にレーザ光を照射して、その
部分を第１導電型の水素を有する微結晶シリコン半導体
層に変化させる工程とを含むものである。A method of manufacturing a solar cell according to claim 3 is
Forming a second conductivity type silicon semiconductor on at least the light receiving surface of the first conductivity type silicon semiconductor substrate; forming an amorphous silicon semiconductor layer containing hydrogen over the entire back surface of the silicon semiconductor substrate; A step of irradiating a part of the amorphous silicon semiconductor layer containing hydrogen with a laser beam to change the part to a microcrystalline silicon semiconductor layer containing hydrogen of the first conductivity type is included.

【００１４】請求項４に記載の太陽電池の製造方法は、
上記請求項３に記載の製造方法において、レーザ光照射
を行う際の雰囲気に、水素を有する非晶質シリコン半導
体層を第１導電型の水素を有する微結晶シリコン半導体
層に変化させる第１導電型の不純物を含めたものであ
る。A method of manufacturing a solar cell according to claim 4 is
4. The manufacturing method according to claim 3, wherein the amorphous silicon semiconductor layer containing hydrogen is changed to a microcrystalline silicon semiconductor layer containing hydrogen of the first conductivity type in an atmosphere during laser light irradiation. Includes mold impurities.

【００１５】請求項５に記載の太陽電池の製造方法は、
上記請求項３に記載の製造方法において、シリコン半導
体基板の裏面上の全面に第１導電型の水素を有する非晶
質シリコン半導体層を形成し、この第１導電型の水素を
有する非晶質シリコン半導体層の一部にレーザ光を照射
して、その部分を第１導電型の水素を有する微結晶シリ
コン半導体層に変化させてなるものである。A method of manufacturing a solar cell according to claim 5 is
4. The manufacturing method according to claim 3, wherein an amorphous silicon semiconductor layer containing hydrogen of the first conductivity type is formed on the entire back surface of the silicon semiconductor substrate, and the amorphous silicon semiconductor layer containing hydrogen of the first conductivity type is formed. A part of the silicon semiconductor layer is irradiated with laser light, and the part is changed to a microcrystalline silicon semiconductor layer containing hydrogen of the first conductivity type.

【００１６】また、請求項６に記載の太陽電池の製造方
法は、上記請求項３及び請求項５に記載の製造方法にお
いて、レーザ光の照射を行う際の雰囲気に水素を含めた
ものである。The solar cell manufacturing method according to claim 6 is the manufacturing method according to any one of claims 3 and 5, wherein hydrogen is included in an atmosphere when the laser light is irradiated. .

【００１７】更に、請求項７に記載の太陽電池の製造方
法は、上記請求項５に記載の製造方法において、レーザ
光の照射を行う際の雰囲気に第１導電型のドーパントを
含めたものである。Further, a solar cell manufacturing method according to a seventh aspect is the manufacturing method according to the fifth aspect, wherein a first conductivity type dopant is included in an atmosphere when the laser light is irradiated. is there.

【００１８】[0018]

【作用】請求項１記載の太陽電池は、上述のように、裏
面パッシベーション層として水素を有する非晶質シリコ
ン半導体層を用いるため、シリコン半導体基板の裏面に
発生する欠陥を水素を有する非晶質シリコン半導体層中
の水素原子により不活性化することができ、光電変換に
より生じるキャリアの前記欠陥を介した再結合を抑制で
きる。また、水素を有する非晶質シリコン半導体層の形
成に必要な基板温度は３００℃以下であり、裏面パッシ
ベーション層に熱酸化膜層を用いた場合のような高温で
の処理を必要とせず、受光面のＰＮ特性の変化や基板特
性の変化を抑制できる。Since the solar cell according to claim 1 uses the amorphous silicon semiconductor layer having hydrogen as the back surface passivation layer as described above, the defects having hydrogen on the back surface of the silicon semiconductor substrate are amorphous. It can be inactivated by hydrogen atoms in the silicon semiconductor layer, and recombination of carriers generated by photoelectric conversion via the defects can be suppressed. Further, the substrate temperature required for forming the amorphous silicon semiconductor layer containing hydrogen is 300 ° C. or lower, which does not require high temperature treatment as in the case where a thermal oxide film layer is used for the back surface passivation layer, It is possible to suppress changes in the PN characteristics of the surface and changes in the substrate characteristics.

【００１９】また、請求項２に記載したように、この構
造において、水素を有する非晶質シリコン半導体層の導
電型を基板と同一の導電型とし、抵抗を低くすることが
可能であり、この層を通して基板裏面近傍で発生した多
数キャリアの一部を裏面電極に導くことができる。Further, as described in claim 2, in this structure, the conductivity type of the amorphous silicon semiconductor layer containing hydrogen can be made the same as that of the substrate, and the resistance can be lowered. A part of majority carriers generated in the vicinity of the back surface of the substrate can be guided to the back surface electrode through the layer.

【００２０】また、請求項３記載の製造方法では、第１
導電型のシリコン半導体基板上に形成した水素を有する
非晶質シリコン半導体層の一部に、レーザ光照射を行う
ことにより、水素を有する第１導電型の微結晶シリコン
半導体層を得る。従って、基板裏面での処理工程には、
堆積速度の遅いプラズマＣＶＤ法により水素を有する微
結晶シリコン半導体層を堆積する工程や、フォトエッチ
ング等の複雑な工程を含まないため、処理を容易にしか
も短時間（通常数分）で行うことができる。According to the manufacturing method of claim 3, the first
By irradiating part of the hydrogen-containing amorphous silicon semiconductor layer formed over the conductivity-type silicon semiconductor substrate with laser light, a first-conductivity-type microcrystalline silicon semiconductor layer containing hydrogen is obtained. Therefore, in the processing step on the back side of the substrate,
Since a step of depositing a microcrystalline silicon semiconductor layer containing hydrogen by a plasma CVD method with a low deposition rate and a complicated step such as photoetching are not included, the treatment can be performed easily and in a short time (usually several minutes). it can.

【００２１】請求項４記載の製造方法によれば、レーザ
光照射を行う際の雰囲気に第１導電型の不純物を含める
ことにより、水素を有する非晶質シリコン半導体層を第
１導電型の微結晶シリコン半導体層に変化させることが
できる。According to the manufacturing method of the fourth aspect, the amorphous silicon semiconductor layer containing hydrogen is made to have a fineness of the first conductivity type by including impurities of the first conductivity type in the atmosphere during the laser irradiation. It can be changed to a crystalline silicon semiconductor layer.

【００２２】請求項５記載の製造方法では、第１導電型
のシリコン半導体基板上に形成した第１導電型の水素を
有する非晶質シリコン半導体層の一部に、レーザ光照射
を行うことにより、水素を有する第１導電型の微結晶シ
リコン半導体層を得る。In the manufacturing method according to the fifth aspect, a part of the amorphous silicon semiconductor layer containing hydrogen of the first conductivity type formed on the silicon semiconductor substrate of the first conductivity type is irradiated with laser light. A first-conductivity-type microcrystalline silicon semiconductor layer containing hydrogen is obtained.

【００２３】請求項６記載の製造方法では、レーザ光照
射を行う際の雰囲気に水素を含めているため、レーザ光
照射中に層中から放出される水素を補充することができ
る。In the manufacturing method according to the sixth aspect, since hydrogen is included in the atmosphere when the laser light irradiation is performed, hydrogen released from the layer during the laser light irradiation can be replenished.

【００２４】請求項７記載の製造方法では、レーザ光照
射を行う際の雰囲気に第１導電型のドーパントを含めて
いるため、形成される水素を有する微結晶シリコン半導
体層の不純物濃度を高めることができる。In the manufacturing method according to the seventh aspect, since the first conductivity type dopant is included in the atmosphere when the laser light irradiation is performed, the impurity concentration of the formed microcrystalline silicon semiconductor layer containing hydrogen is increased. You can

【００２５】[0025]

【実施例】【Example】

（第１の実施例）図１は本発明の第１の実施例の太陽電
池の断面図である。Ｐ型シリコン半導体基板１１の受光
面には、Ｎ型シリコン半導体層１２が形成されている。
そして、更にその上を覆って酸化シリコン膜層１３，反
射防止膜層１４が形成されている。酸化シリコン膜層１
３はＮ型シリコン半導体層１２の表面欠陥を不活性化す
るために、反射防止膜層１４は入射光の反射を低減する
ために、設けられている。電流は、酸化シリコン膜層１
３，反射防止膜層１４を貫通してＮ型シリコン半導体層
１２に接続されたグリッド電極１５を介して取り出され
る。Ｐ型シリコン半導体基板１１の裏面には水素を有す
る真性の非晶質シリコン半導体層１６が形成されてお
り、その層１６部に分散して不純物が高濃度に添加され
た水素を有するＰ+ 型微結晶シリコン半導体層１７が形
成されている。それらは裏面電極１８によって覆われて
いる。裏面での電流は、Ｐ型シリコン半導体基板１１か
ら水素を有するＰ+ 型微結晶シリコン半導体層１７と裏
面電極１８を介して取り出される。(First Embodiment) FIG. 1 is a sectional view of a solar cell according to the first embodiment of the present invention. An N-type silicon semiconductor layer 12 is formed on the light receiving surface of the P-type silicon semiconductor substrate 11.
Then, a silicon oxide film layer 13 and an antireflection film layer 14 are further formed so as to cover them. Silicon oxide film layer 1
3 is provided to inactivate surface defects of the N-type silicon semiconductor layer 12, and the antireflection film layer 14 is provided to reduce reflection of incident light. Current is silicon oxide film layer 1
3, It is taken out through the grid electrode 15 which penetrates the antireflection film layer 14 and is connected to the N-type silicon semiconductor layer 12. An intrinsic amorphous silicon semiconductor layer 16 having hydrogen is formed on the back surface of the P-type silicon semiconductor substrate 11, and a P + -type having hydrogen added with a high concentration of impurities dispersed in the layer 16 portion. The microcrystalline silicon semiconductor layer 17 is formed. They are covered by the back electrode 18. The current on the back surface is extracted from the P-type silicon semiconductor substrate 11 via the P + -type microcrystalline silicon semiconductor layer 17 containing hydrogen and the back electrode 18.

【００２６】上記のような構造であって、本例によれ
ば、水素を有するＰ+ 型微結晶シリコン半導体層１７と
Ｐ型シリコン半導体基板１１との間には内部電界が存在
するため、Ｐ型シリコン半導体基板１１の裏面近傍で発
生したキャリアのうちの多数キャリア（空孔）は裏面電
極１８へ効率よく導出される。また、Ｐ型シリコン半導
体基板１１の裏面に接して水素を有する真性非晶質シリ
コン半導体層１６を形成しているため、Ｐ型シリコン半
導体基板１１の裏面に発生する欠陥を、水素を有する非
晶質シリコン半導体層１６中の水素原子により不活性化
することができる。その結果、Ｐ型シリコン半導体基板
１１の裏面近傍で発生したキャリアの上記欠陥を介した
再結合を抑制できる。これらにより、高い光電変換効率
を有する太陽電池が実現できる。According to the present embodiment having the above structure, an internal electric field exists between the P + -type microcrystalline silicon semiconductor layer 17 containing hydrogen and the P-type silicon semiconductor substrate 11, so that P Of the carriers generated near the back surface of the type silicon semiconductor substrate 11, majority carriers (holes) are efficiently led to the back surface electrode 18. Further, since the intrinsic amorphous silicon semiconductor layer 16 containing hydrogen is formed in contact with the back surface of the P-type silicon semiconductor substrate 11, defects generated on the back surface of the P-type silicon semiconductor substrate 11 are amorphous. Can be inactivated by hydrogen atoms in the silicon semiconductor layer 16. As a result, recombination of carriers generated near the back surface of the P-type silicon semiconductor substrate 11 via the above defects can be suppressed. With these, a solar cell having high photoelectric conversion efficiency can be realized.

【００２７】図２は図１の太陽電池の製造方法を示す製
造フロー図である。FIG. 2 is a manufacturing flow chart showing a method for manufacturing the solar cell of FIG.

【００２８】まず、単結晶のＰ型シリコン半導体基板１
１を洗浄した後、表面が凹凸になるように異方性エッチ
ングを行う。シリコン半導体基板１１は、単結晶のＰ型
シリコン半導体基板に限らず、多結晶のＰ型シリコン半
導体基板を用いることも可能である。この場合の表面の
凹凸形成は、レーザ光照射や機械的手段によって溝を掘
る事により行う。First, a single crystal P-type silicon semiconductor substrate 1
After cleaning No. 1, anisotropic etching is performed so that the surface becomes uneven. The silicon semiconductor substrate 11 is not limited to a single crystal P-type silicon semiconductor substrate, but a polycrystalline P-type silicon semiconductor substrate can also be used. In this case, the unevenness on the surface is formed by irradiating a laser beam or digging a groove by a mechanical means.

【００２９】次に、Ｎ型シリコン半導体層１２を、Ｐ型
シリコン半導体基板１１の受光面に、オキシ塩化リン
（ＰＯＣｌ3 ）を用いた気相拡散によって、リン（Ｐ）
を拡散して形成する。続いて、酸化シリコン（ＳｉＯ
2 ）膜層１３を熱酸化法で形成し、窒化シリコン（Ｓｉ
3 Ｎ4 ）膜からなる反射防止膜層１４をプラズマＣＶＤ
法により形成する。反射防止膜１４としては酸化チタン
（ＴｉＯ2 ）膜やアルミナ（Ａｌ2 Ｏ3 ）膜等も使用で
きる。Next, the N-type silicon semiconductor layer 12 is deposited on the light-receiving surface of the P-type silicon semiconductor substrate 11 by phosphorus (P) by vapor phase diffusion using phosphorus oxychloride (POCl 3 ).
Are diffused and formed. Then, silicon oxide (SiO 2
2 ) The film layer 13 is formed by the thermal oxidation method, and the silicon nitride (Si
The antireflection film layer 14 made of 3 N 4 ) film is formed by plasma CVD.
It is formed by the method. As the antireflection film 14, a titanium oxide (TiO 2 ) film, an alumina (Al 2 O 3 ) film, or the like can be used.

【００３０】続いて、Ｐ型シリコン半導体基板１１の裏
面をエッチングして、裏面に堆積したＮ型シリコン半導
体と酸化シリコン膜を除去する。Ｎ型シリコン半導体層
１２の形成をリン添加されたシリコン酸化物ガラス液の
ような塗布液を用いて受光面だけに拡散して行った場合
には、裏面のＮ型シリコン半導体の除去は不要である。Then, the back surface of the P-type silicon semiconductor substrate 11 is etched to remove the N-type silicon semiconductor and the silicon oxide film deposited on the back surface. When the N-type silicon semiconductor layer 12 is formed by diffusing only the light receiving surface using a coating solution such as a silicon oxide glass solution containing phosphorus, it is not necessary to remove the N-type silicon semiconductor on the back surface. is there.

【００３１】次に、プラズマＣＶＤ法により、膜厚３０
０ｎｍの水素を有する真性非晶質シリコン半導体層１６
をＰ型シリコン半導体基板１１の裏面上に形成する。上
記真性非晶質シリコン半導体層１６は、基板温度２００
℃，入力ＲＦパワー１０Ｗ（１３．５６ＭＨｚ），原料
ガスにシラン（ＳｉＨ4 ）ガスを用いた条件で成膜し
た。成膜速度は約１ｎｍ／ｓであった。この条件は一実
施例であり、成膜条件は上記条件に限られるものではな
い。例えば、原料ガス種では、シランガスと水素（Ｈ
2 ）ガスの混合ガスやジシラン（Ｓｉ2 Ｈ6 ）ガスを用
いても良い。Next, a film thickness of 30 is formed by the plasma CVD method.
Intrinsic amorphous silicon semiconductor layer 16 having 0 nm hydrogen
Are formed on the back surface of the P-type silicon semiconductor substrate 11. The intrinsic amorphous silicon semiconductor layer 16 has a substrate temperature of 200
The film was formed under the conditions of ℃, input RF power of 10 W (13.56 MHz), and silane (SiH 4 ) gas as a source gas. The film formation rate was about 1 nm / s. This condition is one example, and the film forming condition is not limited to the above condition. For example, in the source gas species, silane gas and hydrogen (H
2 ) A mixed gas of gases or disilane (Si 2 H 6 ) gas may be used.

【００３２】次に、水素を有する真性非晶質シリコン半
導体層１６の一部に、Ｐ型ドーパントを含む雰囲気中で
レーザ光を照射することにより、その部分を微結晶化す
ると同時にＰ型ドーパントを添加し、水素を有するＰ+
型微結晶シリコン半導体層１７を得る。Ｐ型ドーパント
としては３塩化ボロン（ＢＣｌ3 ），トリメチルボロン
（Ｂ（ＣＨ3 ）3 ），ジボラン（Ｂ2 Ｈ6 ）等が使用で
き、レーザ光としては、ＡｒＦエキシマレーザ（波長：
１９５ｎｍ），ＫｒＦエキシマレーザ（波長：２４８ｎ
ｍ），ＸｅＣｌエキシマレーザ（波長：３０８ｎｍ）等
が使用できる。照射レーザ光量は４００ｍＪ／ｃｍ2 と
したが、これに限られるものではない。Next, by irradiating a part of the intrinsic amorphous silicon semiconductor layer 16 containing hydrogen with a laser beam in an atmosphere containing a P-type dopant, that part is microcrystallized and at the same time the P-type dopant is added. P + with hydrogen added
The type microcrystalline silicon semiconductor layer 17 is obtained. Boron trichloride (BCl 3 ), trimethylboron (B (CH 3 ) 3 ), diborane (B 2 H 6 ) or the like can be used as the P-type dopant, and ArF excimer laser (wavelength:
195 nm), KrF excimer laser (wavelength: 248 n
m), XeCl excimer laser (wavelength: 308 nm), etc. can be used. The irradiation laser light amount was set to 400 mJ / cm 2 , but it is not limited to this.

【００３３】また、レーザ光を照射する雰囲気に水素ガ
スを加えておけば、水素を有する真性非晶質シリコン半
導体層１６を微結晶化する際に放出される水素の補充を
することができる。従って、水素を有する真性非晶質シ
リコン半導体層１６及び水素を有するＰ+ 型微結晶シリ
コン半導体層１７中の水素抜けに起因する欠陥を抑制す
ることができる。If hydrogen gas is added to the atmosphere for irradiating the laser beam, the hydrogen released when the intrinsic amorphous silicon semiconductor layer 16 containing hydrogen is microcrystallized can be replenished. Therefore, it is possible to suppress defects due to hydrogen escape in the intrinsic amorphous silicon semiconductor layer 16 containing hydrogen and the P + -type microcrystalline silicon semiconductor layer 17 containing hydrogen.

【００３４】続いて、裏面電極１８を、水素を有する真
性の非晶質シリコン半導体層１６と水素を有するＰ+ 型
微結晶シリコン半導体層１７を覆って、真空蒸着法でア
ルミニウムや銀などの金属を蒸着することにより形成す
る。次に、フォトエッチング法を用いて受光面側の酸化
シリコン膜層１３及び反射防止膜１４の加工を行った
後、チタン，パラジウム，銀の順で金属の蒸着を行う。
そして最後に、リフトオフを行うことで、グリッド電極
１５を形成する。Subsequently, the back surface electrode 18 is covered with the hydrogen-containing intrinsic amorphous silicon semiconductor layer 16 and the hydrogen-containing P + -type microcrystalline silicon semiconductor layer 17, and a metal such as aluminum or silver is vacuum-deposited. Is formed by vapor deposition. Next, the silicon oxide film layer 13 and the antireflection film 14 on the light receiving surface side are processed by using a photo-etching method, and then metal is deposited in the order of titanium, palladium, and silver.
Finally, lift-off is performed to form the grid electrode 15.

【００３５】以上の工程では、Ｐ型シリコン半導体基板
１１の裏面をパッシベートする水素を有する真性非晶質
シリコン半導体層１６及び内部電界を形成する水素を有
する微結晶シリコン半導体層１７の作製を３００℃以下
の低温で行うことができる。従って、高温処理を繰り返
すことによって起こる受光面のＰＮ接合の特性変化や基
板特性の劣化を抑制することができる。また、Ｐ型シリ
コン基板１１の裏面側での処理工程には、フォトエッチ
ング等の複雑な処理工程や、水素を有する微結晶シリコ
ン半導体層のプラズマＣＶＤ法による形成のような長時
間かかる工程がないため、処理を容易に短時間で行うこ
とができる。In the above steps, the intrinsic amorphous silicon semiconductor layer 16 containing hydrogen that passivates the back surface of the P-type silicon semiconductor substrate 11 and the microcrystalline silicon semiconductor layer 17 containing hydrogen that forms an internal electric field are manufactured at 300 ° C. It can be performed at the following low temperatures. Therefore, it is possible to suppress the characteristic change of the PN junction of the light receiving surface and the deterioration of the substrate characteristic which are caused by repeating the high temperature treatment. Further, the processing step on the back surface side of the P-type silicon substrate 11 does not have a complicated processing step such as photoetching or a step which takes a long time such as formation of a microcrystalline silicon semiconductor layer containing hydrogen by a plasma CVD method. Therefore, the processing can be easily performed in a short time.

【００３６】（第２の実施例）図３は、第２の実施例の
太陽電池を示す断面図である。図１と同一の部分は同一
符号を用いて表し、説明を省略する。Ｐ型シリコン半導
体基板１１の裏面上には、水素を有するＰ型非晶質シリ
コン半導体層１９が形成され、更に、Ｐ型シリコン半導
体基板１１に接し、上記水素を有するＰ型非晶質シリコ
ン半導体層１９部に分散して、水素を有するＰ+ 型微結
晶シリコン半導体層１７が形成されている。この構成の
場合も、水素を有するＰ型非晶質シリコン半導体層１９
が、上記第１の実施例と同様に、Ｐ型シリコン半導体基
板１１の裏面に発生する欠陥を水素原子により不活性化
することができ、Ｐ型シリコン半導体基板１１の裏面近
傍で発生したキャリアの上記欠陥を介した再結合を抑制
できる。また、裏面パッシベーション層として、特に、
水素を有するＰ型非晶質シリコン半導体層１９を用いる
と、その層１９自身に導電性があるため、この層を通し
て多数キャリアの一部を裏面電極１８へと導くことがで
き、更に高い光電変換効率を有する太陽電池が実現でき
る。(Second Embodiment) FIG. 3 is a sectional view showing a solar cell according to a second embodiment. The same parts as those in FIG. 1 are denoted by the same reference numerals and the description thereof will be omitted. A P-type amorphous silicon semiconductor layer 19 containing hydrogen is formed on the back surface of the P-type silicon semiconductor substrate 11, and is further in contact with the P-type silicon semiconductor substrate 11 and has the above-mentioned P-type amorphous silicon semiconductor containing hydrogen. A P + -type microcrystalline silicon semiconductor layer 17 having hydrogen dispersed in the layer 19 is formed. Also in this configuration, the P-type amorphous silicon semiconductor layer 19 containing hydrogen
However, as in the first embodiment, defects generated on the back surface of the P-type silicon semiconductor substrate 11 can be inactivated by hydrogen atoms, and carriers generated near the back surface of the P-type silicon semiconductor substrate 11 can be removed. Recombination via the above defects can be suppressed. Further, as the back surface passivation layer, in particular,
When the P-type amorphous silicon semiconductor layer 19 containing hydrogen is used, since the layer 19 itself has conductivity, a part of majority carriers can be guided to the back surface electrode 18 through this layer, resulting in higher photoelectric conversion. A solar cell with efficiency can be realized.

【００３７】次に、図４は図３の太陽電池の製造方法を
示す製造フロー図である。尚、水素を有するＰ型非晶質
シリコン半導体層１９及び水素を有するＰ+ 型微結晶シ
リコン半導体層１７の作製工程以外、即ち、Ｎ型シリコ
ン半導体層１２，酸化シリコン膜層１３，反射防止膜層
１４，グリッド電極１５，裏面電極１８の作製工程は上
記実施例１の太陽電池の製造工程と同様であるため説明
を省略する。Next, FIG. 4 is a manufacturing flow chart showing a method of manufacturing the solar cell of FIG. It should be noted that other than the steps of manufacturing the P-type amorphous silicon semiconductor layer 19 containing hydrogen and the P + -type microcrystalline silicon semiconductor layer 17 containing hydrogen, that is, the N-type silicon semiconductor layer 12, the silicon oxide film layer 13, the antireflection film. The manufacturing process of the layer 14, the grid electrode 15, and the back surface electrode 18 is the same as the manufacturing process of the solar cell of the first embodiment, and thus the description thereof is omitted.

【００３８】水素を有するＰ型非晶質シリコン半導体層
１９はプラズマＣＶＤ法により成膜した。成膜条件は基
板温度＝２００℃，入力ＲＦパワー＝１０Ｗ，原料ガス
＝Ｈ2希釈のＳｉＨ4とＢ2Ｈ6の混合ガス，Ｂ2Ｈ6／Ｓｉ
Ｈ4＝０．００２，膜厚＝３００ｎｍである。この条件
は、一実施例であり、上記条件以外でも製膜可能であ
る。The P-type amorphous silicon semiconductor layer 19 containing hydrogen was formed by the plasma CVD method. The film forming conditions are: substrate temperature = 200 ° C., input RF power = 10 W, source gas = H 2 diluted mixed gas of SiH 4 and B 2 H 6 , B 2 H 6 / Si
H 4 = 0.002, film thickness = 300 nm. This condition is an example, and the film can be formed under other conditions.

【００３９】水素を有するＰ+ 型微結晶シリコン半導体
層１７は水素を有するＰ型非晶質シリコン半導体層１９
の一部分にレーザ光を照射することにより得られる。一
般に、水素を有するＰ型の非晶質シリコン半導体中のボ
ロンの活性化率は低いが、それが微結晶化するとボロン
の活性化率が高くなり、Ｐ+ 型となる。The P + type microcrystalline silicon semiconductor layer 17 containing hydrogen is the P type amorphous silicon semiconductor layer 19 containing hydrogen.
It is obtained by irradiating a part of the laser beam. In general, the activation rate of boron in a P-type amorphous silicon semiconductor containing hydrogen is low, but when it is microcrystallized, the activation rate of boron becomes high and becomes P + -type.

【００４０】また、レーザ光照射する際の雰囲気に水素
ガスを含めると、水素を有するＰ型非晶質シリコン半導
体層１９を微結晶化させる際に層中より放出される水素
を補充することができる。従って、水素抜けに起因する
欠陥を抑制することができる。Further, when hydrogen gas is included in the atmosphere during laser irradiation, hydrogen released from the layer can be replenished when the P-type amorphous silicon semiconductor layer 19 containing hydrogen is microcrystallized. it can. Therefore, it is possible to suppress defects caused by hydrogen desorption.

【００４１】更に、水素を有するＰ型非晶質シリコン半
導体層１９にレーザ光を照射して水素を有するＰ+ 型微
結晶シリコン半導体層１７とする際の雰囲気に３塩化ボ
ロンガス，トリメチルボロンガス，ジボランガス等のド
ーパントを含めると、より高濃度の不純物を有する水素
を有するＰ+ 型微結晶シリコン半導体層１７が得られ、
シリコン半導体基板１１の裏面と水素を有するＰ+ 型微
結晶シリコン半導体層１７との間により大きな内部電界
が生じる。Further, the P-type amorphous silicon semiconductor layer 19 containing hydrogen is irradiated with laser light to form the P + -type microcrystalline silicon semiconductor layer 17 containing hydrogen in the atmosphere of boron trichloride gas, trimethylboron gas, When a dopant such as diborane gas is included, a P + -type microcrystalline silicon semiconductor layer 17 having hydrogen having a higher concentration of impurities is obtained,
A larger internal electric field is generated between the back surface of the silicon semiconductor substrate 11 and the P + -type microcrystalline silicon semiconductor layer 17 containing hydrogen.

【００４２】以上の製造方法においても、上記第１の実
施例の場合と同様に、太陽電池の作製を容易にしかも短
時間で行うことができる。Also in the above manufacturing method, the solar cell can be manufactured easily and in a short time, as in the case of the first embodiment.

【００４３】（第３の実施例）図５は本発明の第３の実
施例の太陽電池の断面図である。Ｎ型シリコン半導体基
板２１の受光面には、Ｐ型シリコン半導体層２２が形成
されている。そして、更にその上を覆って酸化シリコン
膜層２３，反射防止膜層２４が形成されている。酸化シ
リコン膜層２３はＰ型シリコン半導体層２２の表面欠陥
を不活性化するために、反射防止膜層２４は入射光の反
射を低減するために、設けられている。電流は、酸化シ
リコン膜層２３，反射防止膜層２４を貫通してＰ型シリ
コン半導体層２２に接続されたグリッド電極２５を介し
て取り出される。Ｎ型シリコン半導体基板２１の裏面に
は水素を有する真性の非晶質シリコン半導体層２６が形
成されており、その層２６部に分散して不純物が高濃度
に添加された水素を有するＮ+ 型微結晶シリコン半導体
層２７が形成されている。それらは裏面電極２８によっ
て覆われており、裏面での電流は、Ｎ型シリコン半導体
基板２１から水素を有するＮ+ 型微結晶シリコン半導体
層２７と裏面電極２８を介して取り出される。(Third Embodiment) FIG. 5 is a sectional view of a solar cell according to a third embodiment of the present invention. A P-type silicon semiconductor layer 22 is formed on the light-receiving surface of the N-type silicon semiconductor substrate 21. Then, a silicon oxide film layer 23 and an antireflection film layer 24 are further formed so as to cover them. The silicon oxide film layer 23 is provided to inactivate surface defects of the P-type silicon semiconductor layer 22, and the antireflection film layer 24 is provided to reduce reflection of incident light. The electric current is taken out through the grid electrode 25 penetrating the silicon oxide film layer 23 and the antireflection film layer 24 and connected to the P-type silicon semiconductor layer 22. An intrinsic amorphous silicon semiconductor layer 26 containing hydrogen is formed on the back surface of the N-type silicon semiconductor substrate 21, and an N + -type containing hydrogen added with a high concentration of impurities dispersed in the layer 26 portion. A microcrystalline silicon semiconductor layer 27 is formed. They are covered with the back surface electrode 28, and the current on the back surface is taken out from the N type silicon semiconductor substrate 21 via the N + type microcrystalline silicon semiconductor layer 27 containing hydrogen and the back surface electrode 28.

【００４４】上記のような構造であって、本例によれ
ば、水素を有するＮ+ 型微結晶シリコン半導体層２７と
Ｎ型シリコン半導体基板２１との間には内部電界が存在
するため、Ｎ型シリコン半導体基板２１の裏面近傍で発
生したキャリアのうちの多数キャリア（電子）は裏面電
極２８へ効率よく導出される。また、Ｎ型シリコン半導
体基板２１の裏面に接して水素を有する真性非晶質シリ
コン半導体層２６を形成しているため、Ｎ型シリコン半
導体基板２１の裏面に発生する欠陥を、水素を有する真
性非晶質シリコン半導体層２６中の水素原子により不活
性化することができる。その結果、Ｎ型シリコン半導体
基板２１の裏面近傍で発生したキャリアの上記欠陥を介
した再結合を抑制できる。これらにより、高い光電変換
効率を有する太陽電池が実現できる。According to the present embodiment having the above structure, an internal electric field exists between the N + type microcrystalline silicon semiconductor layer 27 containing hydrogen and the N type silicon semiconductor substrate 21. Majority carriers (electrons) among the carriers generated near the back surface of the type silicon semiconductor substrate 21 are efficiently led to the back surface electrode 28. In addition, since the intrinsic amorphous silicon semiconductor layer 26 containing hydrogen is formed in contact with the back surface of the N-type silicon semiconductor substrate 21, defects generated on the back surface of the N-type silicon semiconductor substrate 21 are detected as intrinsic non-silicon containing hydrogen. It can be inactivated by hydrogen atoms in the crystalline silicon semiconductor layer 26. As a result, recombination of carriers generated near the back surface of the N-type silicon semiconductor substrate 21 via the above defects can be suppressed. With these, a solar cell having high photoelectric conversion efficiency can be realized.

【００４５】図６は図５の太陽電池の製造方法を示す製
造フロー図である。FIG. 6 is a manufacturing flow chart showing a method for manufacturing the solar cell of FIG.

【００４６】まず、単結晶のＮ型シリコン半導体基板２
１を洗浄した後、表面が凹凸になるように異方性エッチ
ングを行う。シリコン半導体基板２１は、単結晶のＮ型
シリコン半導体基板に限らず、多結晶のＮ型シリコン半
導体基板を用いることも可能である。この場合の表面の
凹凸形成は、レーザ光照射や機械的手段によって溝を掘
る事により行う。First, a single crystal N-type silicon semiconductor substrate 2
After cleaning No. 1, anisotropic etching is performed so that the surface becomes uneven. The silicon semiconductor substrate 21 is not limited to a single crystal N-type silicon semiconductor substrate, but a polycrystalline N-type silicon semiconductor substrate can also be used. In this case, the unevenness on the surface is formed by irradiating a laser beam or digging a groove by a mechanical means.

【００４７】次に、３臭化ボロン（ＢＢｒ3）を用いた
気相拡散によってボロンをＮ型シリコン基板２１の受光
面に拡散してＰ型シリコン半導体層２２を形成する。続
いて、熱酸化法により酸化シリコン（ＳｉＯ2 ）膜層２
３を形成し、窒化シリコン（Ｓｉ3 Ｎ4 ）膜からなる反
射防止膜層２４をプラズマＣＶＤ法により形成する。反
射防止膜２４としては酸化チタン（ＴｉＯ2 ）膜やアル
ミナ（Ａｌ2 Ｏ3 ）膜等も使用できる。Next, the P type silicon semiconductor layer 22 is formed by diffusing boron to the light receiving surface of the N type silicon substrate 21 by vapor phase diffusion using boron tribromide (BBr 3 ). Then, a silicon oxide (SiO 2 ) film layer 2 is formed by a thermal oxidation method.
3 is formed, and the antireflection film layer 24 made of a silicon nitride (Si 3 N 4 ) film is formed by the plasma CVD method. As the antireflection film 24, a titanium oxide (TiO 2 ) film, an alumina (Al 2 O 3 ) film, or the like can be used.

【００４８】続いて、Ｎ型シリコン半導体基板２１の裏
面をエッチングして、裏面に堆積したＰ型シリコン半導
体と酸化シリコン膜を除去する。Ｐ型シリコン半導体層
２２の形成をボロン添加されたシリコン酸化物ガラス液
のような塗布液を用いて受光面だけに拡散して行った場
合には裏面のＰ型シリコン半導体の除去は不要である。Then, the back surface of the N-type silicon semiconductor substrate 21 is etched to remove the P-type silicon semiconductor and the silicon oxide film deposited on the back surface. When the P-type silicon semiconductor layer 22 is formed by diffusing only the light receiving surface using a coating liquid such as a silicon oxide glass liquid added with boron, it is not necessary to remove the P-type silicon semiconductor on the back surface. .

【００４９】次に、プラズマＣＶＤ法により、水素を有
する真性非晶質シリコン半導体層２６を膜厚３００ｎｍ
でＮ型シリコン半導体基板２１の裏面上に形成する。上
記真性非晶質シリコン半導体層２６は、基板温度２００
℃，入力ＲＦパワー１０Ｗ（１３．５６ＭＨｚ），原料
ガスにシランガスを用いた条件で成膜した。成膜速度は
約１ｎｍ／ｓであった。この条件は一実施例であり、成
膜条件は上記条件に限られるものではない。例えば、原
料ガス種では、シランガスと水素ガスの混合ガスやジシ
ランガスを用いても良い。Next, an intrinsic amorphous silicon semiconductor layer 26 containing hydrogen is formed to a thickness of 300 nm by plasma CVD.
Is formed on the back surface of the N-type silicon semiconductor substrate 21. The intrinsic amorphous silicon semiconductor layer 26 has a substrate temperature of 200
The film was formed under the conditions of ℃, input RF power of 10 W (13.56 MHz), and silane gas as a source gas. The film formation rate was about 1 nm / s. This condition is one example, and the film forming condition is not limited to the above condition. For example, as the source gas species, a mixed gas of silane gas and hydrogen gas or disilane gas may be used.

【００５０】次に、３塩化リン（ＰＣｌ3）ガス中で、
ＡｒＦエキシマレーザ光を水素を有する真性非晶質シリ
コン半導体層２６の一部に４００ｍＪ／ｃｍ2の照射量
で照射し、その部分を微結晶化すると同時にリンを添加
する（水素を有するＮ+ 型微結晶シリコン半導体層２７
となる）。微結晶化する方法及び不純物添加する方法は
上記条件に限らず、ホスフィン（ＰＨ3），トリメチル
ホスフィン（（ＣＨ3）3Ｐ）のガス中、あるいは、それ
らのガスと水素ガスとの混合ガス中で、レーザ光を照射
しても良い。また、レーザ光も、ＫｒＦエキシマレーザ
光，ＸｅＣｌエキシマレーザ光等でも良い。照射レーザ
光量も４００ｍＪ／ｃｍ2 に限られるものではない。Next, in phosphorus trichloride (PCl 3 ) gas,
A part of the intrinsic amorphous silicon semiconductor layer 26 containing hydrogen is irradiated with ArF excimer laser light at a dose of 400 mJ / cm 2 , and the part is microcrystallized and phosphorus is added at the same time (N + type containing hydrogen). Microcrystalline silicon semiconductor layer 27
Will be). The method of microcrystallizing and the method of adding impurities are not limited to the above conditions, and may be in a gas of phosphine (PH 3 ) or trimethylphosphine ((CH 3 ) 3 P) or in a mixed gas of those gases and hydrogen gas. Then, the laser light may be irradiated. Also, the laser light may be KrF excimer laser light, XeCl excimer laser light, or the like. The irradiation laser light amount is not limited to 400 mJ / cm 2 .

【００５１】また、レーザ光を照射する雰囲気に水素ガ
スを加えておけば、水素を有する真性非晶質シリコン半
導体層２６を微結晶化する際に放出される水素の補充を
することができる。従って、水素を有する真性非晶質シ
リコン半導体層２６及び水素を有するＮ+ 型微結晶シリ
コン半導体層２７中の水素抜けに起因する欠陥を抑制す
ることができる。If hydrogen gas is added to the atmosphere for irradiating the laser beam, hydrogen released when the intrinsic amorphous silicon semiconductor layer 26 containing hydrogen is microcrystallized can be replenished. Therefore, it is possible to suppress defects due to hydrogen escape in the intrinsic amorphous silicon semiconductor layer 26 containing hydrogen and the N + type microcrystalline silicon semiconductor layer 27 containing hydrogen.

【００５２】続いて、裏面電極２８を、水素を有する真
性の非晶質シリコン半導体層２６と水素を有すＮ+ 型微
結晶シリコン半導体層２７を覆って、真空蒸着法でアル
ミニウムや銀などの金属を蒸着することにより形成す
る。次に、フォトエッチング法を用いて受光面側の酸化
シリコン膜層２３及び反射防止膜２４の加工を行った
後、チタン，パラジウム，銀の順で金属の蒸着を行う。
そして最後に、リフトオフを行うことで、グリッド電極
２５を形成する。Subsequently, the back surface electrode 28 is covered with the intrinsic amorphous silicon semiconductor layer 26 containing hydrogen and the N + type microcrystalline silicon semiconductor layer 27 containing hydrogen, and a back electrode 28 made of aluminum, silver or the like is formed by a vacuum deposition method. It is formed by depositing a metal. Next, the silicon oxide film layer 23 and the antireflection film 24 on the light-receiving surface side are processed by using a photoetching method, and then metal is deposited in the order of titanium, palladium, and silver.
Finally, lift-off is performed to form the grid electrode 25.

【００５３】以上の工程では、Ｎ型シリコン半導体基板
２１の裏面をパッシベートする水素を有する真性非晶質
シリコン半導体層２６及び内部電界を形成する水素を有
する微結晶シリコン半導体層２７の作製を３００℃以下
の低温で行うことができる。従って、高温処理を繰り返
すことによって起こる受光面のＰＮ接合の特性変化や基
板特性の劣化を抑制することができる。また、Ｎ型シリ
コン基板２１の裏面側での処理工程には、フォトエッチ
ング等の複雑な処理工程や、水素を有する微結晶シリコ
ン半導体層のプラズマＣＶＤ法による形成のような長時
間かかる工程がないため、処理を容易に短時間で行うこ
とができる。In the above steps, the intrinsic amorphous silicon semiconductor layer 26 containing hydrogen that passivates the back surface of the N-type silicon semiconductor substrate 21 and the microcrystalline silicon semiconductor layer 27 containing hydrogen that forms an internal electric field are manufactured at 300 ° C. It can be performed at the following low temperatures. Therefore, it is possible to suppress the characteristic change of the PN junction of the light receiving surface and the deterioration of the substrate characteristic which are caused by repeating the high temperature treatment. In addition, the processing step on the back surface side of the N-type silicon substrate 21 does not have a complicated processing step such as photoetching or a step that takes a long time such as formation of a microcrystalline silicon semiconductor layer containing hydrogen by a plasma CVD method. Therefore, the processing can be easily performed in a short time.

【００５４】（第４の実施例）図７は、第４の実施例の
太陽電池を示す断面図である。図５と同一の部分は同一
符号を用いて表し、説明を省略する。Ｎ型シリコン半導
体基板２１の裏面上には、水素を有するＮ型非晶質シリ
コン半導体層２９が形成され、更に、Ｎ型シリコン半導
体基板２１に接し、上記水素を有するＮ型非晶質シリコ
ン半導体層２９部に分散して、水素を有するＮ+ 型微結
晶シリコン半導体層２７が形成されている。この構成の
場合も、水素を有するＮ型非晶質シリコン半導体層２９
が、上記実施例３と同様に、Ｎ型シリコン半導体基板２
１の裏面に発生する欠陥を水素原子により不活性化する
ことができ、Ｎ型シリコン半導体基板２１の裏面近傍で
発生したキャリアの上記欠陥を介した再結合を抑制でき
る。また、裏面パッシベーション層として、特に、水素
を有するＮ型非晶質シリコン半導体層２９を用いると、
その層２９自身に導電性があるため、この層２９を通し
て多数キャリアの一部を裏面電極２８へと導くことがで
き、更に高い光電変換効率を有する太陽電池が実現でき
る。(Fourth Embodiment) FIG. 7 is a sectional view showing a solar cell according to a fourth embodiment. The same parts as those in FIG. 5 are represented by the same reference numerals and the description thereof will be omitted. An N-type amorphous silicon semiconductor layer 29 having hydrogen is formed on the back surface of the N-type silicon semiconductor substrate 21, and is further in contact with the N-type silicon semiconductor substrate 21 and has the hydrogen. An N + -type microcrystalline silicon semiconductor layer 27 having hydrogen dispersed in the layer 29 is formed. Also in this configuration, the N-type amorphous silicon semiconductor layer 29 containing hydrogen
However, similar to the third embodiment, the N-type silicon semiconductor substrate 2
The defects generated on the back surface of No. 1 can be inactivated by hydrogen atoms, and the recombination of carriers generated near the back surface of the N-type silicon semiconductor substrate 21 via the above defects can be suppressed. Further, when the N-type amorphous silicon semiconductor layer 29 containing hydrogen is used as the back surface passivation layer,
Since the layer 29 itself has conductivity, a part of majority carriers can be guided to the back electrode 28 through this layer 29, and a solar cell having higher photoelectric conversion efficiency can be realized.

【００５５】次に、図８は図７の太陽電池の製造方法を
示す製造フロー図である。尚、水素を有するＮ型非晶質
シリコン半導体層２９及び水素を有するＮ+ 型微結晶シ
リコン半導体層２７の作製工程以外、即ち、Ｐ型シリコ
ン半導体層２２，酸化シリコン膜層２３，反射防止膜層
２４，グリッド電極２５，裏面電極２８を作製する工程
は上記第３の実施例の太陽電池の製造工程と同様である
ため説明を省略する。Next, FIG. 8 is a manufacturing flow chart showing a method for manufacturing the solar cell of FIG. It should be noted that other than the steps of manufacturing the N-type amorphous silicon semiconductor layer 29 containing hydrogen and the N + -type microcrystalline silicon semiconductor layer 27 containing hydrogen, that is, the P-type silicon semiconductor layer 22, the silicon oxide film layer 23, the antireflection film. The steps of manufacturing the layer 24, the grid electrode 25, and the back surface electrode 28 are the same as the steps of manufacturing the solar cell of the third embodiment, and therefore description thereof is omitted.

【００５６】水素を有するＮ型非晶質シリコン半導体層
２９はプラズマＣＶＤ法により成膜した。成膜条件は基
板温度＝２００℃，入力ＲＦパワー＝１０Ｗ，原料ガス
＝Ｈ2希釈のＳｉＨ4とＰＨ3の混合ガス，ＰＨ3／ＳｉＨ
4＝０．００５，膜厚＝３００ｎｍである。この条件
は、一実施例であり、上記条件以外でも製膜可能であ
る。The N-type amorphous silicon semiconductor layer 29 containing hydrogen was formed by the plasma CVD method. The film forming conditions are: substrate temperature = 200 ° C., input RF power = 10 W, source gas = H 2 diluted SiH 4 and PH 3 mixed gas, PH 3 / SiH
4 = 0.005, film thickness = 300 nm. This condition is an example, and the film can be formed under other conditions.

【００５７】水素を有するＮ+ 型微結晶シリコン半導体
層２７は水素を有するＮ型非晶質シリコン半導体層２９
の一部分にレーザ光を照射することにより得られる。一
般に、水素を有するＮ型の非晶質シリコン半導体中のリ
ンの活性化率は低いが、それが微結晶化するとリンの活
性化率が高くなり、Ｎ+ 型となる。The N + type microcrystalline silicon semiconductor layer 27 containing hydrogen is the N type amorphous silicon semiconductor layer 29 containing hydrogen.
It is obtained by irradiating a part of the laser beam. Generally, the activation rate of phosphorus in an N-type amorphous silicon semiconductor containing hydrogen is low, but when it is microcrystallized, the activation rate of phosphorus becomes high and becomes N + -type.

【００５８】また、レーザ光照射する際の雰囲気に水素
ガスを含めると、水素を有するＮ型非晶質シリコン半導
体層２９を微結晶化させる際に層中より放出される水素
を補充することができる。従って、水素抜けに起因する
欠陥を抑制することができる。If hydrogen gas is included in the atmosphere during laser irradiation, hydrogen released from the layer can be replenished when the N-type amorphous silicon semiconductor layer 29 containing hydrogen is microcrystallized. it can. Therefore, it is possible to suppress defects caused by hydrogen desorption.

【００５９】更に、水素を有するＮ型非晶質シリコン半
導体層２９にレーザ光を照射して水素を有するＮ+ 型微
結晶シリコン半導体層２７とする際の雰囲気にホスフィ
ンガスやトリメチルホスフィンガス等のドーパントを含
めると、より高濃度の不純物を有する水素を有するＮ+
型微結晶シリコン半導体層２７が得られ、シリコン半導
体基板２１の裏面と水素を有するＮ+ 型微結晶シリコン
半導体層２７との間により大きな内部電界が生じる。Further, the N-type amorphous silicon semiconductor layer 29 containing hydrogen is irradiated with laser light to form the N + -type microcrystalline silicon semiconductor layer 27 containing hydrogen in an atmosphere such as phosphine gas or trimethylphosphine gas. Inclusion of dopants results in N + having higher concentrations of hydrogen with impurities.
The type microcrystalline silicon semiconductor layer 27 is obtained, and a large internal electric field is generated between the back surface of the silicon semiconductor substrate 21 and the N + type microcrystalline silicon semiconductor layer 27 containing hydrogen.

【００６０】以上の製造方法においても、上記第３の実
施例の場合と同様に、太陽電池の作製を容易にしかも短
時間で行うことができる。Also in the above manufacturing method, the solar cell can be manufactured easily and in a short time, as in the case of the third embodiment.

【００６１】[0061]

【発明の効果】以上のように、本発明の太陽電池によれ
ば、水素を有する非晶質シリコン半導体層を裏面パッシ
ベーション層として用いているため、光電変換効率の向
上を図ることができる。また、裏面パッシベーッション
層の形成に必要な基板温度を低下して、受光面のＰＮ特
性の変化や基板特性の変化を抑制できる。As described above, according to the solar cell of the present invention, since the amorphous silicon semiconductor layer containing hydrogen is used as the back surface passivation layer, the photoelectric conversion efficiency can be improved. Further, it is possible to reduce the substrate temperature required for forming the back surface passivation layer and suppress changes in the PN characteristics of the light receiving surface and changes in the substrate characteristics.

【００６２】また、本発明の太陽電池の製造方法によれ
ば、、水素を含む真性あるいは第１導電型の非晶質シリ
コン半導体層の一部に、レーザ光照射を行うことによ
り、水素を含む第１導電型の微結晶シリコン半導体層を
得ており、微結晶シリコン半導体層を堆積する工程や、
フォトエッチング等の複雑な工程を含まないため、処理
を容易にしかも短時間（通常数分）で行うことができ
る。Further, according to the method for manufacturing a solar cell of the present invention, a portion of the intrinsic or first conductivity type amorphous silicon semiconductor layer containing hydrogen is irradiated with laser light to contain hydrogen. Obtaining a microcrystalline silicon semiconductor layer of the first conductivity type, depositing the microcrystalline silicon semiconductor layer,
Since complicated steps such as photoetching are not included, the processing can be performed easily and in a short time (usually several minutes).

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明の第１の実施例の太陽電池の構造を示す
断面図である。FIG. 1 is a sectional view showing a structure of a solar cell according to a first embodiment of the present invention.

【図２】図１の太陽電池の製造方法を示す製造フロー図
である。FIG. 2 is a manufacturing flow chart showing a method for manufacturing the solar cell of FIG.

【図３】本発明の第２の実施例の太陽電池の構造を示す
断面図である。FIG. 3 is a sectional view showing a structure of a solar cell according to a second embodiment of the present invention.

【図４】図３の太陽電池の製造方法を示す製造フロー図
である。FIG. 4 is a manufacturing flow chart showing a method for manufacturing the solar cell of FIG.

【図５】本発明の第３の実施例の太陽電池の構造を示す
断面図である。FIG. 5 is a sectional view showing a structure of a solar cell according to a third embodiment of the present invention.

【図６】図５の太陽電池の製造方法を示す製造フロー図
である。6 is a manufacturing flow chart showing a method for manufacturing the solar cell of FIG.

【図７】本発明の第４の実施例の太陽電池の構造を示す
断面図である。FIG. 7 is a sectional view showing a structure of a solar cell according to a fourth embodiment of the present invention.

【図８】図７の太陽電池の製造方法を示す製造フロー図
である。8 is a manufacturing flow chart showing a method for manufacturing the solar cell of FIG. 7. FIG.

【図９】従来の太陽電池の構造を示す断面図である。FIG. 9 is a cross-sectional view showing the structure of a conventional solar cell.

【図１０】図９の太陽電池のエネルギバンド図である。FIG. 10 is an energy band diagram of the solar cell of FIG.

【符号の説明】[Explanation of symbols]

１１ Ｐ型シリコン半導体基板 １２ Ｎ型シリコン半導体層 １６ 水素を有する真性非晶質半導体層 １７ 水素を有するＰ+ 型微結晶シリコン半導体層 １９ 水素を有するＰ型非晶質半導体層 ２１ Ｎ型シリコン半導体基板 ２２ Ｐ型シリコン半導体層 ２６ 水素を有する真性非晶質シリコン半導体層 ２７ 水素を有するＮ+型微結晶シリコン半導体層 ２９ 水素を有するＮ型非晶質シリコン半導体層11 P-type silicon semiconductor substrate 12 N-type silicon semiconductor layer 16 Intrinsic amorphous semiconductor layer containing hydrogen 17 P + type microcrystalline silicon semiconductor layer containing hydrogen 19 P-type amorphous semiconductor layer containing hydrogen 21 N-type silicon semiconductor Substrate 22 P-type silicon semiconductor layer 26 Intrinsic amorphous silicon semiconductor layer containing hydrogen 27 N + type microcrystalline silicon semiconductor layer containing hydrogen 29 N-type amorphous silicon semiconductor layer containing hydrogen

───────────────────────────────────────────────────── フロントページの続き (72)発明者 西田 誠 大阪府大阪市阿倍野区長池町22番22号 シ ャープ株式会社内 (72)発明者 小松 雄爾 大阪府大阪市阿倍野区長池町22番22号 シ ャープ株式会社内 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Makoto Nishida 22-22 Nagaike-cho, Abeno-ku, Osaka-shi, Osaka Prefecture Sharp Corporation (72) Yuji Komatsu 22-22, Nagaike-cho, Abeno-ku, Osaka-shi, Osaka Inside the company

Claims (7)

【特許請求の範囲】[Claims] 【請求項１】第１導電型のシリコン半導体基板と、 該シリコン半導体基板の光入射側に形成した第２導電型
のシリコン半導体層とを有する太陽電池において、 前記シリコン半導体基板の裏面上に形成した水素を有す
る非晶質シリコン半導体層と、前記シリコン半導体基板
の裏面上にあって、前記水素を有する非晶質シリコン半
導体層部に分散させて形成した第１導電型の水素を有す
る微結晶シリコン半導体層と、を備えたことを特徴とす
る太陽電池。1. A solar cell comprising a first-conductivity-type silicon semiconductor substrate and a second-conductivity-type silicon semiconductor layer formed on the light-incident side of the silicon semiconductor substrate, wherein the solar cell is formed on the back surface of the silicon semiconductor substrate. Amorphous silicon semiconductor layer containing hydrogen and microcrystals containing hydrogen of the first conductivity type formed on the back surface of the silicon semiconductor substrate by being dispersed in the amorphous silicon semiconductor layer portion containing hydrogen. A solar cell, comprising: a silicon semiconductor layer. 【請求項２】請求項１に記載の太陽電池において、前記
水素を有する非晶質シリコン半導体層が前記シリコン半
導体基板と同一の導電型を有することを特徴とする太陽
電池。2. The solar cell according to claim 1, wherein the hydrogen-containing amorphous silicon semiconductor layer has the same conductivity type as the silicon semiconductor substrate. 【請求項３】少なくとも第１導電型のシリコン半導体基
板の光入射側に第２導電型のシリコン半導体層を形成す
る工程と、 前記シリコン半導体基板の裏面上の全面に水素を有する
非晶質シリコン半導体層を形成する工程と、 前記水素を有する非晶質シリコン半導体層の一部分にレ
ーザ光を照射することにより、前記部分の水素を有する
非晶質シリコン半導体層を第１導電型の水素を有する微
結晶シリコン半導体層に変化させる工程と、を含むこと
を特徴とする太陽電池の製造方法。3. A step of forming a second-conductivity-type silicon semiconductor layer on at least a light incident side of a first-conductivity-type silicon semiconductor substrate; and amorphous silicon having hydrogen on the entire back surface of the silicon semiconductor substrate. Forming a semiconductor layer; and irradiating a portion of the hydrogen-containing amorphous silicon semiconductor layer with laser light so that the hydrogen-containing amorphous silicon semiconductor layer has a first conductivity type hydrogen. And a step of changing to a microcrystalline silicon semiconductor layer. 【請求項４】請求項３に記載の太陽電池の製造方法にお
いて、レーザ光を照射する際の雰囲気に、水素を有する
非晶質シリコン半導体層を第１導電型の水素を有する微
結晶シリコン半導体層に変化させる第１導電型の不純物
を含ませてなることを特徴とする太陽電池の製造方法。4. The method of manufacturing a solar cell according to claim 3, wherein the amorphous silicon semiconductor layer containing hydrogen is a microcrystalline silicon semiconductor containing hydrogen of a first conductivity type in an atmosphere when the laser beam is irradiated. A method of manufacturing a solar cell, wherein the layer contains impurities of a first conductivity type to be changed. 【請求項５】請求項３に記載の太陽電池の製造方法にお
いて、前記シリコン半導体基板の裏面上の全面に第１導
電型の水素を有する非晶質シリコン半導体層を形成し、
該第１導電型の水素を有する非晶質シリコン半導体層の
一部分にレーザ光を照射することにより、前記部分の水
素を有する非晶質シリコン半導体層を第１導電型の水素
を有する微結晶シリコン半導体層に変化させてなること
を特徴とする太陽電池の製造方法。5. The method for manufacturing a solar cell according to claim 3, wherein an amorphous silicon semiconductor layer containing hydrogen of the first conductivity type is formed on the entire back surface of the silicon semiconductor substrate,
By irradiating a part of the amorphous silicon semiconductor layer containing hydrogen of the first conductivity type with laser light, the amorphous silicon semiconductor layer containing hydrogen in the part is microcrystalline silicon containing hydrogen of the first conductivity type. A method for manufacturing a solar cell, characterized by being formed into a semiconductor layer. 【請求項６】請求項３及び請求項５に記載の太陽電池の
製造方法において、レーザ光を照射する際の雰囲気に水
素を含ませてなることを特徴とする太陽電池の製造方
法。6. The method of manufacturing a solar cell according to claim 3 or 5, wherein hydrogen is included in an atmosphere when the laser light is irradiated. 【請求項７】請求項５に記載の太陽電池の製造方法にお
いて、レーザ光を照射する際の雰囲気に第１導電型の不
純物を含ませてなることを特徴とする太陽電池の製造方
法。7. The method for manufacturing a solar cell according to claim 5, wherein the atmosphere for irradiating the laser beam contains impurities of the first conductivity type.
JP21242594A 1994-09-06 1994-09-06 Solar cell and method of manufacturing the same Expired - Fee Related JP3346907B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21242594A JP3346907B2 (en) 1994-09-06 1994-09-06 Solar cell and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21242594A JP3346907B2 (en) 1994-09-06 1994-09-06 Solar cell and method of manufacturing the same

Publications (2)

Publication Number Publication Date
JPH0878710A true JPH0878710A (en) 1996-03-22
JP3346907B2 JP3346907B2 (en) 2002-11-18

Family

ID=16622385

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21242594A Expired - Fee Related JP3346907B2 (en) 1994-09-06 1994-09-06 Solar cell and method of manufacturing the same

Country Status (1)

Country Link
JP (1) JP3346907B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998043304A1 (en) * 1997-03-21 1998-10-01 Sanyo Electric Co., Ltd. Photovoltaic element and method for manufacture thereof
JP2006294802A (en) * 2005-04-08 2006-10-26 Toyota Motor Corp Photoelectric conversion element
JP2010505262A (en) * 2006-09-29 2010-02-18 リニューアブル・エナジー・コーポレーション・エーエスエー Back contact solar cell
CN102386247A (en) * 2010-09-03 2012-03-21 上海凯世通半导体有限公司 Solar wafer and preparation method thereof
JP2015142132A (en) * 2014-01-29 2015-08-03 エルジー エレクトロニクス インコーポレイティド Solar cell and manufacturing method therefor

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998043304A1 (en) * 1997-03-21 1998-10-01 Sanyo Electric Co., Ltd. Photovoltaic element and method for manufacture thereof
US6207890B1 (en) 1997-03-21 2001-03-27 Sanyo Electric Co., Ltd. Photovoltaic element and method for manufacture thereof
US6380479B2 (en) 1997-03-21 2002-04-30 Sanyo Electric Co., Ltd. Photovoltaic element and method for manufacture thereof
JP2006294802A (en) * 2005-04-08 2006-10-26 Toyota Motor Corp Photoelectric conversion element
JP2010505262A (en) * 2006-09-29 2010-02-18 リニューアブル・エナジー・コーポレーション・エーエスエー Back contact solar cell
CN102386247A (en) * 2010-09-03 2012-03-21 上海凯世通半导体有限公司 Solar wafer and preparation method thereof
JP2015142132A (en) * 2014-01-29 2015-08-03 エルジー エレクトロニクス インコーポレイティド Solar cell and manufacturing method therefor

Also Published As

Publication number Publication date
JP3346907B2 (en) 2002-11-18

Similar Documents

Publication Publication Date Title
US20200091366A1 (en) Solar cell having an emitter region with wide bandgap semiconductor material
US9099585B2 (en) Method of stabilizing hydrogenated amorphous silicon and amorphous hydrogenated silicon alloys
US20080241988A1 (en) Method for fabricating a silicon solar cell structure having a gallium doped p-silicon substrate
KR20080002657A (en) Photovoltaic device which includes all-back-contact configuration and related processes
WO2014099308A1 (en) Solar cell with silicon oxynitride dielectric layer
US20200098945A1 (en) Process for producing a photovoltaic solar cell having a heterojunction and a diffused-in emitter region
US11211519B2 (en) Method for manufacturing solar cell
CN116581181A (en) Double-doped layer TOPCON battery structure and preparation method thereof
JP3158027B2 (en) Solar cell and method of manufacturing the same
US8921686B2 (en) Back-contact photovoltaic cell comprising a thin lamina having a superstrate receiver element
JP3193287B2 (en) Solar cell
KR20100090015A (en) Solar cell and method for fabricating the same
JP3346907B2 (en) Solar cell and method of manufacturing the same
JP2003152205A (en) Photoelectric conversion element and its manufacturing method
Desrues et al. Ultra-thin poly-Si/SiOx passivating contacts integration for high efficiency solar cells on n-type cast mono silicon wafers
JP5645734B2 (en) Solar cell element
JPH0823114A (en) Solar cell
KR101321538B1 (en) Bulk silicon solar cell and method for producing same
US5242504A (en) Photovoltaic device and manufacturing method therefor
JP3158028B2 (en) Solar cell and method of manufacturing the same
CN117374169B (en) Preparation method of back contact solar cell and back contact solar cell
KR101129422B1 (en) Fabrication method of solar cell and solar cell fabrication by the same
JPS63274184A (en) Photoelectric transducer and manufacture thereof
JP2021044384A (en) Solar cell
TW202404111A (en) Back-contact solar cell comprising passivated contacts, and manufacturing method

Legal Events

Date Code Title Description
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080906

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080906

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090906

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090906

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100906

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110906

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120906

Year of fee payment: 10

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130906

Year of fee payment: 11

LAPS Cancellation because of no payment of annual fees