JPS6251824U - - Google Patents
Info
- Publication number
- JPS6251824U JPS6251824U JP14302485U JP14302485U JPS6251824U JP S6251824 U JPS6251824 U JP S6251824U JP 14302485 U JP14302485 U JP 14302485U JP 14302485 U JP14302485 U JP 14302485U JP S6251824 U JPS6251824 U JP S6251824U
- Authority
- JP
- Japan
- Prior art keywords
- transistors
- collectors
- transistor
- resistors
- emitter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000010355 oscillation Effects 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Television Signal Processing For Recording (AREA)
Description
第１図は本考案の一実施例を示す回路図、第２
図は従来の発振回路を示す回路図、及び第３図は
第２図の点Ａ、点Ｂの発振出力を表わす波形図で
ある。
主な図番の説明、１６…マルチバイブレータ、
１８…電流源回路、２０…給電回路。
Figure 1 is a circuit diagram showing one embodiment of the present invention, Figure 2 is a circuit diagram showing an embodiment of the present invention.
The figure is a circuit diagram showing a conventional oscillation circuit, and FIG. 3 is a waveform diagram showing the oscillation outputs at points A and B in FIG. Explanation of main drawing numbers, 16 ...Multi-vibrator,
18 ...Current source circuit, 20 ...Power supply circuit.
Claims (1)
を備えるマルチバイブレータと、前記第１及び第
２トランジスタのコレクタ間に直列接続された第
１及び第２抵抗と、前記第１及び第２トランジス
タのコレクタにそれぞれエミツタが接続された第
３及び第４トランジスタと、前記第１及び第２抵
抗の接続点にエミツタが接続された第５トランジ
スタとから成る発振回路において、前記第３及び
第４トランジスタのコレクタを前記第５トランジ
スタのエミツタに接続したことを特徴とする発振
回路。 a multivibrator including first and second transistors that are turned on and off alternately; first and second resistors connected in series between the collectors of the first and second transistors; and the collectors of the first and second transistors, respectively. In an oscillation circuit comprising third and fourth transistors having emitters connected to each other, and a fifth transistor having an emitter connected to a connection point between the first and second resistors, the collectors of the third and fourth transistors are connected to the An oscillation circuit characterized in that it is connected to the emitter of a fifth transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14302485U JPH0349475Y2 (en) | 1985-09-19 | 1985-09-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14302485U JPH0349475Y2 (en) | 1985-09-19 | 1985-09-19 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6251824U true JPS6251824U (en) | 1987-03-31 |
| JPH0349475Y2 JPH0349475Y2 (en) | 1991-10-22 |
Family
ID=31052316
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14302485U Expired JPH0349475Y2 (en) | 1985-09-19 | 1985-09-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0349475Y2 (en) |
-
1985
- 1985-09-19 JP JP14302485U patent/JPH0349475Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0349475Y2 (en) | 1991-10-22 |