JPS6251077B2 - - Google Patents
Info
- Publication number
- JPS6251077B2 JPS6251077B2 JP55081810A JP8181080A JPS6251077B2 JP S6251077 B2 JPS6251077 B2 JP S6251077B2 JP 55081810 A JP55081810 A JP 55081810A JP 8181080 A JP8181080 A JP 8181080A JP S6251077 B2 JPS6251077 B2 JP S6251077B2
- Authority
- JP
- Japan
- Prior art keywords
- current
- input
- circuit
- signal
- polarity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000003321 amplification Effects 0.000 claims description 33
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 33
- 239000000284 extract Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- 238000009825 accumulation Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Rectifiers (AREA)
Description
【発明の詳細な説明】
この発明は取扱う信号が広帯域（DC〜100K
Hz）でその振幅も広レンジ（ほぼ３桁）である信
号を全波整流する全波整流回路に関するものであ
る。[Detailed Description of the Invention] This invention handles signals over a wide band (DC to 100K).
This relates to a full-wave rectifier circuit that performs full-wave rectification of signals whose amplitudes are within a wide range (approximately 3 digits).
従来この種の回路として第１図に示すものがあ
つた。図において、INは入力端子、OUTは出力
端子、１は半波整流回路、２は半波整流回路１の
出力端子ｍ，ｎの２つの信号を差動増巾する差動
増巾回路であり、本全波整流回路はこの半波整流
回路１と差動増巾回路２とから構成されている。
半波整流回路１のうち、１１は直線増巾素子、１
２は直線増巾素子１１の反転入力に接続された入
力抵抗、１３及び１５は入力信号の正負電流が
各々個別に流れる帰還抵抗、１４は整流動作を行
なうための切換え素子で、正負成分に対応する２
つのダイオード１４ａ，１４ｂからなる。また差
動増巾回路２のうち、２１は直線増巾素子、２
３，２４は端子ｍ，ｎの２つの信号を直線増巾素
子２１の２つの入力に加える入力抵抗、２２，２
５は直線増巾素子２１の２つの帰還抵抗である。 A conventional circuit of this type is shown in FIG. In the figure, IN is an input terminal, OUT is an output terminal, 1 is a half-wave rectifier circuit, and 2 is a differential amplification circuit that differentially amplifies the two signals at the output terminals m and n of the half-wave rectifier circuit 1. The present full-wave rectifier circuit is composed of this half-wave rectifier circuit 1 and a differential amplification circuit 2.
In the half-wave rectifier circuit 1, 11 is a linear amplification element;
2 is an input resistor connected to the inverting input of the linear amplification element 11; 13 and 15 are feedback resistors through which the positive and negative currents of the input signal flow individually; 14 is a switching element for rectification, corresponding to the positive and negative components. do 2
It consists of two diodes 14a and 14b. Further, in the differential amplification circuit 2, 21 is a linear amplification element;
3 and 24 are input resistors that apply the two signals of terminals m and n to the two inputs of the linear amplification element 21;
5 are two feedback resistors of the linear amplification element 21.
次に動作について説明する。交流信号が加わる
入力端子INと、入力交流信号のうち正の成分だ
けを取り出す出力端子ｍと負の成分だけを取り出
すもう１つの出力端子ｎとを有する半波整流回路
１は、一般に使用される反転増巾型の半波整流回
路である。この場合直線増巾素子１１の反転入力
に入力抵抗１２を通じて供給された信号電流は、
この電流の極性に依つて直線増巾素子１１の出力
電圧の極性を決め、次いで切換素子１４を構成す
る２つのダイオード１４ａ，１４ｂの一方を順方
向バイアスに、他方を逆方向バイアスにするの
で、該信号電流は２つの抵抗素子を用いた帰還抵
抗１３，１５のうちいずれか一方に流れる。たと
えば入力信号が正電圧ならば反転入力には正電流
が加わり、ダイオード１４ａが順方向バイアスと
なり、帰還抵抗１３に信号電流が通じる。この結
果、出力端子ｍに負の電圧信号のみ現われる。同
様にして端子ｎには正の電圧のみ現われるから次
の差動増巾回路２にこれらの信号を伝え、差動増
巾すると、出力端子OUTには入力交流信号を全
波整流した波形が得られる。 Next, the operation will be explained. A half-wave rectifier circuit 1 having an input terminal IN to which an alternating current signal is applied, an output terminal m for extracting only the positive component of the input alternating current signal, and another output terminal n for extracting only the negative component is generally used. This is an inverting amplification type half-wave rectifier circuit. In this case, the signal current supplied to the inverting input of the linear amplifier 11 through the input resistor 12 is
The polarity of the output voltage of the linear amplification element 11 is determined depending on the polarity of this current, and then one of the two diodes 14a and 14b constituting the switching element 14 is made forward biased and the other is made reverse biased. The signal current flows through one of feedback resistors 13 and 15 using two resistance elements. For example, if the input signal is a positive voltage, a positive current is applied to the inverting input, the diode 14a becomes forward biased, and the signal current passes through the feedback resistor 13. As a result, only a negative voltage signal appears at the output terminal m. Similarly, since only positive voltage appears at terminal n, these signals are transmitted to the next differential amplifier circuit 2 and differentially amplified, resulting in a waveform obtained by full-wave rectification of the input AC signal at output terminal OUT. It will be done.
従来の全波整流回路は以上のように構成されて
いるが、切換素子に２個のダイオードを用いてい
るので、一方が逆バイアスされた状態から順バイ
アスの状態、つまり回路上導通状態に遷移する際
に、ダイオード素子固有の電荷蓄積による遅れを
伴ない、高速信号に歪を与えることとなつた。
又、直線増巾素子の出力自身には一方のダイオー
ドから他方のダイオードへの切換レベルにバツク
ラツシユが認められ、動作上の遅れが生じた。こ
れは直線増巾素子のスルーレートの高い特性を有
する素子を用いた場合にも生じ、高速化に限界が
あつた。又、これらは小信号値に歪を与えるか
ら、直線性を確保しようとすると信号動作範囲を
広く取れないこととなつた。さらに同じく直線増
巾素子の入力側ドリフト特性やダイオードの温度
特性等も補償できないならば、著しくこれらの特
性を悪化させる欠点があつた。 Conventional full-wave rectifier circuits are configured as described above, but because two diodes are used as switching elements, one transitions from a reverse-biased state to a forward-biased state, that is, a conductive state on the circuit. When doing so, there was a delay due to the charge accumulation inherent in the diode element, which caused distortion to the high-speed signal.
Further, in the output of the linear amplifier element itself, a backlash was observed in the switching level from one diode to the other, causing a delay in operation. This also occurs when a linear amplifier element having a high slew rate characteristic is used, and there is a limit to speeding up the process. Furthermore, since these give distortion to small signal values, it has become impossible to widen the signal operating range if linearity is to be ensured. Furthermore, if the input side drift characteristics of the linear amplifier element and the temperature characteristics of the diode could not be compensated for, there would be a drawback that these characteristics would be significantly deteriorated.
この発明は上記のような従来のものの欠点を除
去するためになされたもので、整流動作を行なう
場合に必要な切換え手段をトランジスタを用いた
相補対形（プツシユプル形）とし、電流出力とし
て取り出せるようにすることにより、増巾段の帰
還部分に動作遅れ要素がなくなり、高速動作が可
能となる全波整流回路を提供することを目的とし
ている。 This invention was made in order to eliminate the drawbacks of the conventional ones as described above, and the switching means necessary for rectifying operation is a complementary pair type (push-pull type) using transistors, so that it can be taken out as a current output. The object of the present invention is to provide a full-wave rectifier circuit that eliminates operation delay elements in the feedback section of the amplification stage and enables high-speed operation.
以下、この発明の一実施例を図について説明す
る。第２図において１及び２は半波整流回路と電
流差動増巾回路であり、半波整流回路１におい
て、１１は直線増巾素子、１２は直線増巾素子１
１の反転入力点に接続された入力信号を受け入れ
る入力抵抗、１４は第１図の従来例とは異なるプ
ツシユプル形極性切換回路で、そのうち１４ａ，
１４ｂは各々第１導電型トランジスタとそのエミ
ツタに接続されるエミツタ抵抗及び第２導電型ト
ランジスタとそのエミツタ抵抗とでそれぞれ構成
される負極性および正極性電流切換素子、１４ｃ
は電流切換素子１４ａ，１４ｂのトランジスタの
ベース端子に所定のバイアス電圧を与えるバイア
ス電源である。次いで電流差動増巾回路２のう
ち、２７，２６は半波整流回路１の電流切換素子
１４ａ，１４ｂの各トランジスタのコレクタから
得られる正、負成分信号電流を入力し加算する正
極性および負極性電流ミラー回路、２１，２２は
各々直線増巾素子と帰還抵抗で、両者で正極性電
流ミラー回路２７のトランジスタ２７ａのコレク
タからの整流電流Isを電流増巾する電流増巾回路
を構成している。 An embodiment of the present invention will be described below with reference to the drawings. In FIG. 2, 1 and 2 are a half-wave rectifier circuit and a current differential amplification circuit, and in the half-wave rectifier circuit 1, 11 is a linear amplification element, and 12 is a linear amplification element 1.
1 is a push-pull type polarity switching circuit different from the conventional example shown in FIG. 1;
14b is a negative polarity current switching element and a positive polarity current switching element 14c, each comprising a first conductivity type transistor and an emitter resistor connected to its emitter, and a second conductivity type transistor and its emitter resistor;
is a bias power supply that applies a predetermined bias voltage to the base terminals of the transistors of the current switching elements 14a and 14b. Next, in the current differential amplification circuit 2, 27 and 26 are positive polarity and negative polarity terminals that input and add the positive and negative component signal currents obtained from the collectors of the respective transistors of the current switching elements 14a and 14b of the half-wave rectifier circuit 1. The positive current mirror circuits 21 and 22 are a linear amplification element and a feedback resistor, respectively, and together they constitute a current amplification circuit that amplifies the rectified current Is from the collector of the transistor 27a of the positive current mirror circuit 27. There is.
次に動作について説明する。 Next, the operation will be explained.
入力端子INに交流信号電圧を入力信号として
加えた場合、全波整流動作の前段階として、半波
整流する必要がある。半波整流回路１は交流信号
の正成分と負成分を各々別々に出力端子ｍ，ｎに
取り出す。半波整流回路１は通常使用されている
反転増巾回路の変形と考えられ、入力抵抗１２は
信号電圧を電流に変換して直線増巾素子１１によ
つて直線増巾する。PNP及びNPNトランジスタ
２素子と各々に付加したエミツタ抵抗とで構成し
たプツシユプル形極性切換回路１４はその入力側
ベース端子に直流電源１４ｃを用いて直流バイア
ス電圧が与えられる。この電圧値は後述する理由
によつて所定の値2EBに設定する。当然この設定
値から電流切換素子１４ａと電流切換素子１４ｂ
に通常流れるアイドル電流I0も決定される。この
極性切換回路１４の通常の出力点である両エミツ
タ抵抗の共通接続点Ｐは直線増巾素子１１の反転
入力点に帰還されて直線増巾素子１１を中心とし
て安定条件が満たされる。ところが、この極性切
換回路１４は本発明の目的上、信号電流のスイツ
チングを行ない変流させる切換回路であり、整流
作用上の半波整流出力端子は各電流切換素子１４
ａ，１４ｂのトランジスタのコレクタに相当す
る。したがつて、抵抗１２からの入力電流は、本
発明の極性切換回路１４によつてトランジスタの
エミツタ電流となる。この電流は、直流増巾率ｈ
FEの高い素子をこれらに使用すれば、電流伝達率
の高い値が得られるから、コレクタ電流を出力電
流に替えることができる。 When an AC signal voltage is applied to the input terminal IN as an input signal, half-wave rectification is required before full-wave rectification. The half-wave rectifier circuit 1 takes out the positive and negative components of the AC signal separately to output terminals m and n, respectively. The half-wave rectifier circuit 1 can be considered as a modification of the commonly used inverting amplification circuit, and the input resistor 12 converts the signal voltage into a current, which is linearly amplified by the linear amplification element 11. A push-pull type polarity switching circuit 14, which is composed of two PNP and NPN transistor elements and an emitter resistor added to each element, has a DC bias voltage applied to its input base terminal using a DC power supply 14c. This voltage value is set to a predetermined value 2E B for reasons described later. Naturally, from this set value, the current switching element 14a and the current switching element 14b
The idle current I 0 that normally flows is also determined. A common connection point P between both emitter resistors, which is a normal output point of the polarity switching circuit 14, is fed back to the inverting input point of the linear amplification element 11, so that stability conditions are satisfied around the linear amplification element 11. However, for the purpose of the present invention, this polarity switching circuit 14 is a switching circuit that switches and transforms the signal current, and the half-wave rectification output terminal for the rectification function is connected to each current switching element 14.
This corresponds to the collectors of transistors a and 14b. Therefore, the input current from the resistor 12 becomes the emitter current of the transistor by the polarity switching circuit 14 of the present invention. This current has a DC amplification rate h
If elements with high FE are used for these, a high value of current transfer rate can be obtained, so collector current can be replaced with output current.
次に半波整流回路１の出力端子ｍ，ｎで得られ
る正又は負成分電流、つまり半波整流出力電流I1
及びI2は電流差動増巾回路２に加わり、全波整流
出力を得る。この場合、電流出力I1及びI2は互い
に逆方向電流であるから、出力電流I2はミラー回
路２６を通じて出力電流I1に合流し、ミラー回路
２７を通じて極性反転した後、直線増巾素子２１
と帰還抵抗２２からなる電流増巾回路により電流
増巾される。 Next, the positive or negative component current obtained at the output terminals m and n of the half-wave rectifier circuit 1, that is, the half-wave rectifier output current I 1
and I2 are added to the current differential amplification circuit 2 to obtain a full-wave rectified output. In this case, since the current outputs I 1 and I 2 are currents in opposite directions, the output current I 2 merges with the output current I 1 through the mirror circuit 26, reverses the polarity through the mirror circuit 27, and then passes through the linear amplification element 21.
The current is amplified by a current amplifying circuit consisting of a feedback resistor 22 and a feedback resistor 22.
今ある正弦波信号電圧10V0-P（０−Ｐは零か
らピークまでの値を意味する）を加えた場合を考
える。ここで入力抵抗１２を2KΩ、抵抗２２を
2KΩとすると、負の半波信号はI1＝５ｍＡの電
流値として出力端子ｍで得られ、同様に正の半波
信号もI2＝５ｍＡとして出力端子ｎで取り出せ
る。ミラー回路２６，２７の電流伝達効率も電流
増巾率の大きな値が得られるから、全波整流出力
電圧は10V0-Pとなる。 Consider the case where the current sine wave signal voltage of 10V 0-P (0-P means the value from zero to peak) is added. Here, input resistor 12 is 2KΩ, and resistor 22 is
Assuming 2KΩ, a negative half-wave signal can be obtained at output terminal m as a current value of I 1 =5 mA, and similarly a positive half-wave signal can be obtained at output terminal n with I 2 =5 mA. Since the current transmission efficiency of the mirror circuits 26 and 27 also provides a large current amplification factor, the full-wave rectified output voltage becomes 10V 0-P .
次に信号動作速度の上限について考えると、動
作上遅れが目立つのは、主に小入力信号時であ
る。そこで入力信号２ｍＶ0-Pの場合、トランジ
スタの順方向抵抗は25KΩとなり、接合容量及び
浮遊容量等による遅れから100KHzまでの正弦波
信号程度までは信号量の減衰は少ない。 Next, considering the upper limit of the signal operation speed, the delay in operation is noticeable mainly when the input signal is small. Therefore, in the case of an input signal of 2 mV 0 -P , the forward resistance of the transistor is 25 KΩ, and there is little attenuation of the signal amount up to a sine wave signal up to 100 KHz due to delays due to junction capacitance, stray capacitance, etc.
次に信号動作速度の下限は、電流モードを扱う
以上、コレクタ逆方向電流で決まるが、同じ小信
号レベルであつても信号周波数を高くすればダイ
ナミツクレンジの非直線性が現われてくる。特に
これは極性切換回路１４の切換動作速度と強い依
存関係があるので、動作速度を速くするには、ア
イドル電流量が多く必要になる反面、信号処理最
小レベルが上がつてくる。このことから、信号動
作速度と最小入力交流信号レベルを考慮してアイ
ドル電流I0を0.1μＡになるよう直流電源１４ｃ
の電源電圧を設定すると、入力信号が２ｍＶ0-P
でも整流波形歪が目立たなくなり、約70dBの動
作範囲を確保できる（第３図参照）。又、信号電
流のスイツチングの点を考えた場合、電流切換素
子１４ａ，１４ｂのトランジスタのベースエミツ
タ電圧ＶBEが非動作時で約0.3Vであり、コレク
タ電流が１桁変化するときのベースエミツタ電圧
の変化分は0.06Vなので、±0.3Vの振れ巾です
み、直線増巾素子１１の動作上、バツクラツシユ
が軽減できて、信号処理速度を上げることも手伝
つている。 Next, the lower limit of the signal operation speed is determined by the reverse collector current since current mode is handled, but even at the same small signal level, if the signal frequency is increased, nonlinearity of the dynamic range will appear. In particular, this has a strong dependency on the switching operation speed of the polarity switching circuit 14, so in order to increase the operation speed, a large amount of idle current is required, but at the same time, the minimum signal processing level increases. From this, considering the signal operating speed and minimum input AC signal level, the DC power supply 14c sets the idle current I0 to 0.1μA.
When the power supply voltage is set, the input signal is 2mV 0-P
However, rectified waveform distortion becomes less noticeable, and an operating range of approximately 70 dB can be secured (see Figure 3). Also, when considering the switching of the signal current, the base-emitter voltage V BE of the transistors of the current switching elements 14a and 14b is approximately 0.3V when not in operation, and the change in the base-emitter voltage when the collector current changes by one order of magnitude. Since the voltage is 0.06V, the swing width is only ±0.3V, which reduces the fluctuation in the operation of the linear amplifier 11 and helps increase the signal processing speed.
温度特性による整流波形歪の問題についても、
これに対して補償しなければならない。第２図中
電流切換素子１４ａ，１４ｂのトランジスタのベ
ースエミツタ電圧ＶBEの温度係数が2.0〜2.5ｍ
Ａ／℃であり、出力に影響する。それは第３図の
電流値2I0が周囲温度の変動に伴なつて変化する
から、小信号入力時で波形歪が現われると考えら
れる。 Regarding the problem of rectified waveform distortion due to temperature characteristics,
We must compensate for this. The temperature coefficient of the base-emitter voltage V BE of the transistors of the current switching elements 14a and 14b in Fig. 2 is 2.0 to 2.5 m.
It is A/℃ and affects the output. This is because the current value 2I 0 in FIG. 3 changes as the ambient temperature fluctuates, and it is thought that waveform distortion appears when a small signal is input.
したがつて本発明でもこれら温度特性を補償す
べく、第４図に本発明の温度補償回路の一実施例
を示した。図中１４１，１４２は電流切換素子１
４ａ，１４ｂのトランジスタのベースエミツタ電
圧ＶBEの温度変化を補償するために設けた該トラ
ンジスタと同じ温度係数を有するダイオード又は
トランジスタ・ダイオードである。１４３，１４
４はこの補償素子に対してバイアス電流を供給す
るための抵抗であり、２ｍＡ〜５ｍＡの電流値を
与えてある。これは、出力段形式上、切換素子へ
の駆動能力も備える必要があるからである。ここ
でバイアス電流の違いによる温度係数の差が認め
られ、補償誤差が残るが、本発明の目的上十分と
考えられる。なお１４５は抵抗、１４６はコンデ
ンサである。 Therefore, in order to compensate for these temperature characteristics in the present invention, an embodiment of the temperature compensation circuit of the present invention is shown in FIG. In the figure, 141 and 142 are current switching elements 1
A diode or a transistor-diode having the same temperature coefficient as the transistors 4a and 14b is provided to compensate for temperature changes in the base-emitter voltage V BE of the transistors 4a and 14b. 143,14
4 is a resistor for supplying a bias current to this compensation element, and is given a current value of 2 mA to 5 mA. This is because, due to the format of the output stage, it is necessary to also provide a driving capability for the switching element. Here, a difference in temperature coefficient due to a difference in bias current is observed, and a compensation error remains, but this is considered to be sufficient for the purpose of the present invention. Note that 145 is a resistor and 146 is a capacitor.
以上のように、この発明によれば、半波整流回
路の切換方法として従来のダイオードを用いた電
圧切換方式に代えて、トランジスタを用いた変形
プツシユプル形を採用し、コレクタ端子から整流
出力電流を得るように構成したので、簡単な構成
で、高速で広範囲な整流ができる効果がある。 As described above, according to the present invention, instead of the conventional voltage switching method using diodes as a switching method of a half-wave rectifier circuit, a modified push-pull type using a transistor is adopted, and the rectified output current is transferred from the collector terminal. Since the structure is configured so as to obtain the following effects, it is possible to perform high-speed and wide-range rectification with a simple structure.
第１図は従来の全波整流回路の回路図、第２図
はこの発明の一実施例による全波整流回路の回路
図、第３図は第２図の回路の入力信号電圧対出力
整流電流特性図、第４図は第２図のバイアス電源
の温度補償回路の回路図である。
１……半波整流回路、２……電流差動増巾回
路、１１……直線増巾素子、１４……プツシユプ
ル形極性切換回路、２１……直線増巾素子、１４
ａ……負極性電流切換素子、１４ｂ……正極性電
流切換素子、１４ｃ……直流バイアス電源、２６
……負極性電流ミラー回路、２７……正極性電流
ミラー回路なお図中、同一符号は同一又は相当部
分を示す。
Fig. 1 is a circuit diagram of a conventional full-wave rectifier circuit, Fig. 2 is a circuit diagram of a full-wave rectifier circuit according to an embodiment of the present invention, and Fig. 3 is an input signal voltage vs. output rectified current of the circuit of Fig. 2. The characteristic diagram, FIG. 4, is a circuit diagram of the temperature compensation circuit of the bias power supply shown in FIG. DESCRIPTION OF SYMBOLS 1... Half-wave rectifier circuit, 2... Current differential amplification circuit, 11... Linear amplification element, 14... Push-pull type polarity switching circuit, 21... Linear amplification element, 14
a... Negative polarity current switching element, 14b... Positive polarity current switching element, 14c... DC bias power supply, 26
. . . Negative polarity current mirror circuit, 27 . . . Positive polarity current mirror circuit. In the drawings, the same reference numerals indicate the same or corresponding parts.
Claims (1)
出力負電流とを別々に取り出す半波整流回路と、
この半波整流回路の出力正電流と出力負電流とが
各々独立に入力され該入力正電流および入力負電
流のうちの一方を極性反転させて該両電流を加算
し出力全波整流電圧を得る電流差動増巾回路とか
らなる全波整流回路において、 上記半波整流回路が、入力信号を反転増巾する
直線増巾素子と、 該直線増巾素子の出力をベース入力とする導電
型の異なる２つのトランジスタとそのエミツタ抵
抗とからなる電流切換素子及び上記２つのトラン
ジスタのエミツタに共通に流れるアイドル電流値
が所望の信号動作速度と最小入力交流信号振幅と
により決定される値になるよう上記トランジスタ
のベースにバイアス電圧を印加する直流バイアス
電源で構成され上記エミツタ抵抗の共通接続点が
上記直線増巾素子の反転入力に直接帰還せられ、
上記直線増巾素子の入力信号電流の極性に対応し
た半波整流電流を上記２つのトランジスタの各コ
レクタ端子から出力するプツシユプル形極性切換
回路とからなるものであることを特徴とする全波
整流回路。 ２ 上記電流差動増巾回路が、２つの入力電流を
取り込みそのうちの一方の入力電流の極性を反転
させて他方の入力電流と加算するためのトランジ
スタ各２素子による２つの電流ミラー回路を備え
たものであることを特徴とする特許請求の範囲第
１項記載の全波整流回路。[Claims] 1. A half-wave rectifier circuit that half-wave rectifies an input AC signal voltage and separately extracts an output positive current and an output negative current;
The output positive current and the output negative current of this half-wave rectifier circuit are inputted independently, the polarity of one of the input positive current and the input negative current is reversed, and the two currents are added to obtain the output full-wave rectified voltage. In a full-wave rectifier circuit consisting of a current differential amplification circuit, the half-wave rectification circuit comprises a linear amplification element that inverts and amplifies an input signal, and a conductivity type whose base input is the output of the linear amplification element. A current switching element consisting of two different transistors and their emitter resistances, and an idle current value that commonly flows through the emitters of the two transistors are set to values determined by the desired signal operating speed and the minimum input AC signal amplitude. It consists of a DC bias power supply that applies a bias voltage to the base of the transistor, and the common connection point of the emitter resistors is directly fed back to the inverting input of the linear amplification element,
A full-wave rectifier circuit comprising a push-pull polarity switching circuit that outputs a half-wave rectified current corresponding to the polarity of the input signal current of the linear amplifying element from each collector terminal of the two transistors. . 2 The current differential amplification circuit includes two current mirror circuits each having two transistor elements for taking in two input currents, inverting the polarity of one of the input currents, and adding the polarity to the other input current. 2. A full-wave rectifier circuit according to claim 1, characterized in that:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8181080A JPS579266A (en) | 1980-06-16 | 1980-06-16 | Full-wave rectifying circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8181080A JPS579266A (en) | 1980-06-16 | 1980-06-16 | Full-wave rectifying circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS579266A JPS579266A (en) | 1982-01-18 |
| JPS6251077B2 true JPS6251077B2 (en) | 1987-10-28 |
Family
ID=13756842
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8181080A Granted JPS579266A (en) | 1980-06-16 | 1980-06-16 | Full-wave rectifying circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS579266A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02234878A (en) * | 1989-03-06 | 1990-09-18 | Mazda Motor Corp | Support structure of tilt steering |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58224569A (en) * | 1982-06-23 | 1983-12-26 | Rohm Co Ltd | Rectifying circuit |
| JPH0763126B2 (en) * | 1986-01-30 | 1995-07-05 | アンリツ株式会社 | Peak detector |
| JPS6481458A (en) * | 1987-09-22 | 1989-03-27 | Yamatake Honeywell Co Ltd | Telephone set |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5125976B2 (en) * | 1972-09-27 | 1976-08-03 | ||
| JPS537244A (en) * | 1976-07-08 | 1978-01-23 | Canon Inc | Image forming device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5910627Y2 (en) * | 1974-08-16 | 1984-04-03 | ヤマハ株式会社 | Absolute value detection circuit |
-
1980
- 1980-06-16 JP JP8181080A patent/JPS579266A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5125976B2 (en) * | 1972-09-27 | 1976-08-03 | ||
| JPS537244A (en) * | 1976-07-08 | 1978-01-23 | Canon Inc | Image forming device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02234878A (en) * | 1989-03-06 | 1990-09-18 | Mazda Motor Corp | Support structure of tilt steering |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS579266A (en) | 1982-01-18 |
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