JPS6231484B2 - - Google Patents
Info
- Publication number
- JPS6231484B2 JPS6231484B2 JP53140074A JP14007478A JPS6231484B2 JP S6231484 B2 JPS6231484 B2 JP S6231484B2 JP 53140074 A JP53140074 A JP 53140074A JP 14007478 A JP14007478 A JP 14007478A JP S6231484 B2 JPS6231484 B2 JP S6231484B2
- Authority
- JP
- Japan
- Prior art keywords
- laminate
- internal electrode
- multilayer ceramic
- side surfaces
- electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003985 ceramic capacitor Substances 0.000 claims description 13
- 238000004519 manufacturing process Methods 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 8
- 239000011347 resin Substances 0.000 claims description 7
- 229920005989 resin Polymers 0.000 claims description 7
- 239000011521 glass Substances 0.000 claims description 3
- 239000003989 dielectric material Substances 0.000 claims description 2
- 239000000126 substance Substances 0.000 claims 1
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 8
- 238000000034 method Methods 0.000 description 6
- 239000003990 capacitor Substances 0.000 description 5
- 239000005388 borosilicate glass Substances 0.000 description 4
- 229910052763 palladium Inorganic materials 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 238000007606 doctor blade method Methods 0.000 description 3
- 238000007639 printing Methods 0.000 description 3
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 239000002253 acid Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 230000000740 bleeding effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000007654 immersion Methods 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- XSTXAVWGXDQKEL-UHFFFAOYSA-N Trichloroethylene Chemical group ClC=C(Cl)Cl XSTXAVWGXDQKEL-UHFFFAOYSA-N 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 239000002003 electrode paste Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- FBAFATDZDUQKNH-UHFFFAOYSA-M iron chloride Chemical compound [Cl-].[Fe] FBAFATDZDUQKNH-UHFFFAOYSA-M 0.000 description 1
- 239000005355 lead glass Substances 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 229910052573 porcelain Inorganic materials 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Ceramic Capacitors (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Description
本発明は改良された積層型磁器コンデンサの製
造方法に関するものである。
従来、積層型磁器コンデンサは主として第１図
に示すようにドクターブレード法、スプレー法、
印刷法などにより約25μ厚の誘電体層１を形成
し、さらに印刷法により両側面に約0.3mmの電極
マージン２を有するようにパラジウムあるいはパ
ラジウム系内部電極３を形成し、それぞれ交互に
積層したのち焼成し、さらに外部端子電極４を焼
付けて製造されている。また第２図に示すように
内部電極３の両側面に電極マージン２を有しない
構造も試みられ検討されている。
しかしながら、前者においては両側面部に電極
マージン２を有するために単位体積当りの取得静
電容量が制限され、また内部電極の印刷時におけ
るパターンずれ、にじみなどにより静電容量がば
らつく欠点がある。そして後者においては内部電
極パターンずれがなく、従つて静電容量精度は良
いが誘電体層が約25μ厚と薄く、両側面の切断加
工時に内部電極の側面誘電体への部分的なまわり
が生じ、そのために両側面の対向電極間で短絡あ
るいは縁面放電を生じ、コンデンサとしての信頼
性に乏しい欠点があつた。
本発明は上述の欠点を改善し、単位体積当りの
取得静電容量が大きく、静電容量バラツキが小さ
く、しかも信頼性の高い積層型磁器コンデンサの
製造方法を提供するものである。
すなわち、誘電体と内部電極とを交互に積層し
て焼成したのち、該焼成体の対向する内部電極露
出部分に外部端子電極を塗布、焼成した積層体に
おいて、該積層体の全面をワツクス、樹脂などの
固着材で覆つたのち、該積層体を外部端子電極と
直角に複数個に切断し、露出した両側面部に沿つ
て化学的に内部電極および外部端子電極の一部を
溶解除去し、該両側面部に内部電極マージンを形
成させるもので、またさらに信頼性を高めるため
に必要に応じて該側面部を絶縁性ガラスあるいは
絶縁性樹脂にて被覆することを特徴とするもので
ある。
以下、本発明を第３図〜第７図に示す実施例に
ついて説明する。
第５図に示すようにドクターブレード法により
得られた誘電体シート５に一端部を除いて片面全
面にパラジウム電極ペーストをスクリーン印刷し
て内部電極６を設けたのち、該誘電体シート５を
交互に所定枚数積み重ねて熱プレスにより熱圧着
して一体化する。次に所定温度で誘電体シート５
および内部電極６を同時に焼結させ、その後第６
図に示すように銀パラジウム電極を塗布、焼付け
して外部端子電極７を形成する。その後第７図に
示すように該積層体の全面をワツクス、樹脂など
の固着材８で覆つたのち、該積層体を外部端子電
極７と直角にａ―a′方向に複数個に切断し、表に
示す希酸溶液中に５分間、10分間、15分間、30分
間それぞれ浸漬して水で充分洗浄し、最後に固着
材８をトリクロルエチレンなどの溶剤で洗浄除去
して第３図に示す積層型磁器コンデンサを得た。
さらにコンデンサの信頼性を高めるために第３図
に示す積層型磁器コンデンサの両側面部９に硼珪
酸鉛ガラス粉末よりなるペーストを薄く塗布した
のち、600℃にて熱処理して硼珪酸鉛ガラス粉末
を融解させて両側面を被覆し、第４図に示す積層
型磁器コンデンサを得た。第４図において１０は
被覆材としての硼珪酸鉛ガラスを示す。
積層型コンデンサ素子の側面より内部電極を溶
解させ、それによつて形成される内部電極マージ
ン部は溶液の濃度、温度および浸漬時間によつて
異なるもので、その結果は第８図に示すように浸
漬時間または溶液濃度により電極マージンの程度
を設定することができる。
The present invention relates to an improved method of manufacturing a multilayer ceramic capacitor. Conventionally, multilayer porcelain capacitors have mainly been produced using the doctor blade method, spray method, or
A dielectric layer 1 with a thickness of approximately 25 μm was formed by a printing method, and palladium or palladium-based internal electrodes 3 were further formed by a printing method so as to have an electrode margin 2 of approximately 0.3 mm on both sides, and these were laminated alternately. After that, it is fired, and then the external terminal electrodes 4 are baked. Furthermore, as shown in FIG. 2, a structure in which the internal electrode 3 does not have electrode margins 2 on both sides has also been tried and studied. However, the former has electrode margins 2 on both side surfaces, which limits the capacitance that can be obtained per unit volume, and also has the drawback that the capacitance varies due to pattern misalignment, bleeding, etc. during printing of internal electrodes. In the latter case, there is no misalignment of the internal electrode pattern, so the capacitance accuracy is good, but the dielectric layer is thin, about 25μ thick, and when cutting both sides, the internal electrode partially wraps around the side dielectric. As a result, short circuits or edge discharges occur between opposing electrodes on both sides, resulting in poor reliability as a capacitor. The present invention improves the above-mentioned drawbacks and provides a method for manufacturing a multilayer ceramic capacitor that has a large acquired capacitance per unit volume, small variations in capacitance, and is highly reliable. That is, after dielectrics and internal electrodes are alternately laminated and fired, external terminal electrodes are applied to exposed portions of the opposing internal electrodes of the fired body, and the entire surface of the laminated body is coated with wax or resin. After covering the laminate with a fixing material such as, cut the laminate into multiple pieces at right angles to the external terminal electrodes, chemically dissolve and remove part of the internal electrodes and external terminal electrodes along both exposed side surfaces, and Internal electrode margins are formed on both side surfaces, and the side surfaces are coated with insulating glass or insulating resin as necessary to further improve reliability. The present invention will be described below with reference to embodiments shown in FIGS. 3 to 7. As shown in FIG. 5, palladium electrode paste is screen printed on the entire surface of one side of the dielectric sheet 5 obtained by the doctor blade method except for one end to provide internal electrodes 6, and then the dielectric sheet 5 is alternately A predetermined number of sheets are stacked on top of each other and integrated by heat-pressing. Next, the dielectric sheet 5 is heated at a predetermined temperature.
and internal electrode 6 are simultaneously sintered, and then the sixth
As shown in the figure, a silver-palladium electrode is applied and baked to form an external terminal electrode 7. Thereafter, as shown in FIG. 7, the entire surface of the laminate is covered with a fixing material 8 such as wax or resin, and the laminate is cut into a plurality of pieces in the a-a' direction perpendicular to the external terminal electrodes 7. The adhesive material 8 was immersed in the dilute acid solution shown in the table for 5 minutes, 10 minutes, 15 minutes, and 30 minutes, thoroughly washed with water, and finally the adhesive material 8 was removed by washing with a solvent such as trichlorethylene, as shown in Figure 3. A multilayer ceramic capacitor was obtained.
Furthermore, in order to improve the reliability of the capacitor, a paste made of lead borosilicate glass powder was applied thinly to both side surfaces 9 of the multilayer ceramic capacitor shown in Fig. 3, and then heat-treated at 600°C to form lead borosilicate glass powder. Both side surfaces were coated by melting to obtain a multilayer ceramic capacitor shown in FIG. In FIG. 4, numeral 10 indicates lead borosilicate glass as a covering material. The internal electrode is melted from the side of the multilayer capacitor element, and the internal electrode margin formed thereby varies depending on the concentration of the solution, temperature, and immersion time, and the results are as shown in Figure 8. The degree of electrode margin can be set by time or solution concentration.
【表】
上記実施例においては誘電体シートをドクター
ブレード法により製作し、これを熱圧着すること
により積層体を得ているが、他のスクリーン印
刷、スプレーなどの方法により積層体を得る場合
も同様であり、また内部電極も一端部を除いて片
面全面に設けたものに限らず複数列に配置しても
よく、材料としてパラジウム以外のパラジウム銀
を用いる場合も同様であり、また希酸溶液として
塩酸、硫酸あるいは塩化鉄溶液でも同様の効果が
得られる。さらに積層チツプ素子の両側面の被覆
用材料としては、硼珪酸鉛ガラス以外に外部端子
電極の焼付温度である800℃以下の低融点ガラス
絶縁材料、エポキシ、フエノール、ポリエステル
などの有機絶縁樹脂を用いても同様であり、以上
全ての点において本発明の意図から逸脱するもの
ではない。
以上述べた本発明の手法により大量生産が容易
で生産の効率化が計れる。側面の電極マージンを
少くし、単位体積当りの取得静電容量が大きく、
小型大容量のコンデンサが得られる。内部電極パ
ターンのずれ、にじみなどによる容量バラツキが
少なくなる。静電容量の調整が可能となり、製造
時の静電容量歩留が向上する。信頼性の高い積層
型磁器コンデンサが得られるなど多くの効果を有
し、工業上ならびに実用上有益なものである。[Table] In the above example, the dielectric sheet was produced by the doctor blade method, and the laminate was obtained by thermocompression bonding, but the laminate may also be obtained by other methods such as screen printing or spraying. Similarly, the internal electrodes are not limited to those provided on the entire surface of one side except for one end, but may be arranged in multiple rows, and the same applies when palladium silver other than palladium is used as the material. A similar effect can be obtained using hydrochloric acid, sulfuric acid, or iron chloride solution. In addition to borosilicate lead glass, the materials used to cover both sides of the laminated chip element include low-melting glass insulating materials with a temperature below 800°C, which is the baking temperature for external terminal electrodes, and organic insulating resins such as epoxy, phenol, and polyester. The same applies to the invention, and all of the above do not deviate from the spirit of the present invention. By the method of the present invention described above, mass production is easy and production efficiency can be improved. The side electrode margin is reduced, and the acquired capacitance per unit volume is large.
A small, large-capacity capacitor can be obtained. Capacity variations due to internal electrode pattern misalignment, bleeding, etc. are reduced. Capacitance can be adjusted, improving capacitance yield during manufacturing. It has many effects such as the ability to obtain a highly reliable multilayer ceramic capacitor, and is useful industrially and practically.
第１図および第２図はそれぞれ従来の積層型磁
器コンデンサの要部破断斜視図、第３図は本発明
の積層型磁器コンデンサの一実施例、第４図は本
発明の積層型磁器コンデンサの他の実施例で、そ
れぞれイは積層型磁器コンデンサの要部破断斜視
図、ロはイのｂ―ｃにおける断面図、第５図、第
６図、第７図は本発明の積層型磁器コンデンサの
製造過程例を示す斜視図、第８図は希酸溶液の種
類、濃度、浸漬時間および内部電極溶解深さとの
相関図である。
２，１１：内部電極マージン、３，６：内部電
極、４，７：外部端子電極、５：誘電体シート、
８：固着剤、９…側面部、１０：硼珪酸鉛ガラ
ス。
FIGS. 1 and 2 are perspective views of main parts of a conventional multilayer ceramic capacitor, FIG. 3 is an embodiment of the multilayer ceramic capacitor of the present invention, and FIG. 4 is a cross-sectional view of a multilayer ceramic capacitor of the present invention. In other embodiments, A is a cutaway perspective view of essential parts of a multilayer ceramic capacitor, B is a sectional view taken along b-c of A, and FIGS. 5, 6, and 7 are multilayer ceramic capacitors of the present invention. FIG. 8 is a perspective view showing an example of the manufacturing process, and FIG. 8 is a correlation diagram between the type of dilute acid solution, concentration, immersion time, and internal electrode dissolution depth. 2, 11: internal electrode margin, 3, 6: internal electrode, 4, 7: external terminal electrode, 5: dielectric sheet,
8: Adhesive agent, 9... Side part, 10: Lead borosilicate glass.
Claims (1)
たのち、該焼成体の対向する内部電極露出部分に
外部端子電極を塗布、焼付した積層体において、
該積層体の全面をワツクス、樹脂などの固着材で
覆つたのち、該積層体を外部端子電極に対してほ
ぼ直角に切断して内部電極を露出させ、該露出し
た両側面部に沿つて化学的に内部電極の一部を溶
解除去し、該両側面部に内部電極マージンを形成
したのち、ワツクス、樹脂などを除去して個々の
積層型磁器コンデンサを得たことを特徴とする積
層型磁器コンデンサの製造方法。 ２ 上記内部電極マージンを形成した両側面部を
絶縁性ガラスあるいは絶縁性樹脂にて被覆するこ
とを特徴とする特許請求の範囲第１項記載の積層
型磁器コンデンサの製造方法。[Scope of Claims] 1. A laminate in which dielectrics and internal electrodes are alternately laminated and fired, and then external terminal electrodes are applied and baked on the exposed portions of the internal electrodes facing each other in the fired body,
After covering the entire surface of the laminate with a bonding material such as wax or resin, the laminate is cut at almost right angles to the external terminal electrodes to expose the internal electrodes, and chemical treatment is applied along both exposed side surfaces. A part of the internal electrode is melted and removed, internal electrode margins are formed on both side surfaces, and wax, resin, etc. are removed to obtain an individual multilayer ceramic capacitor. Production method. 2. The method of manufacturing a multilayer ceramic capacitor according to claim 1, characterized in that both side surfaces on which the internal electrode margins are formed are coated with insulating glass or insulating resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14007478A JPS5565421A (en) | 1978-11-13 | 1978-11-13 | Method of manufacturing laminated porcelain capacitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14007478A JPS5565421A (en) | 1978-11-13 | 1978-11-13 | Method of manufacturing laminated porcelain capacitor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5565421A JPS5565421A (en) | 1980-05-16 |
| JPS6231484B2 true JPS6231484B2 (en) | 1987-07-08 |
Family
ID=15260353
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14007478A Granted JPS5565421A (en) | 1978-11-13 | 1978-11-13 | Method of manufacturing laminated porcelain capacitor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5565421A (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0831396B2 (en) * | 1989-08-24 | 1996-03-27 | 株式会社村田製作所 | Manufacturing method of multilayer capacitor |
| DE4091418T1 (en) * | 1989-08-24 | 1997-07-31 | Murata Manufacturing Co | Multilayer capacitor and process for its manufacture |
| JPH0831397B2 (en) * | 1989-08-24 | 1996-03-27 | 株式会社村田製作所 | Manufacturing method of multilayer capacitor |
| JPH0828310B2 (en) * | 1989-08-24 | 1996-03-21 | 株式会社村田製作所 | Manufacturing method of multilayer capacitor |
| JPH0828309B2 (en) * | 1989-08-24 | 1996-03-21 | 株式会社村田製作所 | Multilayer capacitor |
| JP2624849B2 (en) * | 1989-08-24 | 1997-06-25 | 株式会社村田製作所 | Manufacturing method of multilayer capacitor |
| JP6888324B2 (en) * | 2017-02-23 | 2021-06-16 | 株式会社村田製作所 | Manufacturing method of multilayer ceramic electronic components |
-
1978
- 1978-11-13 JP JP14007478A patent/JPS5565421A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5565421A (en) | 1980-05-16 |
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