JPS5961116A - Method of producing chip type solid electrolytic condenser - Google Patents

Method of producing chip type solid electrolytic condenser

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Publication number
JPS5961116A
JPS5961116A JP17120382A JP17120382A JPS5961116A JP S5961116 A JPS5961116 A JP S5961116A JP 17120382 A JP17120382 A JP 17120382A JP 17120382 A JP17120382 A JP 17120382A JP S5961116 A JPS5961116 A JP S5961116A
Authority
JP
Japan
Prior art keywords
layer
solid electrolytic
type solid
chip
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17120382A
Other languages
Japanese (ja)
Inventor
石川 浩久
望月 盛児
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17120382A priority Critical patent/JPS5961116A/en
Publication of JPS5961116A publication Critical patent/JPS5961116A/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (a)  発明の技術分野 本発明はチップ型固体電解コンデンサの製造方法、特(
こ陽極用リード端子を必要としないで構成されたコンデ
ンサの量産的方法lこ関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Technical field of the invention The present invention relates to a method for manufacturing a chip-type solid electrolytic capacitor, particularly (
This invention relates to a method for mass-producing a capacitor that does not require an anode lead terminal.

(bン 技術の背景 混成集!l!回路基板やプリント板Cこ搭載されるチッ
プ型固体電解コン,デンサは、弁作用を有する陽極体l
こ接続さ九たリード端子(リード線)を有する構造のも
のが一般的であった。
(b) A collection of technical backgrounds! The chip-type solid electrolytic capacitors and capacitors mounted on circuit boards and printed boards have an anode body with valve action.
A structure having nine lead terminals (lead wires) for connection was common.

しかし、かかるコンデンサは陰極とリード端子とをはん
だ付は等の手段lこて所定の回路パターンlこ接続する
ための手段、例えばリード端子に適当な曲げ加工を施し
て該リード端子の接続部が陰極面と一致するように1.
たり、前記基板等のコンデンサ搭載面ζこ直状リード端
子が接続されるパッドを予め形成する等の手段を必要と
した。のみならず、陽極体tこタンタルを用いたコンデ
ンサはその製造工程で必要となるタンタル細を介しては
んだ付は可能なリード端子を陽極体に縦ぐ必要があり、
アルミニウムを陽極体としたコンデンサ6旧オんだ付け
HJ能なリード端子を陽極体に直接接続できる反面、#
接続した部分をテフロン等で保護したのち陽極体の波面
等を施す必要があった。従って、これらのコンデンサに
対し所定面へ搭載する、及び作成する際の前記欠点を改
善したいという要望力、ユーザ及びメーカの双方にあっ
た。
However, such a capacitor requires a method such as soldering the cathode and the lead terminal to a predetermined circuit pattern. 1. to match the cathode surface.
In addition, it is necessary to form in advance a pad to which a straight lead terminal is connected to the capacitor mounting surface ζ of the substrate or the like. In addition, for capacitors using tantalum as an anode body, it is necessary to extend lead terminals that can be soldered to the anode body through tantalum thin strips required in the manufacturing process.
Capacitors with aluminum anode body
It was necessary to protect the connected part with Teflon, etc., and then apply the wave surface of the anode body. Therefore, both users and manufacturers have a strong desire to improve the above-mentioned drawbacks when mounting and manufacturing these capacitors on a predetermined surface.

そこで、本出願人は陽極と陰極とをほぼ同一面lこ形成
し、前記リード端子が不要となる構造のチップ型固体電
解コンデンサを昭和57年5月28日に出願(出願番号
;特願昭fi7−090693)した。
Therefore, the present applicant filed an application on May 28, 1981 (application number: patent application number: fi7-090693).

第1図は前記出願したチップ型固体電解コンデンサの代
表的構造例を示す断面図であり、コンデンサlは弁作用
金属ζこてなる柱状陽極体2の中間部lこ鉢巻き環状テ
フロン3を固着し、テフロン3で仕切られた一方の陽極
体表面に誘電体層4を設け、その表面に半導体層5を設
け、その表面ζこグラファイト層6と銀層7とはんだ層
8とでなる導体層(陰極層)9が設けられている。そし
て、テフロン3で仕切られた他方の陽極体表面には半導
体層5′を設け、その表面ζこグラファイト層6′と銀
層7′とはんだ層8′にてなる導体層(陽極層)9′が
設けらnている。
FIG. 1 is a cross-sectional view showing a typical structural example of the chip-type solid electrolytic capacitor filed above, in which the capacitor l has a headband-shaped ring-shaped Teflon 3 fixed to the middle part of a columnar anode body 2 made of a valve metal ζ. , a dielectric layer 4 is provided on the surface of one anode body partitioned by Teflon 3, a semiconductor layer 5 is provided on the surface, and a conductor layer (ζ) consisting of a graphite layer 6, a silver layer 7 and a solder layer 8 A cathode layer) 9 is provided. A semiconductor layer 5' is provided on the surface of the other anode body partitioned by Teflon 3, and a conductor layer (anode layer) 9 consisting of a graphite layer 6', a silver layer 7', and a solder layer 8' is provided on the surface of the semiconductor layer 5'. ' is provided.

(eJ  発明の目的 本発明の目的は、第1図に示す如(+1−ド端子を具備
しない構造のチップ型固体電解コンデンサを、高卵率に
生産する方法を提供することである。
(eJ) OBJECTS OF THE INVENTION An object of the present invention is to provide a method for producing a chip-type solid electrolytic capacitor having a structure without a +1- terminal as shown in FIG. 1 at a high production rate.

(1)発明の構成 上記目的は、弁作用を有する金属板の不要部分を除去し
て複数の櫛歯体がそれぞれ一端で連結された櫛形状に形
成し、該櫛歯体の各中間部に電気的絶縁性樹脂の鉢巻き
環状体を被着して櫛歯体先端部と櫛歯体根本部に仕切り
、少なくとも該先端部表面には銹箱;体層と半導体層と
−j7体層とを積層形成し、該根本部の連結部で切断し
たことを特徴とするチップ型固体電解コンデンサの製造
方法により達成さn、る。
(1) Structure of the Invention The above object is to remove unnecessary portions of a metal plate having a valve action and form a comb shape in which a plurality of comb teeth bodies are connected at one end, and to form a comb shape in which a plurality of comb teeth bodies are connected at one end. A headband annular body made of electrically insulating resin is applied to partition the tip of the comb tooth body and the base of the comb tooth body, and at least the surface of the tip portion is provided with a rust box; a body layer, a semiconductor layer, and a −j7 body layer. This is achieved by a method for manufacturing a chip-type solid electrolytic capacitor, which is characterized in that the capacitor is laminated and cut at the connecting portion of the base portion.

(e)  発明の実施列 以下、図面を用いて本発明方法を説明する。(e) Implementation sequence of the invention The method of the present invention will be explained below using the drawings.

第2図は第1図に示したコンデンサとともに本発明方法
の対称ζなるコンデンサの構成例を示す側断面図であり
、第1図と共通部分には同一符号を記入したものである
FIG. 2 is a side sectional view showing an example of the configuration of a symmetrical capacitor ζ according to the method of the present invention together with the capacitor shown in FIG. 1, and parts common to those in FIG. 1 are given the same reference numerals.

第2図(イ)において、コンデンサ11は環状テフロン
3で仕切られた陽極体2の一方の表面に誘電体層4と半
導体層5と導体W49を積層形成し、他方の表面C・こ
は導体M9’を形成して構成されたものである。
In FIG. 2(A), the capacitor 11 is formed by laminating a dielectric layer 4, a semiconductor layer 5, and a conductor W49 on one surface of an anode body 2 partitioned by a ring-shaped Teflon 3, and a conductor W49 on the other surface. It is constructed by forming M9'.

第2図(ロ)において、コンデンサ21は1対のコンテ
ンツ゛の陽極体を直結した無極性構造であり、環状テフ
ロン3で仕切られた陽極体2の一方の表面に誘電体層4
と半導体層5と導体層9を積層形成し、他方の表面に誘
電体層4′と半導体層5′と導体M 9 /を形成して
構成されたものである。
In FIG. 2(B), the capacitor 21 has a non-polar structure in which a pair of anode bodies of content 2 are directly connected, and a dielectric layer 4 is formed on one surface of the anode body 2 separated by a ring Teflon 3.
, a semiconductor layer 5 and a conductor layer 9 are laminated, and a dielectric layer 4', a semiconductor layer 5', and a conductor M 9 / are formed on the other surface.

なお、第1図及び第2図において導体層9と9′は、グ
ラファイト層と@層とはんだ層を積層形成されているが
、はんだ層を除く2層構呼のものもある。
In FIGS. 1 and 2, the conductor layers 9 and 9' are formed by laminating a graphite layer, an @ layer, and a solder layer, but there are also two-layer structures excluding the solder layer.

第3図1は本発明方法の主要工程を+lrt次示した平
面図であり、本発明方法になるコンデンサはまずW、3
図(イ)に示す如く、弁作用を有する所要厚さの帯状金
属板の不要部分をプレス加工等にて除去し、複数個の櫛
歯状陽析体32の各一端が連結部材3!に連結された櫛
状体31を作成する。
FIG. 3 is a plan view showing the main steps of the method of the present invention in +lrt order.
As shown in Figure (a), unnecessary parts of a belt-shaped metal plate having a required thickness and having a valve action are removed by press working or the like, and one end of each of the plurality of comb-shaped positive specimens 32 is attached to the connecting member 3! A comb-like body 31 connected to is created.

次いで第3図(ロ)lこ示す如く、各陽極体32の中間
部にζ誘電体層及び半導体層を形成させる等の後工程に
耐える撥水(、耐熱性、耐酸性を有するテフロン等の電
気的絶縁性樹脂の鉢巻き環状体い状テフロン)34を別
途形成品の嵌着、又は樹脂液を塗付・乾燥(例えば2時
間の自然乾燥)したの含焼付け(例えば200℃で30
分間)で被着する。
Next, as shown in FIG. 3(b), a dielectric layer and a semiconductor layer are formed in the middle part of each anode body 32 using a water-repellent material (such as Teflon, etc.) that has water repellency, heat resistance, and acid resistance. A separately formed product is fitted with an electrically insulating resin headband (Teflon) 34, or a resin solution is applied and dried (for example, air drying for 2 hours) and then baked (for example, at 200°C for 30 minutes).
Deposition takes place (minutes).

次いで、所要(こより誘電体層が形成される陽極体32
表面をエツチング手段で波面させたのち第3図(ハ)に
示す如く、テフロン34で仕切らnた各陽極体32の先
端部及び根本部に、誘電体層と半導体層の所υ層を所定
′tLlこ浸漬して及び該浸漬したのち熱分解させる従
来手段で形成し、該所要層の表面に導体層35と36を
所定液(こ浸mする従ぞ 来手段で被着される。なおそれぞ扛の前記D1足液、即
ち弱酸系化成液や硝酸マンガン液やコロイダルグラファ
イト液及び溶融はんた液等に、連結をれた複数個の陽極
体32を各層形成部位まで同時浸漬ζせるには、陽極体
32が垂下するように櫛状体31の連結部材33を保持
し、該保持する機構を適宜艙だけ上丁動さゼて行なう。
Next, the anode body 32 on which the dielectric layer is formed as required (from which the dielectric layer is formed)
After the surface is made corrugated by etching means, as shown in FIG. The conductor layers 35 and 36 are formed on the surface of the required layer by a conventional method of dipping in a predetermined liquid and then thermally decomposed. A plurality of connected anode bodies 32 are simultaneously immersed in the D1 foot solution, that is, a weak acidic chemical solution, a manganese nitrate solution, a colloidal graphite solution, a molten solder solution, etc. up to the layer forming portion. The connecting member 33 of the comb-like body 31 is held so that the anode body 32 hangs down, and the holding mechanism is moved upward by an appropriate amount.

次いて、第3図に)Iこ示す如く各陽極体(32)の連
結部(根本部中間)を切断し、チップ型固体iIcMコ
ンデンサ37が完成する。
Next, as shown in FIG. 3), the connecting portion (midway of the base) of each anode body (32) is cut to complete the chip-type solid-state iIcM capacitor 37.

なお、導体層35と36はグラファイト層に銀層を積層
1−また構成を基本とし、必要(こ応じて銀層の表面に
はんだ層が積層される。ただし、微細な間隙や孔にも浸
透して付着することを特命とするグラファイト層は、半
導体層の微細凹凸を埋め、高い導電性とはんだ付は性を
有する鋼層の密着性を確保する中間層である。従って、
陽極体32の表面に直接被着される導体層36は銀層の
み、又は銀層にはんだ層を積層して構成にすることがで
きる。
The conductor layers 35 and 36 are basically composed of a graphite layer laminated with a silver layer, and a solder layer is laminated on the surface of the silver layer as necessary. The graphite layer is an intermediate layer that fills the fine irregularities of the semiconductor layer and ensures the adhesion of the steel layer, which has high conductivity and solderability.
The conductor layer 36 directly deposited on the surface of the anode body 32 can be composed of only a silver layer or a solder layer laminated on the silver layer.

また、導体/FJ35と36の双方下方(こ形成される
誘電体層と半導体層は、環状テフロン34を挾んでそれ
ぞれ同時形成させることができる。しかし、前記銀層は
高導電性であり導体層35と36の双方へ同時形成しf
こコンデンサに等体層間り)絶縁性がやや低下し、静電
容置が0.5〜0.7μFて埃δが5%以下である該コ
ンデンサの漏れ電流は約1μAであった。そこで、導体
層35と36そnぞれの銀層を別工程で形成させたとこ
ろ、前記コンデンサの漏れ電流は約0.5μA)こ向上
した。
Further, the dielectric layer and the semiconductor layer formed below both the conductors/FJs 35 and 36 can be formed simultaneously by sandwiching the annular Teflon 34. However, the silver layer is highly conductive and the conductor layer is Simultaneously formed on both 35 and 36 f
The leakage current of this capacitor was about 1 μA, with a capacitor having a capacitance of 0.5 to 0.7 μF and a dust δ of 5% or less. Therefore, when the silver layers of the conductor layers 35 and 36 were formed in separate steps, the leakage current of the capacitor was improved by about 0.5 μA).

さらに捷た、環状テフロン34は陽極体32の表面に誘
電体層を形成しその表面に半導体層を形成する工程にお
いて微細なりラックの発生することがあり、該クラック
がコロイダルグラファイト液に浸漬されるようにして導
体W135及び36のグラファイト層を形成させると、
浸透性の良い該グラファイト液が該クラックに浸入し、
コンデンサ不良率の一要因(こなった。そこで第3図と
同等部分には同一符号を用いた@4しlの工程説明図に
示す方法、即ちまず第4図(イ)に示す如く、環状テフ
ロン38 (第3図のテフロン34の厚さ方向内側部分
に相当)で仕切られた陽極体32の先端部表面に、誘電
体層39(第1図の誘電体層4に相当)と半導体層40
(第1図の半導体層5に相当)をfvIvi形成し、I
’!3 橋体32の根本部表面には半導体/?!40’
(第1図の半導体層5′に相当)を形成させる。ただし
、テフロン38のI’fさは防電体層39.4二半導体
層40の積層厚さと同等以上にする。次いで第4図(ロ
)(こ示す如く、テフロン38の表面tこテフロン38
と同質のテフロン液を塗付・乾燥させて環状テフロン3
8′(第3図のテフロン34の)ワさ方向外側に相当)
を積層形成したのち、第4図(ハ)に示す如く半導体層
40及び40′の表面に、グラファイト液へ浸漬・焼付
けして、グラファイト層41と41′(第1図のグラフ
ァイト層6と6′に相当)を被着形成し、その表面それ
ぞれに銀層42及び42′(第1図の銀層6と6′に相
)被着させる。ただし、テフロン38′の厚さはグラフ
ァイト層41と銀層42を含んで構成する導体層(35
)の積層厚さと同等以上である。そして、テフロン38
と38′の2層構成にされたコンデンサは、半導体M3
9と39′の被着により形成されたテフロン38の欠陥
をテフロン38′が補修するため、第3図に示す如く1
体形成されたテフロン34iこてなるコンデンサfこ比
べて不良率が低下(例えば不良率2〜3チ→1チ以下)
する。
Furthermore, in the process of forming a dielectric layer on the surface of the anode body 32 and forming a semiconductor layer on the surface of the annular Teflon 34 that has been twisted, fine cracks may occur, and the cracks may be immersed in the colloidal graphite liquid. When the graphite layers of conductors W135 and 36 are formed in this way,
The graphite liquid with good permeability penetrates into the crack,
One of the causes of capacitor failure rate (this happened. Therefore, the method shown in the process explanatory diagram of @4shil, in which the same symbols are used for the same parts as in Fig. 3, is used. First, as shown in Fig. 4 (a), annular A dielectric layer 39 (corresponding to dielectric layer 4 in FIG. 1) and a semiconductor layer are formed on the front end surface of the anode body 32 partitioned with Teflon 38 (corresponding to the inner part in the thickness direction of Teflon 34 in FIG. 3). 40
(corresponding to the semiconductor layer 5 in FIG. 1) is formed by fvIvi, and I
'! 3 There is a semiconductor/? ! 40'
(corresponding to the semiconductor layer 5' in FIG. 1) is formed. However, the I'f of the Teflon 38 is set to be equal to or greater than the laminated thickness of the electric shield layer 39, 4 and the two semiconductor layers 40. Next, in FIG. 4 (b), as shown, the surface of the Teflon 38 is
Apply and dry Teflon solution of the same quality as Cyclic Teflon 3.
8' (corresponds to the outside in the width direction of Teflon 34 in Figure 3)
After laminating the semiconductor layers 41 and 41' (graphite layers 6 and 6 in FIG. Silver layers 42 and 42' (corresponding to silver layers 6 and 6' in FIG. 1) are deposited on their respective surfaces. However, the thickness of Teflon 38' is the same as the conductor layer (35
) is equivalent to or greater than the lamination thickness of And Teflon 38
The capacitor with a two-layer structure of 38' and 38' is a semiconductor M3
In order for Teflon 38' to repair the defects in Teflon 38 formed by the adhesion of Teflon 9 and 39', as shown in FIG.
The defective rate is lower than that of Teflon 34i capacitors (e.g. defective rate of 2 to 3 inches → 1 inch or less)
do.

さらにまた、第3図に示した導体層35と36を構成す
る一方の銀層にニッケル等の磁性粉を混入、即ち何れか
一方の6層形成用銀塗料に磁性粉を混入し該双方の銀層
を別工程で塗付することにより、導体層35と36の一
方を磁気的fこ自動判別できるコンデンサが得らnる。
Furthermore, magnetic powder such as nickel is mixed into one of the silver layers constituting the conductor layers 35 and 36 shown in FIG. By applying the silver layer in a separate process, a capacitor is obtained in which one of the conductor layers 35 and 36 can be automatically discriminated magnetically.

(f)  発明の詳細 な説明した如く本発明方法によれば、複数個の閤析体の
該陽極体の一連が連結される連結部材とを帯状金属板か
ら形成し、各陽極体表面に各種の所要層をパ、yチプロ
セスにて形成したのち、各陽極体連結部を切断してチッ
プ型固体電解コンデンサが完成さnる。従って、個片I
こされた陽極体を使用する従来のチップ型固体電解コン
デンサ・バッチプロセスにおいて、帯状の連結部劇に陽
極体を接続するための線材及び該線材(陽極用リード線
を有するコンデンサは該リード、li!it)を該連結
部材へ接続する作業が不要となり、プリント板回路等に
接続される1対の導体層をほぼ同一面に配設したコンデ
ンサのW1産化を実坊した効果は極めて大きい。
(f) As described in detail, according to the method of the present invention, a connecting member to which a series of anode bodies of a plurality of plated bodies are connected is formed from a band-shaped metal plate, and various types of coatings are applied to the surface of each anode body. After forming the required layers by the process, each anode body connecting portion is cut to complete a chip type solid electrolytic capacitor. Therefore, individual piece I
In the conventional chip-type solid electrolytic capacitor batch process that uses the anode body, the wire rod for connecting the anode body to the strip-shaped connecting part and the wire rod (for capacitors with an anode lead wire, the lead, li !it) to the connecting member is no longer necessary, and the effect of realizing W1 production of a capacitor in which a pair of conductor layers connected to a printed board circuit etc. are disposed on almost the same plane is extremely large.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は々1部排続される1対の2を体層をほぼ同一面
(こ形成したチップ型固体電解コンデンサの構成例を示
す91+断面図、第2図は前記コンデンサとともに本発
明方法の対称となるチップ型固体KMコンデンサの構成
2例を示ず側断面図、第3図は本発明方法の主要工程を
説明するための平面図、第4図はコンデンサを構成する
半導体層の形成により第33図の環状テフロンに生じた
欠陥を補修する一実施例の主要工程を説明するための側
断面図である。 なお図中において、1,11.’21.37はチップ型
固体電解コンデンサ、2は陽極体、3,34.38.3
8′は環状テフロン(環状体)、4゜39は誘電体層、
5.5’、40.40’にJ半導体層、6.6’、41
.41’はグラファイト層、7.7’、42.42’は
銀層、8,8′ははんだ層、9.9’、35.36は導
体層、31は櫛状体、32は陽極体(櫛歯体)、33は
連結部材を示す・
FIG. 1 is a 91+ cross-sectional view showing an example of the structure of a chip-type solid electrolytic capacitor in which a pair of 2 parts are formed on the same surface, and FIG. Fig. 3 is a plan view for explaining the main steps of the method of the present invention, and Fig. 4 shows the formation of the semiconductor layer constituting the capacitor. 33 is a side sectional view for explaining the main steps of an embodiment for repairing defects caused in the annular Teflon shown in FIG. , 2 is the anode body, 3, 34.38.3
8′ is a ring Teflon (ring body), 4°39 is a dielectric layer,
J semiconductor layer at 5.5', 40.40', 6.6', 41
.. 41' is a graphite layer, 7.7' and 42.42' are silver layers, 8 and 8' are solder layers, 9.9' and 35.36 are conductor layers, 31 is a comb-shaped body, and 32 is an anode body ( comb tooth body), 33 indicates a connecting member.

Claims (1)

【特許請求の範囲】 +1)  弁作用を有する金属板の不要部分を除去して
複数の櫛歯体がそれぞれ一端で連結部nた櫛形状に形成
し、該櫛歯体の各中間部(ζ電気的絶縁性樹脂の鉢巻き
環状体を被着して櫛歯体先端部と@歯体根本部9こ仕切
り、少なくとも該先端部表面にCI誘電体層と半導体層
と導体層とを積層形成し、該根本部の連結部で切断した
ことを特徴とするチップ型固体電解コンデンサの製造方
法。 (2)  前記先端部と前記根本部それぞれに形成する
前記誘電体層、半導体層、導体層は同種層を同一工程で
形成させることを特徴とする前記QF?’r請求の範囲
第(1)項ζこ記載したチップ型固体電解コンデンサの
#遣方法。 (3)  前記根本部ζこ形成する導体、l1IJはニ
ッケル等の磁性粉末を混入して、導電性ペーストを塗着
・焼付けてなることを特徴とする特許 第(11項Cこ記載したチップ型固体電解コンデンサの
製造方法。 (4)前記導体層はグラファイト層tこ導電層を積層し
てなり、該グラファイト層の形成に先立ち前記環状体の
表面lこ前記電気的絶縁性樹脂の層を形成させたことを
特徴とする前記特Frt*求の範囲第(1)項ζこ記載
したチップ型固体電解コンデンサの製造方法。
[Scope of Claims] +1) An unnecessary portion of a metal plate having a valve action is removed to form a plurality of comb teeth each having a connecting portion at one end, and each intermediate portion (ζ A headband annular body made of electrically insulating resin is applied to partition the tip of the comb tooth body and the root part of the tooth body, and a CI dielectric layer, a semiconductor layer, and a conductor layer are laminated on at least the surface of the tip. , a method for manufacturing a chip-type solid electrolytic capacitor, characterized in that the capacitor is cut at a connecting portion of the root portion. (2) The dielectric layer, the semiconductor layer, and the conductor layer formed on the tip portion and the root portion are of the same type. Claim (1) A method of manufacturing a chip type solid electrolytic capacitor as described above, characterized in that the layers are formed in the same process. (3) The conductor formed at the root portion. , l1IJ is a method for manufacturing a chip-type solid electrolytic capacitor described in Patent No. 11C, which is characterized in that it is formed by mixing magnetic powder such as nickel and applying and baking a conductive paste. (4) The above-mentioned The conductive layer is formed by laminating a graphite layer and a conductive layer, and the electrically insulating resin layer is formed on the surface of the annular body prior to forming the graphite layer. Scope of Requirements Item (1) ζ A method for manufacturing the chip-type solid electrolytic capacitor described above.
JP17120382A 1982-09-30 1982-09-30 Method of producing chip type solid electrolytic condenser Pending JPS5961116A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17120382A JPS5961116A (en) 1982-09-30 1982-09-30 Method of producing chip type solid electrolytic condenser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17120382A JPS5961116A (en) 1982-09-30 1982-09-30 Method of producing chip type solid electrolytic condenser

Publications (1)

Publication Number Publication Date
JPS5961116A true JPS5961116A (en) 1984-04-07

Family

ID=15918927

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17120382A Pending JPS5961116A (en) 1982-09-30 1982-09-30 Method of producing chip type solid electrolytic condenser

Country Status (1)

Country Link
JP (1) JPS5961116A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63232413A (en) * 1987-03-20 1988-09-28 日通工株式会社 Solid electrolytic capacitor and manufacture of the same
JPH0233426U (en) * 1988-08-25 1990-03-02
JPH0282023U (en) * 1988-12-15 1990-06-25
JP2011018712A (en) * 2009-07-08 2011-01-27 Sanyo Electric Co Ltd Solid electrolytic capacitor, and method of manufacturing the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63232413A (en) * 1987-03-20 1988-09-28 日通工株式会社 Solid electrolytic capacitor and manufacture of the same
JPH0233426U (en) * 1988-08-25 1990-03-02
JPH0282023U (en) * 1988-12-15 1990-06-25
JP2011018712A (en) * 2009-07-08 2011-01-27 Sanyo Electric Co Ltd Solid electrolytic capacitor, and method of manufacturing the same

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