JPS62245629A - Attaching method for electrode - Google Patents

Attaching method for electrode

Info

Publication number
JPS62245629A
JPS62245629A JP61088151A JP8815186A JPS62245629A JP S62245629 A JPS62245629 A JP S62245629A JP 61088151 A JP61088151 A JP 61088151A JP 8815186 A JP8815186 A JP 8815186A JP S62245629 A JPS62245629 A JP S62245629A
Authority
JP
Japan
Prior art keywords
electrode
film
substrate
conductor
layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61088151A
Other languages
Japanese (ja)
Inventor
Kiyoshi Takimoto
瀧本 清
Hiroshi Matsuda
宏 松田
Kenji Saito
謙治 斉藤
Toshihiko Miyazaki
俊彦 宮崎
Takeshi Eguchi
健 江口
Toshiaki Kimura
木村 稔章
Yukio Nishimura
征生 西村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP61088151A priority Critical patent/JPS62245629A/en
Priority to US07/038,722 priority patent/US4835083A/en
Publication of JPS62245629A publication Critical patent/JPS62245629A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To eliminate poor conduction between conductor layers, which are isolated by insulating layers, by constituting the ends of the conductors in a staircase shape, attaching an electrode to the stiarcase shaped part, thereby increasing the contact area of the electrode and the conductor layers. CONSTITUTION:The ends of conductors are formed in a staircase shape, and an electrode 6 is attached to the staircase part. Therefore, the exposed areas of the conductor layers 3 at the end parts of the conductors, to which the electrode is attached, are increased. The contact area between the electrode 6 and the conductor areas 3, to which the electrode 6 is attached, is increased. Thus, poor conduction between the conductor layers 3, which are isolated by insulating layers, can be eliminated. Since the contact area with the electrode 6 is increased, the contact strength between the conductor layers 3 and the electrode 6 is increased. Therefore, separation of the electrode and the like do not occur.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、導体への電極の付設方法に関し、中でも導電
層と絶縁層が交互に積層された積層構成を有する導体薄
膜の末端に電極を付設する方法に関するものである。 
   □      □〔従来の技術〕 以下、主として導体が有機薄膜の場合を碗として本発明
を説明するが、本廃萌はこのよう□な有機材質の場合に
のみ限定されるもめではなく、□無機材質のものにも適
用し得るものである。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a method for attaching an electrode to a conductor, and in particular, a method for attaching an electrode to the end of a conductive thin film having a laminated structure in which conductive layers and insulating layers are alternately laminated. This relates to the method of attachment.
□ □ [Prior Art] Hereinafter, the present invention will be explained mainly in the case where the conductor is an organic thin film, but this problem is not limited only to the case of □ organic materials, but also □ inorganic materials. It can also be applied to

従来、導体薄膜への電極の付設方法としては、例えば以
下のようなものか知られている。
Conventionally, as a method of attaching an electrode to a conductor thin film, the following methods are known, for example.

■ 薄膜を積層する基板トにあらかじめ電極パターンを
形成し、この十に薄膜層を形成する。
(2) An electrode pattern is formed in advance on the substrate on which the thin film is to be laminated, and a thin film layer is formed on this electrode pattern.

■ 薄膜上に直接電極パターンを形成する。■ Forming an electrode pattern directly on the thin film.

■ 探針を薄膜と接触させる、あるいは月形の電極を薄
膜に圧接する。
■ Bring the probe into contact with the thin film, or press a moon-shaped electrode against the thin film.

■ 導電性ペーストを薄膜に塗付する。■ Apply conductive paste to a thin film.

一方、導電性を有する導体薄膜、特に有機薄膜のバニ成
方法としては、従来ラングミュア・プロジェット法(1
,B法)(例えば、新実験化学講座、第18章498頁
〜507頁、丸善刊などを参照)と呼ばれる単分子膜累
積法が一般に知られている。このLB法は、親木基と疎
水基を併有する分子を水面上に展開し、面密度を適宜増
してゆくと、親水□性と疎水性のバランスが適当な場合
には、部分jが未面にで親水基を□下に向け、疎水基を
にに向けて単分子膜を形成することを利用して膜形成を
行なうものである。
On the other hand, the conventional Langmuir-Prodgett method (1
, B method) (see, for example, New Experimental Chemistry Course, Chapter 18, pp. 498-507, published by Maruzen), is generally known. In this LB method, molecules having both a parent tree group and a hydrophobic group are spread on the water surface and the areal density is increased appropriately.If the balance between hydrophilicity and hydrophobicity is appropriate, part j is Film formation is performed by forming a monomolecular film with the hydrophilic groups facing downward and the hydrophobic groups facing downward.

すなわち、このような分子は 次元粒子系として振舞い
、分子の面密度が低い場合には、一分子当りの面積(分
子占有面積)と表面圧の間には二次元理想気体の状態方
程式が成り立つ「気体膜」となるが、表面圧を1−げ分
子の面密度を高くすると、分子間の相互作用が強まり、
二次元固体の「凝縮膜(または固体膜)」となる。この
凝縮膜は分子の配列、配向がきれいにそろい、高度な秩
序性及び均一性を有している。そして、この凝縮膜はガ
ラス等の基板に移しとることができ、同一基板に重ねて
複数回屯分子膜を移し取ることによって、単分子累積膜
が得られる。このようにして得られる東分子累禎膜は、
高度の秩序性を有した極めて良質の膜となる。基板への
移し取りの方法としては、垂直浸漬法、水平付着法、回
転ドラム法などが知られている。
In other words, such molecules behave as a dimensional particle system, and when the surface density of molecules is low, a two-dimensional ideal gas equation of state holds between the area per molecule (molecular occupied area) and the surface pressure. However, when the surface pressure is lowered and the surface density of molecules is increased, the interaction between molecules becomes stronger,
It becomes a two-dimensional solid "condensation film (or solid film)." This condensed film has a well-aligned molecular arrangement and orientation, and has a high degree of order and uniformity. This condensed film can then be transferred to a substrate such as glass, and a monomolecular cumulative film can be obtained by stacking and transferring the monomolecular film multiple times onto the same substrate. The East Molecule Metallurgy membrane obtained in this way is
This results in an extremely high quality film with a high degree of order. Known methods for transferring to a substrate include a vertical dipping method, a horizontal adhesion method, and a rotating drum method.

ところで、導電性を有する有機化合物としては、例えば
特開昭60−246357に開示されであるような電荷
移動錯体を有する高分子化合物が代表的なものとして挙
げられ、これら化合物は基本的には電荷移動錯体な親水
性部位とし、長鎖アルキル基を疎水性部位として、分子
内に親水性および疎水性の画部分を併有する。そして、
このような分子を用いてLB法で作成した有機薄膜は、
凝縮膜の状態では、親水性部位を構成する電荷移動錯体
の電子雲の重なりか大きくなり、膜面に平行な方向に導
電性を示し、同時に疎水性部位を構成する長鎖アルキル
基は絶縁体部を形成する。したがって基板上に得られた
累積膜は導電層と絶縁層とが交互に積層された構成とな
る。
Incidentally, typical examples of organic compounds having electrical conductivity include polymer compounds having a charge transfer complex as disclosed in JP-A No. 60-246357. The hydrophilic moiety is a mobile complex, and the long-chain alkyl group is the hydrophobic moiety, and the molecule has both hydrophilic and hydrophobic fractions. and,
Organic thin films created by the LB method using such molecules are
In the state of a condensed film, the overlap of the electron clouds of the charge-transfer complexes that make up the hydrophilic sites becomes large, exhibiting conductivity in the direction parallel to the film surface, and at the same time, the long-chain alkyl groups that make up the hydrophobic sites become insulators. form a section. Therefore, the cumulative film obtained on the substrate has a structure in which conductive layers and insulating layers are alternately laminated.

このような導電性薄膜においては膜面の法線方向への伝
導度が極めて低く、」−記■、■の方法では、膜表面に
露出した導電層の1層にしか電流を流すことができず、
絶縁層によって隔てられた他の導電層を電流経路として
利用することができなかった。また、■、■の方法を用
いると、導電層の全てを電流経路として利用できる一=
方で、機械的な膜の破損や溶剤などによる化学的な膜の
破壊束じることがあった。更に、電極と接触する各導電
層の末端は薄く形成されているため、電極と十分に接触
することができず、場合によっては 部の導電層が電極
と接触しない導通不良を生じることかあった。
In such a conductive thin film, the conductivity in the direction normal to the film surface is extremely low, and in the methods described in ``--■ and ■, current can only be passed through one layer of the conductive layer exposed on the film surface. figure,
Other conductive layers separated by the insulating layer could not be used as current paths. Furthermore, by using methods ① and ②, the entire conductive layer can be used as a current path.
On the other hand, there have been cases where the membrane has been damaged mechanically or chemically due to solvents or the like. Furthermore, since the ends of each conductive layer that come into contact with the electrodes are formed thin, they cannot make sufficient contact with the electrodes, and in some cases, conductivity failures may occur where the conductive layer does not come into contact with the electrodes. .

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

本発明は、に記従来例の問題点に鑑み成されたものであ
って、本発明の主たる目的は、1−記従来例の電極の付
設方法の欠点を解消し、導体への電極の付設方法、特に
導体薄膜をエレクトロニクス分野、中でも分子エレクト
ロニクス分野に適用するに好適な新規な電極の付設方法
を提供することにある。
The present invention has been made in view of the problems of the conventional method described in 1. The main objects of the present invention are 1. The object of the present invention is to provide a novel method for attaching electrodes, which is suitable for applying a conductor thin film to the field of electronics, especially to the field of molecular electronics.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の上記目的は、以下の本発明によって達成される
The above objects of the present invention are achieved by the present invention as follows.

すなわち本発明は、導電層と絶縁層が交互に積層された
積層構成を有する導体に電極を付設する電極の付設方法
において、前記絶縁層によって隔てられた各導電層の末
端を階段状に形成し、該階段状の部分に電極を付設する
ことを特徴とする電極の付設方法である。
That is, the present invention provides an electrode attaching method for attaching electrodes to a conductor having a laminated structure in which conductive layers and insulating layers are alternately laminated, in which the ends of each conductive layer separated by the insulating layer are formed in a stepped shape. , is an electrode attaching method characterized by attaching an electrode to the stepped portion.

〔作 用〕[For production]

本発明においては、例えば後述する第2図、第3図ある
いは第5図に示すように、導体の末端が階段状とされ、
該階段状の部分に電極が付設される。このため、電極が
付設される導体末端部における導電層の露出面積が増大
し、電極と該電極が付設される導電層との接触面積が増
大して、従来のような絶縁層によって隔てられる各導電
層間に導通不良を生じることがない。また、電極との接
触面積の増大により導電層と電極との接触強度も増大す
るので電極はがれ等を生じることもない。
In the present invention, for example, as shown in FIG. 2, FIG. 3, or FIG.
Electrodes are attached to the stepped portion. Therefore, the exposed area of the conductive layer at the end of the conductor to which the electrode is attached increases, and the contact area between the electrode and the conductive layer to which the electrode is attached increases. No conduction failure occurs between conductive layers. Further, since the contact strength between the conductive layer and the electrode increases due to the increase in the contact area with the electrode, peeling of the electrode does not occur.

本発明の好適な一実施態様においては、上記の如き末端
が階段状を呈する導体薄膜が、LB法を利用して形成さ
れる。具体的には、例えば前述の如き導電性を有する有
機高分子を18法によって基板に移しとる際、その凝縮
膜の移しとりを垂直浸漬法によって行ない、基板の上下
動の折り返し位置をしだいに基板中央部へ移動させるこ
とにより、薄膜末端を階段状にするのである。もちろん
、水平付着法や回転ドラム法によることも可能であリ、
水平付着法による場合は、移しとる凝縮膜の広がり面積
を1回毎に縮めながら膜形成を行なって、末端を階段状
にするとよい。また、回転ドラム法による場合は、」−
記垂直浸漬法と同様に基板の回転幅を徐々に減じながら
膜形成を行なうとよい。
In a preferred embodiment of the present invention, a conductive thin film having stepped ends as described above is formed using the LB method. Specifically, when transferring a conductive organic polymer to a substrate using the above-mentioned 18 method, for example, the condensed film is transferred by a vertical dipping method, and the turning position of the substrate as it moves up and down is gradually adjusted to the substrate. By moving it to the center, the ends of the thin film are made to have a stepped shape. Of course, it is also possible to use the horizontal adhesion method or the rotating drum method.
In the case of the horizontal deposition method, the film is formed while reducing the spread area of the transferred condensed film each time, so that the ends are shaped like steps. In addition, when using the rotating drum method,
As with the vertical immersion method described above, it is preferable to form a film while gradually reducing the rotation width of the substrate.

導電性を有する有機化合物としては、下記の1)〜13
)に例示するようなものが具体的なものとして挙げられ
る。
Examples of organic compounds having conductivity include the following 1) to 13.
) are listed as specific examples.

RR HH RR (但し、上記式中のRは直鎖アルキル基、好適には炭素
原子数が8〜30程度)を表わし、TCNQはの数を表
わし、Xはハロゲン原子またはeF6−等を表わす。) このようにして階段状に形成された薄膜末端に電極を付
設する方法としては、前述の如き機械的あるいは化学的
な膜の破損の防止を考慮すると、例えば蒸着、スパッタ
リング、化学気相堆積法(CVD法)等の膜形成方法に
よって該階段状部分に所望パターンの電極を積層するの
がよい。電極材質としては各種の金属が好適であるが、
導電性を有するものであれば有機質のものでも無機質の
ものでもよい。
RR HH RR (wherein R in the above formula represents a straight chain alkyl group, preferably about 8 to 30 carbon atoms), TCNQ represents the number of, and X represents a halogen atom or eF6- or the like. ) Methods for attaching electrodes to the ends of the thin film formed in a stepwise manner include, for example, evaporation, sputtering, and chemical vapor deposition, taking into consideration the prevention of mechanical or chemical damage to the film as described above. It is preferable to laminate electrodes in a desired pattern on the stepped portion by a film forming method such as (CVD method). Various metals are suitable as electrode materials, but
It may be organic or inorganic as long as it has conductivity.

尚、上記においては特に説明しなかったが、各導電層お
よび絶縁層を無機質のもので構成する場合には、例えば
上記蒸着、スパッタリング、化学気相堆積法(CVD法
)等の膜形成方法を利用して各導電層および絶縁層の形
成を行ない、これら各・層を形成するに際してマスクパ
ターンやレジストなどを用いて末端部を階段状にパター
ニングするとよい。
Although not specifically explained above, when each conductive layer and insulating layer is made of an inorganic material, a film forming method such as the above-mentioned vapor deposition, sputtering, or chemical vapor deposition method (CVD method) may be used. When forming each conductive layer and insulating layer, the end portions are preferably patterned in a stepwise manner using a mask pattern, a resist, or the like.

このような本発明の方法によれば、機械的あるいは化学
的な膜の破損を起すことなく、電極の形成を行なうこと
ができるとともに、多数の導電層を電流経路として有効
に利用することができる。
According to the method of the present invention, electrodes can be formed without causing mechanical or chemical damage to the film, and a large number of conductive layers can be effectively used as current paths. .

〔実施例〕〔Example〕

以下に本発明の実施例を示す。 Examples of the present invention are shown below.

実施例1 を記式(1)で示されるビスーテトラシアノキノジメタ
ンドコシルピリジニウムをアセトニトリルとベンゼンの
1層1混合溶媒に1 mg/ vlの濃度テ溶かした後
、KIICO3でpl+6.8に調整されたCdCff
1.濃度4 X 10−4mo1742の水相(水温1
7℃)上に展開した。
Example 1 After dissolving bis-tetracyanoquinodimethandocylpyridinium represented by formula (1) in a mixed solvent of acetonitrile and benzene in one layer at a concentration of 1 mg/vl, the solution was adjusted to pl+6.8 with KIICO3. CdCff
1. Water phase with concentration 4 x 10-4 mo1742 (water temperature 1
7°C).

尚、この式(T)で示される分子は、 を親水性部位とし、Clh 4c112+−71−を疎
水性部位として、分子内に疎水性および親水性の画部分
を併有するもので、該分子が構成する単分子累積膜は疎
水性部位が絶縁層を、親水性部位が導電層を形成する。
The molecule represented by this formula (T) has both hydrophobic and hydrophilic fractions in the molecule, with Clh 4c112+-71- being the hydrophilic site and Clh 4c112+-71- being the hydrophobic site. In the constituent monomolecular cumulative film, hydrophobic sites form an insulating layer, and hydrophilic sites form a conductive layer.

次いで、溶媒のアセトニトリルとベンゼンを蒸発除去し
た後、表面圧を20dyn/cn+まで高めて単分子膜
を形成した。表面圧を一定に保ちながら、あらかじめ水
相中に浸漬しておいた清浄なガラス基板を水面を横切る
方向に速度10mm/分で静かに201[ll程度引き
上げ、続いて速度10mm/分で静かに20111m浸
漬し、2層の単分子膜を基板上に累積した。次に、」−
記と同様の引き上げ速度10mm/分で再度基板の引き
上げを行なうが、今回は基板の引き上げ距離を前回より
も0.5mmだけ短くし、続いて速度10mm/分で静
かに基板を浸漬し、に記2層の嚇分子累積股上に更に2
層の単分子累積膜を積層した(第1図参照)。このよう
にして基板の引きにげ距離を1回毎に0.5++onず
つ短縮する成膜操作を縁り返し、111層目引きI−げ
操作を終Yした時点で水面にの東分子膜を完全に除去し
たトで基板を完全に引きトげ、第2図に示すように疎水
性部位4と親水性部位5とが交互に整然と配列し、疎水
性部位4が構成する絶縁層2と親水性部位5か構成する
導電層3とが交互に基板1十に形成された計21層から
なる単分子累積膜を基板1上に得た。この際、21層目
の膜は第2図に示すように絶縁層2を露出したものとし
て形成されているが、もちろん基板の浸漬操作終了後に
、水面の単分子膜を完全に除去して基板を完全に引き上
げることにより、導電層3の露出状態で成膜操作を終了
しても良い。
Next, after the solvents acetonitrile and benzene were removed by evaporation, the surface pressure was increased to 20 dyn/cn+ to form a monomolecular film. While keeping the surface pressure constant, a clean glass substrate that had been previously immersed in the water phase was gently raised to about 201 liters in a direction across the water surface at a speed of 10 mm/min, and then gently raised at a speed of 10 mm/min. The substrate was immersed for 20111 m, and two monolayers were accumulated on the substrate. Next,”−
The board was pulled up again at the same pulling speed of 10 mm/min as described above, but this time, the distance the board was pulled up was 0.5 mm shorter than the previous time, and then the board was gently immersed at a speed of 10 mm/min. In addition to the cumulative rise of threatening molecules in the above two layers,
A monomolecular cumulative film of layers was laminated (see Figure 1). In this way, the film forming operation is repeated to shorten the pulling distance of the substrate by 0.5++on each time, and when the pulling operation for the 111th layer is completed, the eastern molecular film is deposited on the water surface. After completely removing the substrate, the substrate is completely pulled out, and as shown in FIG. A monomolecular cumulative film consisting of 21 layers in total was obtained on the substrate 1, in which the conductive layers 3 constituting the sexual sites 5 were alternately formed on the substrate 10. At this time, the 21st layer film is formed with the insulating layer 2 exposed as shown in Figure 2, but of course after the substrate immersion operation is completed, the monomolecular film on the water surface is completely removed and the substrate is exposed. By completely pulling up the conductive layer 3, the film forming operation may be completed with the conductive layer 3 exposed.

このようにして基板上に得られる単分子累積膜は、その
水面に近い側が第2図に示す如くに階段状を呈し、第3
図に示すように導電層3の一部(図中に符合7で示す部
分)が露出したものとなる。この階段状の部分の両端に
電極6としてのアルミニウムを幅2mm、厚さ2000
人蒸着することにより、末端を階段状に形成した導体へ
の電極6の付設を行なった。こうして得られた導体は、
絶縁層2によって隔てられた各導電層3の全てに電極6
が接続され、これら導電層2の全てを電流経路として有
効利用することができた。両電極間の抵抗を測定したと
ころ約10にΩであり、この値は最」二層の導電層のみ
を電流経路とした場合の抵抗値約200にΩと比して極
めて小さなものであった。
The monomolecular cumulative film thus obtained on the substrate has a stepped shape on the side near the water surface, as shown in FIG.
As shown in the figure, a part of the conductive layer 3 (the part indicated by reference numeral 7 in the figure) is exposed. Aluminum electrodes 6 with a width of 2 mm and a thickness of 2,000 mm are placed on both ends of this stepped portion.
The electrode 6 was attached to the conductor whose end was formed into a stepped shape by manual vapor deposition. The conductor thus obtained is
An electrode 6 is provided on each conductive layer 3 separated by an insulating layer 2.
were connected, and all of these conductive layers 2 could be effectively used as current paths. When the resistance between the two electrodes was measured, it was approximately 10Ω, which was extremely small compared to the resistance value of approximately 200Ω when only the two conductive layers were used as the current path. .

尚、本例では導体を東分子累積膜で形成したが、このよ
うな単分子累積膜を重合して得られる昨分子重合膜にも
本発明は適用し得るものである。
In this example, the conductor is formed of a monomolecular cumulative film, but the present invention can also be applied to a molecular polymer film obtained by polymerizing such a monomolecular cumulative film.

実施例2 実施例1において階段状とした導体末端部の反対側をも
階段状とするために、以Fの手順で成膜操作を行なう以
外は実施例1と同様にして、基板上に式(1)の分子よ
りなる単分子−累積膜を形成した。
Example 2 In order to make the opposite end of the conductor which was made into a step shape in Example 1 also have a step shape, a formula was formed on the substrate in the same manner as in Example 1 except that the film forming operation was performed in accordance with the procedure F below. A monomolecular cumulative film consisting of molecules of (1) was formed.

まず、第4図に示すように実施例1と同様の手順で基板
を図中に符合aで示される位置から符合すで示される位
置まで引き上げた後、再度位置すからCまで浸漬するこ
とにより、基板上に2層の単分子累積膜を得た。次いで
、第4図に符合Cからdに示すように基板を水相中に浸
漬したままの状態で、水面の単分子膜を完全に除去した
後、第4図に符合dからeで示すように基板を0.5m
m引き上げた。その後、再び成膜分子を展開し、表面圧
を高めた一Lで、基板の引きトげ(fからg)と浸漬(
gからh)を行なった。ただし、基板の引き」二げ停止
位置は、前回の引き上げ停止位置よりもQ’、5n+o
+たけ低くするのは実施例1と同様である(すなわち、
前回の停止位置がbであれば、次回の停止位置gを前回
の停止位置すより0.511II11だけ低くする)。
First, as shown in FIG. 4, the substrate is lifted from the position indicated by the symbol a to the position indicated by the symbol in the figure in the same manner as in Example 1, and then immersed again until it reaches the position C. , a two-layer monomolecular cumulative film was obtained on the substrate. Next, with the substrate still immersed in the water phase, the monomolecular film on the water surface was completely removed, as shown by C to d in FIG. 0.5m of board
I pulled it up m. After that, the film-forming molecules are expanded again and the surface pressure is increased by 1L, and the substrate is pulled up (from f to g) and immersed (
g to h) were performed. However, the pulling stop position of the board is Q', 5n+o more than the previous pulling stop position.
+ lowering is the same as in Example 1 (i.e.,
If the previous stop position is b, the next stop position g is lower than the previous stop position by 0.511II11).

以上の手順をくり返し11回目の引き一ヒげ操作を終了
した時点で、水面の単分子膜を完全に除去した後、基板
を完全に引き上げて、第5図に示すように絶縁層2と導
電層3が交互に積層され、しかもその両端が階段トに形
成された計21層の単分子累積膜を基板1−トに得た。
After repeating the above steps and completing the 11th pulling operation, the monomolecular film on the water surface is completely removed, the substrate is completely pulled up, and the insulating layer 2 is connected to the conductive layer as shown in Figure 5. A monomolecular cumulative film of 21 layers in total was obtained on the substrate 1, in which the layers 3 were alternately laminated and both ends thereof were formed in steps.

次に、この階段状部分のそれぞれ全面に厚さ2000人
にアルミニウムを蒸着してアルミニウム電極6を形成し
た。尚、両電極間の距離は最短部分で約5[[1mであ
り、電極間の抵抗は約IKΩであった。
Next, aluminum was deposited to a thickness of 2,000 yen on the entire surface of each of the stepped portions to form aluminum electrodes 6. The distance between the two electrodes was approximately 5 [[1 m] at the shortest point, and the resistance between the electrodes was approximately IKΩ.

実施例3 第6図に示すように、ガラス基板1上に予め所望パター
ンの電極8を形成した後、実施例1あるいは実施例2に
例示の成膜操作により、該基板1に末端が階段状に形成
された単分子累積膜を得た。次いで、この階段状の部分
に上記実施例1あるいは実施例2と同様の操作でアルミ
ニウム電極6を付設することにより、末端を階段状に形
成した導体への電極6の付設を行なった。こうして得ら
れた導体は、最下層の導電層との接触が良くなり、電極
の付設がより容易になった。
Example 3 As shown in FIG. 6, after forming an electrode 8 in a desired pattern on a glass substrate 1 in advance, the film forming operation illustrated in Example 1 or Example 2 is performed to form a step-shaped end on the substrate 1. A monomolecular cumulative film was obtained. Next, an aluminum electrode 6 was attached to this step-like portion in the same manner as in Example 1 or Example 2, thereby attaching the electrode 6 to the conductor whose end was formed into a step-like shape. The conductor thus obtained had better contact with the lowermost conductive layer, making it easier to attach electrodes.

〔発明の効果〕〔Effect of the invention〕

以上に説明した如く、本発明では導体の末端が階段状と
され、該階段状の部分に電極か付設される。このため、
電極が付設される導体末端部における導電層の露出面積
が増大し、電極と該電極が付設される導電層との接触面
積が増大して、従来のような絶縁層によって隔てられる
各導電層間に導通不良を生じることがない。また、電極
との接触面積の増大により導電層と電極との接触強度も
増大するので電極はがれ等を生じることもない。
As explained above, in the present invention, the end of the conductor is stepped, and an electrode is attached to the stepped portion. For this reason,
The exposed area of the conductive layer at the end of the conductor to which the electrode is attached is increased, and the contact area between the electrode and the conductive layer to which the electrode is attached is increased. No conduction failure occurs. Further, since the contact strength between the conductive layer and the electrode increases due to the increase in the contact area with the electrode, peeling of the electrode does not occur.

本発明によって、導体、特に有機導電性薄膜に機械的あ
るいは化学的な損傷を与えることなく電極を行なうこと
が可能で、エレクトロニクス分野□、中でも分子エレク
トロニクス分野の発展に寄与、貢献することが可能な新
規な電極の付設方法が提供される。
The present invention makes it possible to conduct electrodes without mechanically or chemically damaging conductors, especially organic conductive thin films, and contributes to the development of the field of electronics, especially the field of molecular electronics. A novel electrode attachment method is provided.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、1.方法を適用して導体末端を階段状にする
場合の基板の成膜操作の一例を説明する図、第2図乃至
第3図は本発明の=一実施態様を説明する図であり、そ
れぞれ第2図には基板上に階段状に形成された単分子累
積膜に電極が付設された状態を説明する基板の断面図が
示され、第3図には第2図の斜視図が示されており、第
4図はLB法を′適用して導体末端を階段状にする場合
の基板の成膜操作の別の例を説明する図、第5図は本発
明の別の実施態様を説明する図、第6図は本発明の更に
別の実施態様を説明する図である。 1・・・基板      2・・・絶縁層3・・・導電
層 4・・・成膜分子の疎水性部位 5・・・成膜分子の親水杯部位 6.8・・・電極 7・・・導電層の露出部分
Figure 1 shows 1. Figures 2 and 3 are diagrams illustrating one embodiment of the present invention; FIG. 2 shows a cross-sectional view of the substrate to explain the state in which electrodes are attached to a monomolecular cumulative film formed in a stepped manner on the substrate, and FIG. 3 shows a perspective view of FIG. 2. FIG. 4 is a diagram illustrating another example of the film-forming operation on the substrate when the conductor ends are made into a stepped shape by applying the LB method, and FIG. 5 is a diagram illustrating another embodiment of the present invention. FIG. 6 is a diagram illustrating still another embodiment of the present invention. 1...Substrate 2...Insulating layer 3...Conductive layer 4...Hydrophobic site of film-forming molecule 5...Hydrophilic cup site of film-forming molecule 6.8...Electrode 7... Exposed portion of conductive layer

Claims (1)

【特許請求の範囲】[Claims] (1)導電層と絶縁層が交互に積層された積層構成を有
する導体に電極を付設する電極の付設方法において、前
記絶縁層によって隔てられた各導電層の末端を階段状に
形成し、該階段状の部分に電極を付設することを特徴と
する電極の付設方法。
(1) An electrode attaching method in which an electrode is attached to a conductor having a laminated structure in which conductive layers and insulating layers are alternately laminated, in which the ends of each conductive layer separated by the insulating layer are formed in a stepped shape, and An electrode attachment method characterized by attaching an electrode to a stepped portion.
JP61088151A 1986-04-16 1986-04-18 Attaching method for electrode Pending JPS62245629A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP61088151A JPS62245629A (en) 1986-04-18 1986-04-18 Attaching method for electrode
US07/038,722 US4835083A (en) 1986-04-16 1987-04-15 Method for patterning electroconductive film and patterned electroconductive film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61088151A JPS62245629A (en) 1986-04-18 1986-04-18 Attaching method for electrode

Publications (1)

Publication Number Publication Date
JPS62245629A true JPS62245629A (en) 1987-10-26

Family

ID=13934930

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61088151A Pending JPS62245629A (en) 1986-04-16 1986-04-18 Attaching method for electrode

Country Status (1)

Country Link
JP (1) JPS62245629A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5077228A (en) * 1989-12-01 1991-12-31 Texas Instruments Incorporated Process for simultaneous formation of trench contact and vertical transistor gate and structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5077228A (en) * 1989-12-01 1991-12-31 Texas Instruments Incorporated Process for simultaneous formation of trench contact and vertical transistor gate and structure

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