JPS621237U - - Google Patents
Info
- Publication number
- JPS621237U JPS621237U JP9176885U JP9176885U JPS621237U JP S621237 U JPS621237 U JP S621237U JP 9176885 U JP9176885 U JP 9176885U JP 9176885 U JP9176885 U JP 9176885U JP S621237 U JPS621237 U JP S621237U
- Authority
- JP
- Japan
- Prior art keywords
- timer counter
- data
- signal
- preset
- timer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Electric Clocks (AREA)
- Measurement Of Predetermined Time Intervals (AREA)
Description
第1図は本考案の実施例を示すブロツク図、第
2図は第1図に示された実施例の動作を示すタイ
ミング図、第3図は従来例を示すブロツク図、第
4図は第3図の動作を示すタイミング図である。
6…タイマーカウンタ、7…ORゲート、8…
データ再設定用レジスタ、9…データバス、10
…パルス発生回路。
FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a timing diagram showing the operation of the embodiment shown in FIG. 1, FIG. 3 is a block diagram showing a conventional example, and FIG. 4 is a timing diagram showing the operation of FIG. 3; FIG. 6...Timer counter, 7...OR gate, 8...
Data resetting register, 9...Data bus, 10
...Pulse generation circuit.
Claims (1)
クロツクパルスに基いて計数するタイマーカウン
タと、該タイマーカウンタの計数を開始させるス
タート制御信号及び前記タイマーカウンタの計数
終了を示す終了信号の論理和信号を作成し、該論
理和信号により前記タイマーカウンタへのデータ
プリセツトを制御するゲート回路と、前記タイマ
ーカウンタへプリセツトすべきデータを保持する
データ再設定用レジスタとを備え、前記スタート
制御信号あるいは終了信号発生時にデータ再設定
用レジスタのデータが前記タイマーカウンタにプ
リセツトされることを特徴とするマイクロコンピ
ユータのタイマー装置。 A timer counter that counts a count value determined by preset data based on a clock pulse, a start control signal that starts counting of the timer counter, and an end signal that indicates the end of counting of the timer counter, and an OR signal is created. , a gate circuit that controls data presetting to the timer counter based on the OR signal, and a data resetting register that holds data to be preset to the timer counter, when the start control signal or end signal is generated. A timer device for a microcomputer, characterized in that data in a data resetting register is preset in the timer counter.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9176885U JPS621237U (en) | 1985-06-18 | 1985-06-18 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9176885U JPS621237U (en) | 1985-06-18 | 1985-06-18 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS621237U true JPS621237U (en) | 1987-01-07 |
Family
ID=30647949
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9176885U Pending JPS621237U (en) | 1985-06-18 | 1985-06-18 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS621237U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013117492A (en) * | 2011-12-05 | 2013-06-13 | Seiko Epson Corp | Timer device and electronic apparatus |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50116147A (en) * | 1974-02-25 | 1975-09-11 |
-
1985
- 1985-06-18 JP JP9176885U patent/JPS621237U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50116147A (en) * | 1974-02-25 | 1975-09-11 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013117492A (en) * | 2011-12-05 | 2013-06-13 | Seiko Epson Corp | Timer device and electronic apparatus |
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