JPS6135548A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS6135548A JPS6135548A JP59155228A JP15522884A JPS6135548A JP S6135548 A JPS6135548 A JP S6135548A JP 59155228 A JP59155228 A JP 59155228A JP 15522884 A JP15522884 A JP 15522884A JP S6135548 A JPS6135548 A JP S6135548A
- Authority
- JP
- Japan
- Prior art keywords
- film
- substrate
- capacitor
- dielectric constant
- oxide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 239000004065 semiconductor Substances 0.000 title claims description 5
- 239000000758 substrate Substances 0.000 claims abstract description 10
- 230000001590 oxidative effect Effects 0.000 claims abstract description 3
- 238000000034 method Methods 0.000 claims description 11
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 claims description 3
- 229910001936 tantalum oxide Inorganic materials 0.000 claims description 3
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 2
- XHCLAFWTIXFWPH-UHFFFAOYSA-N [O-2].[O-2].[O-2].[O-2].[O-2].[V+5].[V+5] Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[V+5].[V+5] XHCLAFWTIXFWPH-UHFFFAOYSA-N 0.000 claims description 2
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 2
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims description 2
- 229910000484 niobium oxide Inorganic materials 0.000 claims description 2
- URLJKFSTXLNXLG-UHFFFAOYSA-N niobium(5+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Nb+5].[Nb+5] URLJKFSTXLNXLG-UHFFFAOYSA-N 0.000 claims description 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 2
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 claims description 2
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 claims description 2
- 229910001935 vanadium oxide Inorganic materials 0.000 claims description 2
- 229910001928 zirconium oxide Inorganic materials 0.000 claims description 2
- 239000000470 constituent Substances 0.000 claims 1
- 239000003990 capacitor Substances 0.000 abstract description 30
- 239000010408 film Substances 0.000 abstract description 24
- 230000007547 defect Effects 0.000 abstract description 13
- 229910052760 oxygen Inorganic materials 0.000 abstract description 8
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract description 7
- 239000001301 oxygen Substances 0.000 abstract description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 6
- 238000010438 heat treatment Methods 0.000 abstract description 5
- 238000007254 oxidation reaction Methods 0.000 abstract description 5
- PBCFLUZVCVVTBY-UHFFFAOYSA-N tantalum pentoxide Inorganic materials O=[Ta](=O)O[Ta](=O)=O PBCFLUZVCVVTBY-UHFFFAOYSA-N 0.000 abstract description 5
- 230000003647 oxidation Effects 0.000 abstract description 4
- 238000004544 sputter deposition Methods 0.000 abstract description 4
- 229910052681 coesite Inorganic materials 0.000 abstract description 3
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 3
- 238000005546 reactive sputtering Methods 0.000 abstract description 3
- 239000000377 silicon dioxide Substances 0.000 abstract description 3
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 3
- 229910052682 stishovite Inorganic materials 0.000 abstract description 3
- 229910052905 tridymite Inorganic materials 0.000 abstract description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 abstract description 2
- 229910001873 dinitrogen Inorganic materials 0.000 abstract description 2
- 239000007789 gas Substances 0.000 abstract description 2
- 239000010409 thin film Substances 0.000 abstract description 2
- 230000001939 inductive effect Effects 0.000 abstract 1
- 238000000137 annealing Methods 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- 230000007423 decrease Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 3
- 229910001882 dioxygen Inorganic materials 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 239000010955 niobium Substances 0.000 description 2
- 102000008186 Collagen Human genes 0.000 description 1
- 108010035532 Collagen Proteins 0.000 description 1
- 229910004140 HfO Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229920001436 collagen Polymers 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 229910052762 osmium Inorganic materials 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 239000010902 straw Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
- Formation Of Insulating Films (AREA)
- Semiconductor Memories (AREA)
Abstract
Description
【発明の詳細な説明】
Ｃ発明の利用分野〕
本発明は大規模集積回路（ＬＳＩ）用キャパシタの製造
方法に係り、特に誘電体膜が薄くなっても良好な８８耐
圧を有するキャパシタの製造方法に関する。[Detailed Description of the Invention] C. Field of Application of the Invention] The present invention relates to a method for manufacturing a capacitor for a large-scale integrated circuit (LSI), and in particular a method for manufacturing a capacitor that has a good 88 withstand voltage even when the dielectric film is thin. Regarding.
ＬＳＩ、特にバイポーラメモリにおいては高速動作を行
ったり、α線によるソフトエラーの発生を防止するため
にプリッププロップ型メモリセルの負荷抵抗に並列にキ
ャパシタを形成することは特開昭５３−４３４８５号に
記載されているように周知の事実である。Japanese Patent Laid-Open No. 53-43485 describes the formation of a capacitor in parallel with the load resistance of a flip-prop type memory cell in order to achieve high-speed operation in LSI, especially bipolar memory, and to prevent the occurrence of soft errors due to alpha rays. As stated, it is a well-known fact.
上記バイポーラメモリ用キャパシタは現在ショットキバ
リアダイオードの接合容量を利用している。しかし、上
記ショットキバリアダイオードの容量密度は最大３．４
ｆＦ／μｍ２程度であり、上記メモリセルが高速かつα
線によるソフトエラーを発生せずに動作するためには、
上記キャパシタは１個当り０．５ Ｐ Ｆ程度の静電容
量が必要である。The bipolar memory capacitor currently uses the junction capacitance of a Schottky barrier diode. However, the maximum capacitance density of the Schottky barrier diode is 3.4
fF/μm2, and the above memory cell is high speed and α
In order to operate without generating soft errors due to lines,
Each of the above capacitors requires a capacitance of about 0.5 PF.
したがって、１個のキャパシタの面積はショットキダイ
オードのみを用いた場合には約１５０μｍ２にもなって
しまい、メモリセルの面積の大部分を占有してしまい高
集積化の大きな障害となっていた。Therefore, when only a Schottky diode is used, the area of one capacitor is about 150 μm2, which occupies most of the area of the memory cell and becomes a major obstacle to high integration.
しかし、キャパシタを導入する場合、メモリセルの設計
上の問題から、メモリセルを縮小するためには、少なく
とも容量密度は７．０ ｆ Ｆ／μｍ２以上あることが
望ましい。However, when introducing a capacitor, it is desirable that the capacitance density be at least 7.0 f F/μm 2 or more in order to reduce the size of the memory cell due to problems in designing the memory cell.
上記キャパシタ材の一つとして熱酸化膜が考えられるが
、熱酸化膜では比誘電率が３．８ と小さいため、７．
０ｆＦ／μｍ程度の容量密度を得るためには熱酸化膜の
膠原は５０人程度となって、現在の熱酸化技術ではＬＳ
Ｉ用キャパ−シタ材として充分に欠陥密度の低い絶Ｒ膜
を得ることが難しかった。A thermal oxide film can be considered as one of the above capacitor materials, but since the relative dielectric constant of a thermal oxide film is as small as 3.8, 7.
In order to obtain a capacitance density of about 0 fF/μm, the collagen of the thermal oxide film must be about 50, and with the current thermal oxidation technology, the LS
It has been difficult to obtain an absolute R film with a sufficiently low defect density as an I capacitor material.
従って、充分低い欠陥密度を持ちかつ所望静電容量を持
つキャパシタを得る一つの方法として、Ｓｉ基板上のＳ
ｉｎ、上に、比誘電率の大きい、Ｔａ、Ｏ，、Ｔｉｅ、
Ｎｂ、Ｏｓ、ＨｆＯ，等の高誘電率材料膜をｆｅＷＪす
ることによって容量の減少を少なくしてピンホールを減
少させることが考えられる。Therefore, one way to obtain a capacitor with a sufficiently low defect density and a desired capacitance is to
in, on top, Ta, O,, Tie, with a large dielectric constant,
It is possible to reduce the decrease in capacitance and pinholes by performing feWJ on a film made of a high dielectric constant material such as Nb, Os, HfO, etc.
しかし、上記の高誘電率絶縁膜はスパッタ法や反応性ス
パッタ法によって形成されることが多く。However, the above-mentioned high dielectric constant insulating film is often formed by a sputtering method or a reactive sputtering method.
下地のＳｉｎ、等にプラズマによるダメージを与えたり
、又、Ｓｉｎ、と高誘電率ｔ１３緑膜との界面の不整合
が大きい、高誘電率材料膜の化学的世論的組成比からの
ずれが生ずるなどと推測される原因によって、キャパシ
タの耐圧の落ちこぼれが生じ、ＬＳＩ用キャパシタの誘
電体として充分な信頼性が得られなかった。This may cause plasma damage to the underlying Sin, etc., or there may be a large mismatch at the interface between the Sin and the high dielectric constant T13 green film, or a deviation from the chemical composition ratio of the high dielectric constant material film may occur. Due to these presumed causes, the withstand voltage of the capacitor dropped, and sufficient reliability as a dielectric material for LSI capacitors could not be obtained.
また“ＫａｔｏらによるＳｙｍｐ、ＶＬＳＩ Ｔｈｅｃ
ｈｎｏｌ、Ｄｉｇ。Also, “Symp, VLSI Thec by Kato et al.
hnol, Dig.
Ｐａｐｅｒ、 （１９８３） 、ｐｐ、８６−８７”お
よび特開昭５９−４１４２号 −公報に示されている
ように、水蒸気中でのＴａ、Ｏｓ／ Ｓ ｉの酸化によ
ってＴａ２Ｏ，とＳｉの界面にＳｉｎ、を形成する方法
では、ＳｉＯ２単層膜よりも耐圧が高いキャパシタを形
成できるが、この界面に生成するＳｉＯ□が容量密度を
下げてしまい、Ｔａ、０．’ の高誘電率材料の特徴が
失われてしまうという欠点があった。Paper, (1983), pp. 86-87'' and JP-A No. 59-4142-8, the oxidation of Ta, Os/Si in water vapor causes the oxidation of TaO and Si at the interface. With the method of forming Si, a capacitor with a higher withstand voltage than a single SiO2 film can be formed, but the SiO□ generated at this interface lowers the capacitance density, and the characteristics of the high dielectric constant material of Ta, 0.' The disadvantage was that the information was lost.
本発明の目的は、上記従来技術の欠点に鑑み、静電容量
を減することなくキャパシタ用誘電体の欠陥密度を減ら
すことが可能な半導体の製造方法を提供することにある
。SUMMARY OF THE INVENTION In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a semiconductor manufacturing method that can reduce the defect density of a capacitor dielectric without reducing capacitance.
（発明の概要〕
本発明の概念は表面に薄い酸化膜を有するＳｉ基板上に
形成された高誘電串絶ｔ′？、膜を乾燥酸化性雰囲気中
で加熱することにより、高誘電率絶縁ＩＩＡとＳｉの界
面のＳｉｎ、の膵厚の増加を抑制し、諒Ｓｕｎ、のダメ
ージおよびＴａ、Ｏ，の特性を改善し、欠陥密度の少な
いキャパシタ用誘電体を形成することにある。(Summary of the Invention) The concept of the present invention is to create a high dielectric constant insulation IIA by heating the film in a dry oxidizing atmosphere. The object of the present invention is to suppress the increase in the thickness of the Si at the interface between Si and Si, improve the damage of the Si, and the properties of Ta, O, and form a dielectric for a capacitor with a low defect density.
以下、本発明の（π念を実施例にて説明する。 Hereinafter, the concept of the present invention will be explained using examples.
第１図に本発明の４１ス念を用いて形成したキャパシタ
の製造工程を断面図により説明する。FIG. 1 illustrates the manufacturing process of a capacitor formed using the 41st idea of the present invention using cross-sectional views.
第１図（ａ）に示すように、Ｓｉ基板１上のキャパシタ
が形成される領域の周辺に素子量分Ｆ４１絶縁膜２を形
成したのち、第り図（ｂ）〜に示ずように、Ｓｉ基板１
の表面を９５０℃で、窒素ガスで希釈された酸素ガスを
用いて酸化し、２０人程度のＳｉ０．３を形成する６次
に、第ｉｌｌ （ｃ）に示すように、Ｔａ２０５膜４を
１１０人程程度応性スパッタ法を用いて５ｉＯ２３上に
被着する。この反応性スパッタ法とは、Ｔａの金屑ター
ゲットを酸素ガスを含むアルゴンガスのプラズマ中でス
パッタするものである。この後、乾燥酸素雰囲気中で、
例えば８００℃、３０分程度アニールすると、Ｔａ−２
０、のスパッタのさい生じたＳｉＯ□３のダメージが回
復し、かつ、Ｔａｚ○、膜４も密な構造となり、比誘電
率が増大するとともに、Ｔａ、Ｏ，膜中の欠陥も回復す
るものと予想される。次に、第１図（ｄ）に示すように
、キャパシタの上部電極として、ＡＱ薄膜をパターニン
グ形成して、基板１とＡ、Ｑ電極５との間にキャパシタ
を形成する。As shown in FIG. 1(a), after forming the F41 insulating film 2 for the element amount around the region on the Si substrate 1 where the capacitor is formed, as shown in FIG. Si substrate 1
The surface of the Ta205 film 4 is oxidized at 950°C using oxygen gas diluted with nitrogen gas to form about 20 SiO. Deposited onto 5iO23 using a process-responsive sputtering method. In this reactive sputtering method, a Ta gold scrap target is sputtered in a plasma of argon gas containing oxygen gas. After this, in a dry oxygen atmosphere,
For example, when annealing at 800°C for about 30 minutes, Ta-2
The damage to SiO□3 that occurred during the sputtering of 0 is recovered, and the Taz○ film 4 also becomes a dense structure, the dielectric constant increases, and the defects in the Ta and O films are also recovered. It is expected to be. Next, as shown in FIG. 1(d), a capacitor is formed between the substrate 1 and the A and Q electrodes 5 by patterning an AQ thin film as the upper electrode of the capacitor.
第３図は、本発明の方法によって形成したキャパシタの
欠陥密度と上記の酸素アニール温度との関係を示す。第
３図よりわかるようにアニール温度が６００℃を越える
と欠陥密度は著しく減少する。なお、ここで欠陥とは、
キャパシタの面積が１ ｍｍ”のもので−Ａｎ電極５と
Ｓｉ基板１の間のリーク電流が１０−”Ａのときの電圧
が平均の電圧の１／２以下になっているものを示してい
る。FIG. 3 shows the relationship between the defect density of a capacitor formed by the method of the present invention and the above oxygen annealing temperature. As can be seen from FIG. 3, when the annealing temperature exceeds 600° C., the defect density decreases significantly. Note that the defect here means
The capacitor has an area of 1 mm" and the voltage when the leakage current between the -An electrode 5 and the Si substrate 1 is 10-"A is 1/2 or less of the average voltage. .
第４図は、上記キャパシタの加熱温度と容量密度の関係
を示している。加熱温度が４００℃までは容量密度はほ
とんど変化しないが、６００℃でわずかに減少し、７０
０℃以上で増加し、１０００℃で減少する。また、リー
ク電流は８００℃までは変化がなく １０００℃で減少
する。FIG. 4 shows the relationship between the heating temperature and capacitance density of the capacitor. The capacitance density hardly changes until the heating temperature reaches 400℃, but it decreases slightly at 600℃ and increases to 70℃.
It increases at temperatures above 0°C and decreases at 1000°C. Furthermore, the leakage current remains unchanged up to 800°C and decreases at 1000°C.
従って、本発明の乾燥酸素アニール法によって。Therefore, by the dry oxygen annealing method of the present invention.
容量の減少、リーク電流の増大がない状態で、欠陥密度
の著しく少ないＴａ、 Ｏ，／ Ｓ ＬＯ，／ Ｓ ｉ
型キャパシタを形成できる。Ta, O, / S LO, / Si with extremely low defect density without decreasing capacity or increasing leakage current
type capacitor can be formed.
本発明の実施例として、高誘電率絶縁膜として酸化タン
タルを用いて説明したが、酸化ニオビウム、酸化チタン
、酸化バナジウム、酸化ジルコニウム、酸化ハフニウム
、酸化アルミニウムあるいは、それらの混合物等を酸化
タンタルの代りに用いても同様の効果が期待できる。ま
た、熱処理の雰囲気として１本実施例では、乾燥酸素を
用いたが、その他Ａｒ、Ｎ、等で希釈された酸素ガスや
Ｎｏ２などを用いても本発明の概念は適用されることは
いうまでもない。In the embodiments of the present invention, tantalum oxide was used as the high dielectric constant insulating film, but niobium oxide, titanium oxide, vanadium oxide, zirconium oxide, hafnium oxide, aluminum oxide, or a mixture thereof may be used instead of tantalum oxide. A similar effect can be expected when used in In addition, although dry oxygen was used in this example as the heat treatment atmosphere, it goes without saying that the concept of the present invention can also be applied to other oxygen gas diluted with Ar, N, etc., No2, etc. Nor.
本発明によれば、Ｔａ２０５／ｓｉｏ、／ｓｉの構造を
用いたキャパシタの耐圧、容量を減少させることなしに
欠陥密度を減少させることができるので、Ｔａ、０．／
ＳｉＯ，の膜厚が薄くなっても、１．ＳＩ用キャパシタ
材として充分な信頼性を得ることができる。According to the present invention, the defect density can be reduced without reducing the withstand voltage and capacity of the capacitor using the Ta205/sio,/si structure. /
Even if the film thickness of SiO becomes thinner, 1. Sufficient reliability can be obtained as a capacitor material for SI.
第１図は１本発明の方法によるキャパシタの製造工程を
示す図、第２図は酸素アニール温度と欠陥密度の関係を
示す曲線図、第３図は酸素アニール温度と容量密度の関
係を示す曲線図である。
１・・・Ｓｉ基板、２・・・素子間分離絶縁膜、３・・
・篤 １ 図
（欠）
Ｃｂ）
（ｄ）
藁 ２ 図
第３図Figure 1 is a diagram showing the capacitor manufacturing process according to the method of the present invention, Figure 2 is a curve diagram showing the relationship between oxygen annealing temperature and defect density, and Figure 3 is a curve diagram showing the relationship between oxygen annealing temperature and capacitance density. It is a diagram. 1... Si substrate, 2... Inter-element isolation insulating film, 3...
・Atsushi 1 Figure (missing) Cb) (d) Straw 2 Figure 3
Claims (1)
れ積層し、高誘電率絶縁膜／ＳｉＯ＿２／Ｓｉが形成さ
れている半導体装置を、乾燥した酸化性雰囲気中で加熱
することを特徴とする半導体装置の製造方法。 ２、特許請求の範囲第１項記載の高誘電率絶縁膜は、酸
化タンタル、酸化ニオビウム、酸化チタン、酸化バナジ
ウム、酸化ジルコニウム、酸化ハフニウム、酸化アルミ
ニウムの群より選ばれた少なくとも１つを構成要素とし
ていることを特徴とする半導体装置の製造方法。[Claims] 1. A semiconductor device in which SiO_2 and a high dielectric constant insulating film are laminated on a Si substrate, and a high dielectric constant insulating film/SiO_2/Si is formed is heated in a dry oxidizing atmosphere. A method for manufacturing a semiconductor device, characterized in that: 2. The high dielectric constant insulating film according to claim 1 contains at least one constituent selected from the group of tantalum oxide, niobium oxide, titanium oxide, vanadium oxide, zirconium oxide, hafnium oxide, and aluminum oxide. A method for manufacturing a semiconductor device, characterized in that:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59155228A JPS6135548A (en) | 1984-07-27 | 1984-07-27 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59155228A JPS6135548A (en) | 1984-07-27 | 1984-07-27 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6135548A true JPS6135548A (en) | 1986-02-20 |
Family
ID=15601323
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59155228A Pending JPS6135548A (en) | 1984-07-27 | 1984-07-27 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6135548A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04221848A (en) * | 1990-03-16 | 1992-08-12 | Philips Gloeilampenfab:Nv | Manufacture of semiconductor device |
| JPH0744466U (en) * | 1988-06-18 | 1995-11-21 | ペータース・マシーネンファブリーク・ゲーエムベーハー | Corrugated roller for single-sided corrugated board making machine |
| US6290822B1 (en) * | 1999-01-26 | 2001-09-18 | Agere Systems Guardian Corp. | Sputtering method for forming dielectric films |
| JP2004523134A (en) * | 2000-09-19 | 2004-07-29 | マットソン テクノロジイ インコーポレイテッド | Method of forming dielectric film |
| US7385264B2 (en) | 2002-03-29 | 2008-06-10 | Kabushiki Kaisha Toshiba | Method of forming semiconductor device and semiconductor device |
-
1984
- 1984-07-27 JP JP59155228A patent/JPS6135548A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0744466U (en) * | 1988-06-18 | 1995-11-21 | ペータース・マシーネンファブリーク・ゲーエムベーハー | Corrugated roller for single-sided corrugated board making machine |
| JPH04221848A (en) * | 1990-03-16 | 1992-08-12 | Philips Gloeilampenfab:Nv | Manufacture of semiconductor device |
| US6290822B1 (en) * | 1999-01-26 | 2001-09-18 | Agere Systems Guardian Corp. | Sputtering method for forming dielectric films |
| JP2004523134A (en) * | 2000-09-19 | 2004-07-29 | マットソン テクノロジイ インコーポレイテッド | Method of forming dielectric film |
| US7385264B2 (en) | 2002-03-29 | 2008-06-10 | Kabushiki Kaisha Toshiba | Method of forming semiconductor device and semiconductor device |
| US8227356B2 (en) | 2002-03-29 | 2012-07-24 | Kabushiki Kaisha Toshiba | Method of forming semiconductor device and semiconductor device |
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