JPS6135089A - Distribution/exchange system for non-synchronizing signal - Google Patents
Distribution/exchange system for non-synchronizing signalInfo
- Publication number
- JPS6135089A JPS6135089A JP15531084A JP15531084A JPS6135089A JP S6135089 A JPS6135089 A JP S6135089A JP 15531084 A JP15531084 A JP 15531084A JP 15531084 A JP15531084 A JP 15531084A JP S6135089 A JPS6135089 A JP S6135089A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- cmi
- bit
- speed
- serial
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明は、低速スイッチング素子を使用した空間分配形
の分配段で、高速信号を交換出来るようにした、非同期
信号分配交換方式に関するものである＠
〔発明の背景〕
従来例を第１図に示す。[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to an asynchronous signal distribution and exchange system in which high-speed signals can be exchanged with a spatially distributed distribution stage using low-speed switching elements. [Background of the Invention] A conventional example is shown in FIG.
３２Ｍビット／秒のＣＭＩ信号（以下３２ＭＣＭＩ信号
と呼ぶ）を交換する空間分割形の分配段は、５２ＭＣＭ
Ｉ（ｇ号を通すことが出来る素子で構成する必要があっ
た。A space division type distribution stage that exchanges a 32 Mbit/s CMI signal (hereinafter referred to as 32MCMI signal) is a 52MCM
It was necessary to construct it with an element that can pass I(g).
この素子使用にあたっては、
（１） 価格が高い
（２） 平衡伝送が必要な為、布線本数・、ケーブル
芯線数が多くなる。When using this element, (1) it is expensive, (2) it requires balanced transmission, which increases the number of wires and cable cores.
等の欠点があった＠
〔発明の目２的〕
本発明の目的は、安価で、しかも技術的に問題のない低
速スイッチング素子を使用して、高速信号を交換させる
ことにある。[Objective 2 of the Invention] An object of the present invention is to exchange high-speed signals using inexpensive and technically problem-free low-speed switching elements.
本発明は、５２ＭＣＭＩ直列信号を並列信号に変換する
ことｋより、見かけ上の信号伝送速度を遅くし、低速ス
イッチング素子で交換出来るようにしたものである。The present invention reduces the apparent signal transmission speed by converting the 52 MCMI serial signal into a parallel signal, so that it can be replaced with a low-speed switching element.
以下本発明の一実施例を第２図により説明するＯ
本図は、５２ＭＣＭＩ直列信号を、４ビツトの並列信号
に変換する一方、８Ｍビット／秒の低速のスイッチから
成る分配段で該信号を交換する例である◎
図において、ＴＩＭ（１）は、公知の方法で、５２Ｍ
ＣＭＩ直列信号よりクロックを取り出し、そのりｐツク
により３２Ｍ ＣＭＩ 直列信号を・４ピット並列信
号に変換するためのタイミング回路である。ＴＩＭ（０
）は、上記の逆で、４ビット並列信号を３２ＭＣＭＩ直
列信号に変換するためのタイミング回路であるうまた、
Ｓ／Ｐレジスタは、直列信号を４ビット並列信号に変換
するシフトレジスタである。Ｐ／Ｓレジスタは、４ビッ
ト並列信号を直列信号に変換するシフトレジスタである
〇
次に動作について説明する。An embodiment of the present invention will be explained below with reference to FIG. 2. This figure shows that a 52 MCMI serial signal is converted into a 4-bit parallel signal, and the signal is transferred by a distribution stage consisting of a low-speed switch of 8 Mbit/s. This is an example of exchanging ◎ In the figure, TIM (1) is replaced with 52M by a known method.
This is a timing circuit that extracts the clock from the CMI serial signal and converts the 32M CMI serial signal into a 4-pit parallel signal using a p-block. TIM(0
) is the opposite of the above, and is a timing circuit for converting a 4-bit parallel signal into a 32MCMI serial signal.
The S/P register is a shift register that converts a serial signal into a 4-bit parallel signal. The P/S register is a shift register that converts a 4-bit parallel signal into a serial signal. Next, the operation will be explained.
分配段の入側端子に３２ＭＣＭＩ直列信号が入って来る
と、入側タイミング回路： ＴＩＭ （Ｉ）により、公
知の方法で、５２Ｍ ＣＭＩ直列信号よりクロックを抽
出する◎この抽出したクリックにより、８７Ｐレジスタ
を用いて５２ＭＣＭＩ直列信号を４ビット並列信号に変
換する。これにより見かけ上、８Ｍビット／秒のＣＭＩ
信号となり、信号伝送速度を遅くしたことと等価になる
。この信号伝送速度が遅くなった、４ビット並列信号を
、８Ｍビット／秒の信号を交換できるスイッチング素子
を使用した分配段スイッチにより、公知の方法で交換す
る・
次に交換された４ピット並列信号は、Ｐ／８レジスタを
用いて、出側タイミング回路：ＴＩＭ（０）により、直
列信号に変換され、元の信号伝送速度の速い３２ＭＣＭ
Ｉ直列信号となって・出１１２！ｌ端子へと伝送されて
い〈０このように本実施例によれば、低速の８Ｍビット
／秒の信号を交換できるスイッチング素子を用いた分配
段を使用して、高速の３２Ｍ ＣＭＩ信号゛を交換出来
る。When the 32MCMI serial signal enters the input terminal of the distribution stage, the input timing circuit: TIM (I) extracts the clock from the 52MCMI serial signal using a known method. ◎This extracted click causes the 87P register to is used to convert the 52 MCMI serial signal into a 4-bit parallel signal. This gives an apparent CMI of 8 Mbit/s.
This is equivalent to slowing down the signal transmission speed. This 4-bit parallel signal, whose signal transmission speed has been reduced, is exchanged using a known method using a distribution stage switch that uses a switching element capable of exchanging 8 Mbit/sec signals. Next, the exchanged 4-bit parallel signal is converted into a serial signal by the output timing circuit: TIM (0) using a P/8 register, and the original signal is converted to a 32MCM signal with a high transmission speed.
I becomes a serial signal and outputs 112! According to this embodiment, the high-speed 32M CMI signal is exchanged using a distribution stage using switching elements capable of exchanging the low-speed 8 Mbit/s signal. I can do it.
本発明によれば、安価で、技術的Ｋｆｌｌ１題のない低
速スイッチング素子を使用出来るので、経済化の効果が
ある。According to the present invention, it is possible to use a low-speed switching element that is inexpensive and has no technical problems, resulting in an economical effect.
第１図は、従来の方法を示し、入側端子と出側端子間で
信号を交換する状態図、第２図は。
本発明の一実施例であり、入側端子と出側端子間で信号
を交換している状態を示すブシツク図であるＯ
ＴＩＭσ）・・・入側タイミング回路、ＴＩＭ（０）・
・・出側タイミング回路、Ｓ／Ｐ・・・直列信号を並列
信号に変換するシフトレジスタ、
Ｐ／Ｓ・・・並列信号を直列信号に変換するシフトレジ
スタ。
粋部人−ｈ罹＋恵鍾明キFIG. 1 shows a conventional method, and FIG. 2 is a state diagram for exchanging signals between an incoming terminal and an outgoing terminal. This is an embodiment of the present invention, and is a book diagram showing a state in which signals are exchanged between an input terminal and an output terminal.
...output timing circuit, S/P...shift register that converts a serial signal to a parallel signal, P/S...shift register that converts a parallel signal to a serial signal. Ichibunin - H Haku + Meijo Meiki
Claims (1)
において、高速度のＣＭＩ直列信号を並列信号に変換し
て、見かけ上の信号伝送速度を遅くすることにより、低
速度のスイッチング素子を使用した分配段で実効的に高
速度のＣＭＩ信号を交換出来るようにしたことを特徴と
する非同期信号分配交換方式。1. In a space-division type distribution stage that exchanges high-speed CMI signals, low-speed switching elements can be replaced by converting high-speed CMI serial signals into parallel signals and slowing down the apparent signal transmission speed. An asynchronous signal distribution and exchange system characterized in that high-speed CMI signals can be exchanged effectively in the distribution stages used.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15531084A JPS6135089A (en) | 1984-07-27 | 1984-07-27 | Distribution/exchange system for non-synchronizing signal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15531084A JPS6135089A (en) | 1984-07-27 | 1984-07-27 | Distribution/exchange system for non-synchronizing signal |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6135089A true JPS6135089A (en) | 1986-02-19 |
Family
ID=15603094
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15531084A Pending JPS6135089A (en) | 1984-07-27 | 1984-07-27 | Distribution/exchange system for non-synchronizing signal |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6135089A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6330098A (en) * | 1986-07-24 | 1988-02-08 | Nippon Telegr & Teleph Corp <Ntt> | Shift register type time switch and network constituted by same switch |
| JPH0423718A (en) * | 1990-05-18 | 1992-01-28 | Nissan Motor Co Ltd | Transport device |
| US5127692A (en) * | 1987-10-20 | 1992-07-07 | Canon Kabushiki Kaisha | Article gripping apparatus |
| JPH06261347A (en) * | 1993-03-03 | 1994-09-16 | Nec Corp | Time-division multiplex switch circuit |
| JPH08113359A (en) * | 1994-10-13 | 1996-05-07 | Dia Shinku Kk | Machine part conveying and processing device |
-
1984
- 1984-07-27 JP JP15531084A patent/JPS6135089A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6330098A (en) * | 1986-07-24 | 1988-02-08 | Nippon Telegr & Teleph Corp <Ntt> | Shift register type time switch and network constituted by same switch |
| US5127692A (en) * | 1987-10-20 | 1992-07-07 | Canon Kabushiki Kaisha | Article gripping apparatus |
| JPH0423718A (en) * | 1990-05-18 | 1992-01-28 | Nissan Motor Co Ltd | Transport device |
| JPH06261347A (en) * | 1993-03-03 | 1994-09-16 | Nec Corp | Time-division multiplex switch circuit |
| JPH08113359A (en) * | 1994-10-13 | 1996-05-07 | Dia Shinku Kk | Machine part conveying and processing device |
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