JPS6127923B2 - - Google Patents

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Publication number
JPS6127923B2
JPS6127923B2 JP51009545A JP954576A JPS6127923B2 JP S6127923 B2 JPS6127923 B2 JP S6127923B2 JP 51009545 A JP51009545 A JP 51009545A JP 954576 A JP954576 A JP 954576A JP S6127923 B2 JPS6127923 B2 JP S6127923B2
Authority
JP
Japan
Prior art keywords
frequency
modulation
vcxo
voltage
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP51009545A
Other languages
Japanese (ja)
Other versions
JPS5293261A (en
Inventor
Masahide Tamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyo Communication Equipment Co Ltd
Original Assignee
Toyo Communication Equipment Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyo Communication Equipment Co Ltd filed Critical Toyo Communication Equipment Co Ltd
Priority to JP954576A priority Critical patent/JPS5293261A/en
Publication of JPS5293261A publication Critical patent/JPS5293261A/en
Publication of JPS6127923B2 publication Critical patent/JPS6127923B2/ja
Granted legal-status Critical Current

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Description

【発明の詳細な説明】 (発明の利用分野) 本発明は水晶発振器等の基準周波数発振器
(Standard Frequency Ossilator以下SFOと呼
ぶ)出力に位相同期させた電圧制御水晶発振器
(以下VCXOと呼ぶ)の制御用直流電圧に変調用
交流信号を重畳させることによりこのVCXO出力
に周波数変調した信号を得るようにした周波数変
調方式の改良に関する。
[Detailed Description of the Invention] (Field of Application of the Invention) The present invention provides control of a voltage controlled crystal oscillator (hereinafter referred to as VCXO) whose phase is synchronized with the output of a standard frequency oscillator (hereinafter referred to as SFO) such as a crystal oscillator. This invention relates to an improvement of a frequency modulation method in which a frequency-modulated signal is obtained from the VCXO output by superimposing a modulation AC signal on a DC voltage.

(従来技術) 電圧制御水晶発振器VCXOは周波数安定度が高
く電子機器の発振回路として広く用いられている
が、その周波数制御用直流信号に変調信号を重畳
すればFM変調波を得ることができるから発振器
を兼ねた変調器として使用しうる。
(Prior art) The voltage-controlled crystal oscillator VCXO has high frequency stability and is widely used as an oscillation circuit in electronic devices, but it is possible to obtain an FM modulated wave by superimposing a modulation signal on the frequency control DC signal. It can be used as a modulator that also serves as an oscillator.

しかしながら、UHF帯FM無線機の如く高度の
周波数安定度を必要とする機器や有線回路に接続
するデータ伝送用通信機等の如くより高品質の通
話を要求する機器では従来のVCXOの変調歪特
性、変調カンド、周波数安定度では共に不十分で
あつた。
However, for equipment that requires a high degree of frequency stability, such as UHF band FM radio equipment, and equipment that requires higher quality calls, such as data transmission communication equipment connected to wired circuits, the modulation distortion characteristics of conventional VCXO , modulation frequency, and frequency stability were all insufficient.

即ち、本来周波数安定度が高く一般に周波数変
調をかけにくいVCXOの周波数制御用直流電圧に
変調信号を重畳して所要の周波数偏移を得るため
には変調信号入力レベルを大きくする必要がある
が、この場合には変調器自身域はマイクアンプ等
のダイナミツクレンジが大きくなつて非直線歪に
よる変調歪が増え、これを避けるためにVCXOの
感度を大きくするとその周波数安定度を悪化させ
ると云う互いに相反する欠点をもち夫々の欠点を
ともに除去した周波数変調方式は未だ考案されて
いなかつた。
In other words, in order to obtain the required frequency shift by superimposing a modulation signal on the frequency control DC voltage of the VCXO, which has high frequency stability and is generally difficult to apply frequency modulation to, it is necessary to increase the input level of the modulation signal. In this case, in the modulator's own range, the dynamic range of the microphone amplifier, etc. increases, and modulation distortion due to nonlinear distortion increases.If the sensitivity of the VCXO is increased to avoid this, the frequency stability will deteriorate. Although they have contradictory drawbacks, a frequency modulation method that eliminates both of them has not yet been devised.

本発明の理解を容易ならしめるために、一般的
な位相同期系回路の基本的な動作及び、これを変
調器として利用する場合の変調信号周波数と周波
数偏位との関係、更にはその問題点について詳細
に説明する。
In order to make the present invention easier to understand, we will explain the basic operation of a general phase synchronization circuit, the relationship between the modulation signal frequency and frequency deviation when using this as a modulator, and the problems thereof. will be explained in detail.

第1図はFM波を得るための従来の回路方式を
示すブロツク図であつて、周波数安定度を向上す
るために位相同期系を構成したものである。
FIG. 1 is a block diagram showing a conventional circuit system for obtaining FM waves, in which a phase synchronization system is constructed to improve frequency stability.

同図に於いてSFOは基準発振器で一般に水晶
発振器を用いこのSFOの出力PD1は位相比較器
(以下PDと呼ぶ)に入力される。この入力PD1
VCXO出力からの帰還入力PD2とはPDで位相比較
されてその位相差に応じた直流電圧に変換されこ
の直流電圧は更に低域波器(以下LPFと呼ぶ)
によつてその中に含まれる交流成分が除去された
のちVCXOの周波数制御電圧として印加される。
In the figure, SFO is a reference oscillator, which is generally a crystal oscillator, and the output PD 1 of this SFO is input to a phase comparator (hereinafter referred to as PD). This input PD 1 and
The feedback input PD 2 from the VCXO output is compared in phase with the PD and converted into a DC voltage according to the phase difference. This DC voltage is further passed through a low frequency filter (hereinafter referred to as LPF).
After the alternating current component contained therein is removed, it is applied as a frequency control voltage to the VCXO.

このように位相同期系を有る発振器出力は
SFOの周波数安定度と同一となるからこれに用
いるVCXOのそれはある程度ラフなものでよく安
価なものを使用しうる。
In this way, the output of an oscillator with a phase-locked system is
Since the frequency stability is the same as that of SFO, the VCXO used for this can be somewhat rough and inexpensive.

ところで、位相同期系の同期条件と各構成ブロ
ツクの利得との間には周知の如く次のような関係
がある。
By the way, as is well known, there is the following relationship between the synchronization conditions of the phase synchronization system and the gains of each constituent block.

即ち、 PDの変換利得をKPD(VOLT/ラジアン) LPFの通過利得をKLPF(無名数) VCXOの角周波数変調感度をKVCXO(ラジア
ン/秒/VOLT) とするとき、前記第1図の開ループ利得KOは Kp=KPD×KLPE×KVCXO 〔ラジアン/秒〕 ………(1) で表わされる。
That is, when the conversion gain of PD is K PD (VOLT/radian), the pass gain of LPF is K LPF (anonymous number), and the angular frequency modulation sensitivity of VCXO is K VCXO (radian/second/VOLT), the equation shown in FIG. The open loop gain K O is expressed as K p =K PD ×K LPE ×K VCXO [radian/second] (1).

又、閉ループ中のLPFのカツトオフ周波数が系
に直接影響を与えない程度に充分高いものとする
と、周知の如く系の同期範囲を決定するロツクイ
ンレンジ及びループカツトオフ周波数(c)は
ともに前記ループゲインKOで制限される。
Furthermore, assuming that the cutoff frequency of the LPF in the closed loop is sufficiently high to the extent that it does not directly affect the system, the lock-in range and loop cutoff frequency (c), which determine the synchronization range of the system, are both equal to the loop It is limited by the gain K O.

即ち、前記ループゲインKOのデイメンジヨン
は〔ラジアン/秒〕の角周波数の単位をもつから
これを周波数の単位に換算すればKO/2π
〔Hz〕となり、VCXO出力周波数と前記SFO出力
周波数差がKO/2π〔Hz〕以下であれば系は同
期し、それ以上の周波数差に対しては同期しな
い。
That is, since the dimension of the loop gain K O has an angular frequency unit of [radian/second], converting this to a frequency unit is K O /2π
[Hz], and if the difference between the VCXO output frequency and the SFO output frequency is less than K O /2π [Hz], the system will be synchronized, and will not synchronize for a frequency difference greater than that.

一方、上述した位相同期系に於けるSFO出力
とVCXO出力の両周波数が一致し同期が成立した
状態に於いて、VCXOの制御電圧に変調信号M1
を印加して系出力に周波数変調を施した高周波信
号を得る場合の前記変調信号M1の周波数aと
周波数偏位ΔFとの関係は第2図に示すように変
調信号M1の周波数aがKO/2π〔Hz〕以下で
は6dB/Octの傾斜をもちかつそれ以上では平坦
となる。
On the other hand, when the frequencies of the SFO output and the VCXO output in the above-mentioned phase synchronization system match and synchronization is established, the modulation signal M 1 is applied to the control voltage of the VCXO.
The relationship between the frequency a of the modulated signal M1 and the frequency deviation ΔF when applying frequency modulation to the system output is as shown in Fig. 2, where the frequency a of the modulated signal M1 is It has a slope of 6 dB/Oct below K O /2π [Hz] and becomes flat above that.

尚、第2図及び後述の第4図、第6図に於ける
縦軸は最大周波数偏位をさすもので、これは変調
信号レベルが最大値に於ける被変調波の中心周波
数からの周波数偏位を云う。
The vertical axis in Figure 2 and Figures 4 and 6 (described later) indicates the maximum frequency deviation, which is the frequency from the center frequency of the modulated wave when the modulation signal level is at its maximum value. It refers to deviation.

このようにKO/2π〔Hz〕を境にΔFの変化
が異る理由について少しく説明する。
The reason why the change in ΔF differs at K O /2π [Hz] will be briefly explained below.

前記第1図の位相同期系に於いて、位相比較器
PDの出力にはPD1とPD2の乗算信号が生ずるがこ
のうち両者の和の周波数をもつ成分は次段のLPF
にて除去されVCXO入力には両者の差の周波数即
ち、両者の位相差に対応した信号が印加される。
In the phase synchronization system shown in FIG. 1, the phase comparator
A multiplied signal of PD 1 and PD 2 is generated at the output of the PD, but the component with the frequency of the sum of both is output to the next stage LPF.
A signal corresponding to the frequency of the difference between the two, that is, the phase difference between the two, is applied to the VCXO input.

又、VCXOを系から切離した単体を考えその制
御電構に重畳する変調信号電圧を一定とすればそ
の出力信号の周波数偏位量は周波数に関係なく一
定となるが、そのときの移相量と周波数との関係
は周知の如く互いに反比例する。
Also, if we consider a single VCXO separated from the system and the modulation signal voltage superimposed on its control electrical structure is constant, the amount of frequency deviation of the output signal will be constant regardless of the frequency, but the amount of phase shift at that time will be As is well known, the relationship between and frequency is inversely proportional to each other.

つまり同一周波数偏位の場合は周波数が低いほ
ど移相量が大きくなる。
In other words, in the case of the same frequency deviation, the lower the frequency, the larger the amount of phase shift.

従つて第1図に於いては変調信号M1の周波数
aが低くなれば位相比較器PDにて検出する
PD1とPD2との位相差が大きくなるが、位相同期
系はその位相差を小さくするよう動作する負帰還
ループであるから位相差が大きい程負帰還量が増
加し結果的に第2図のKO/2π〔Hz〕以下に示
される如く6dB/Octの傾斜をもつて周波数偏位
量が低下する。
Therefore, in Fig. 1, if the frequency a of the modulation signal M1 becomes low, it is detected by the phase comparator PD.
The phase difference between PD 1 and PD 2 increases, but since the phase synchronization system is a negative feedback loop that operates to reduce the phase difference, the larger the phase difference, the greater the amount of negative feedback, and as a result, as shown in Figure 2. As shown below , the frequency deviation decreases with a slope of 6 dB/Oct.

然かるに、位相同期系の同期範囲はループゲイ
ンKOによつて制限をうけること上述した通りで
あつて、変調信号周波数aがKO/2π〔Hz〕
以上になると系が応答できずに負帰還量がなくな
り結果的に周波数偏位ΔFは変調周波数に関係な
く一定となる。
However, as mentioned above, the synchronization range of the phase synchronization system is limited by the loop gain K O , and if the modulation signal frequency a is K O /2π [Hz]
If the value exceeds this value, the system cannot respond and the amount of negative feedback disappears, resulting in the frequency deviation ΔF becoming constant regardless of the modulation frequency.

尚、系が同期しないのはKO/2π〔Hz〕以上
の周波数変化に対してであつて、それ以下では同
期するから周波数安定度はSFOのそれと同一で
あることには変りはない。
Note that the system is not synchronized when the frequency changes more than K O /2π [Hz], but synchronizes below that, so the frequency stability is still the same as that of SFO.

さて、ここで周波数変調器としての性能におい
ては変調信号周波数に関係なく一定の周波数偏位
を得られることつまり変調周波数特性が平坦であ
ること、及び変調歪が少ないことが重要である
が、この観点から前記第1図の変調器付き発振回
路を吟味すると以下の欠点が明らかとなる。
Now, in terms of performance as a frequency modulator, it is important to be able to obtain a constant frequency deviation regardless of the modulation signal frequency, that is, to have a flat modulation frequency characteristic, and to have little modulation distortion. When the oscillation circuit with a modulator shown in FIG. 1 is examined from this point of view, the following drawbacks become clear.

即ち、位相同期系としての重要なフアクタであ
るロツクインレンジを大きくして、VCXOが製造
上のバラツキ、温度変動或は経時変化等によつて
その特性が変化しても同期はずれを防止するため
にループゲインKOを大きくすると、上述した変
調特性の平坦域が少なくなつて変調器としての性
能が低下する。
In other words, the lock-in range, which is an important factor in a phase synchronization system, is increased to prevent loss of synchronization even if the characteristics of the VCXO change due to manufacturing variations, temperature fluctuations, changes over time, etc. If the loop gain K O is increased, the above-mentioned flat region of the modulation characteristics will decrease, and the performance as a modulator will deteriorate.

つまり第1図に示す方法では位相同期系の性能
向上と変調器としての性能向上とは互いに相反し
両者を同時に満足することができない。具体的な
数値を示せば、この種の回路の一般的な利得とし
てVCXOの感度KVCXOを2π×104、位相比較器
PDの利得KPDを8/π及びLPFの利得KLPFを1
として前記第1式に代入すればKOは16×104〔ラ
ジアン/秒〕、よつてKO/2πは約25.5〔KHz〕
となるから0〜25.5〔KHz〕の変調周波数範囲で
は変調周波数と周波数偏移量との関係が6dB/
Octの傾斜をもつたもの、つまりPM特性とな
る。
In other words, in the method shown in FIG. 1, improving the performance of the phase synchronization system and improving the performance of the modulator are contradictory to each other, and cannot be satisfied at the same time. If we give concrete numbers, the general gain of this type of circuit is VCXO sensitivity K VCXO is 2π×10 4 , phase comparator
PD gain K PD is 8/π and LPF gain K LPF is 1
If substituted into the first equation above, K O is 16×10 4 [radian/sec], so K O /2π is approximately 25.5 [KHz].
Therefore, in the modulation frequency range of 0 to 25.5 [KHz], the relationship between the modulation frequency and the amount of frequency deviation is 6 dB/
It has a slope of Oct, that is, it is a PM characteristic.

従つて、このままでは周波数変調器として使用
することができず、以下説明する如き各種対策を
必要とするが、いづれも新らたな問題を生じ解決
策と云い難い。
Therefore, it cannot be used as a frequency modulator as it is, and various countermeasures as described below are required, but all of them create new problems and cannot be called solutions.

まず第1の方法は、従来から試みられている如
くVCXOの製造偏差及び温度による周波数変動を
極力小さくなるよう構成することによつて同期は
ずれの危険を少なくしたうえで、許容しうる範囲
でループゲインKOを小さくしループカツトオフ
周波数を低くする方法がある。
The first method, which has been tried in the past, is to reduce the risk of loss of synchronization by configuring the VCXO to minimize manufacturing deviations and frequency fluctuations due to temperature, and then loop within an allowable range. There is a method of lowering the loop cutoff frequency by decreasing the gain K O.

例えばVCXO自身の周波数安定度を1桁厳しい
ものにすればこのときのループゲインKOを十分
の一にできることになり上述した例にあてはめれ
ばKO/2πを2.5〔KHz〕にまで低くできる。
For example, if the frequency stability of the VCXO itself is made one order of magnitude stricter, the loop gain K O at this time can be reduced to one-tenth, and by applying the above example, K O /2π can be lowered to 2.5 [KHz]. .

しかしながら、この方法ではVCXOは非常に高
価なものとなるばかりでなくVCXOの変調感度を
大きくできないからこれを補うために変調信号入
力レベルを大きくせざるを得ず歪率を悪化する等
更に解決困難な問題を生ずる。
However, with this method, not only does the VCXO become very expensive, but the modulation sensitivity of the VCXO cannot be increased, so the modulation signal input level must be increased to compensate for this, which worsens the distortion rate and makes it even more difficult to solve. This will cause problems.

他の方法として第3図に示す方法がある。 Another method is the method shown in FIG.

これはKO/2π〔Hz〕以下の変調周波数にて
周波数偏位ΔFが6dB/Octの傾斜にて変化する
部分をこれと逆特性をもつ回路即ち積分回路INT
によつて補う方法で、変調信号を積分回路を介し
てVCXOに入力するものである。
This means that the part where the frequency deviation ΔF changes at a slope of 6 dB/Oct at a modulation frequency below K O /2π [Hz] is a circuit with the opposite characteristics, that is, an integrating circuit INT.
In this method, the modulated signal is input to the VCXO via an integrating circuit.

これによれば第4図に示す如くKO/2π
〔Hz〕を境に夫々高域及び低域特性が互いに補完
され総合変調特性は全周波数域に於いて平坦とな
る。この方法ではKOを大きくできるからロツク
インレンジも広くVCXOも簡単なもので良いと云
う長所はあるものの低い変調周波数に於ける積分
回路INTの出力として非常に大きいものが要求さ
れるが積分回路INTの最大出力電圧には限度があ
る(主として電源電圧により制限を受ける)の
で、これによる周波数補正は所定周波数以下では
不可能であるうえ、KVCXO、KPD、KLPFの値
は本来それぞれ変化しやすいものである(温度変
化、経年変化等がある)からその積であるKO
また変わりやすく、KOが変化すると第4図の変
調周波数特性の低域カツトオフ周波数c=K
O/2π〔Hz〕が変化することになり、積分回路
INTで周波数補正した後の変調感度が変化する。
According to this, as shown in Fig. 4, K O /2π
The high-frequency and low-frequency characteristics complement each other at [Hz], and the overall modulation characteristic becomes flat in the entire frequency range. This method has the advantage that since K O can be increased, the lock-in range is wide and the VCXO can be simple, but it requires a very large output from the integrator circuit INT at low modulation frequencies. Since the maximum output voltage of INT has a limit (mainly limited by the power supply voltage), frequency correction using this is not possible below a certain frequency, and the values of KVCXO, KPD, and KLPF are inherently susceptible to change. (There are temperature changes, aging changes, etc.), so the product K O is also variable, and when K O changes, the low cutoff frequency c = K of the modulation frequency characteristic in Fig. 4
O /2π [Hz] will change, and the integration circuit
Modulation sensitivity changes after frequency correction with INT.

考えうる他の対策としては第5図に示すように
閉ループ内のLPFを、ループカツトオフ周波数
cより十分高いカツトオフ周波数をもつたLPF1
とループカツトオフ周波数cより十分低いカツ
トオフ周波数をもつたLPF2の2つに置換すると
共に該フイルタLPF1、LPF2とVCXOとの間に挿
入した切換スイツチSWによつて双方を切替え、
同期が成立するまではカツトオフ周波数の高い
LPF1に、又同期が成立したらLPF2に夫々切替え
て使用するよう構成する方法が考えられる。
Another possible countermeasure is to change the LPF in the closed loop to an LPF 1 with a cutoff frequency sufficiently higher than the loop cutoff frequency c, as shown in Figure 5.
and an LPF 2 having a cutoff frequency sufficiently lower than the loop cutoff frequency c, and switch both by a changeover switch SW inserted between the filters LPF 1 and LPF 2 and the VCXO,
The cutoff frequency is high until synchronization is established.
A conceivable method is to switch to LPF 1 and, when synchronization is established, switch to LPF 2 .

この方法によれば第6図に示すようにロツクイ
ンレンジがロツクインするか歪かによつて変化
し、ロツクインする以前には同図実線で示す如く
ロツクインし易いようにKO/2πは充分高い周
波数になるが、ロツクインしたらロツクインが
LPF2によつて制限され変調周波数の低域に至る
まで平坦な周波数特性をもつた同図点線で示すよ
うにKO/2πが低い周波数になるよう作用す
る。
According to this method, as shown in Fig. 6, the lock-in range changes depending on whether the lock-in occurs or distortion occurs, and before lock-in occurs, K O /2π is sufficiently high to facilitate lock-in, as shown by the solid line in the figure. It becomes the frequency, but when it locks in, it locks in
It is limited by LPF 2 and has a flat frequency characteristic down to the low range of the modulation frequency, which acts so that K O /2π becomes a low frequency as shown by the dotted line in the figure.

尚、このときのLPF1とLPF2の夫々の切替は
PD出力中のビート信号を検波器DETにて抽出し
て行う。
In addition, the switching of LPF 1 and LPF 2 at this time is
This is done by extracting the beat signal being output from the PD using a detector DET.

しかしながら第5図で示す方法ではSWを切替
えるときSWの動作が発振状態におちいらないよ
うある幅のバツクラツシユの設定が肝要であり、
又変調入力信号によつて検波器DETが誤動作す
るのを防ぐ工夫も必要であつていずれも装置を複
雑高価なものにする欠点がある。
However, in the method shown in Fig. 5, it is important to set a certain width of the bump so that the SW operation does not fall into an oscillation state when switching the SW.
Further, it is necessary to take measures to prevent the detector DET from malfunctioning due to the modulated input signal, and each method has the disadvantage of making the device complicated and expensive.

更に、他の方法としては種々の問題点は含む
が、第7図に示すようなデジタル周波数シンセサ
イザのVCOに変調信号を印加してFM波を得る方
法がある。
Another method, although it involves various problems, is to obtain an FM wave by applying a modulation signal to the VCO of a digital frequency synthesizer as shown in FIG.

デジタル周波数シンセサイザではチヤンネル発
振器としては広範囲にわたつて発振周波数を可変
する要求から通常LC型電圧制御発振器VCOが使
用される。
In a digital frequency synthesizer, an LC type voltage controlled oscillator (VCO) is usually used as a channel oscillator because of the requirement to vary the oscillation frequency over a wide range.

又、SFOとPDとの間に挿入したMは1/m固
定分周器、VCOからPDへの帰還ループ中に挿入
したNVは1/nの可変分周器であつて、変調信
号は上述したものと同様にVCOの制御電圧とし
てのLPF出力に重畳する。
Also, M inserted between SFO and PD is a 1/m fixed frequency divider, and N V inserted in the feedback loop from VCO to PD is a 1/n variable frequency divider. Similar to the above, it is superimposed on the LPF output as the VCO control voltage.

さて、デジタル周波数シンセサイザの機能は周
知の如く、基準発振器SFO出力にVCO出力を同
期させることによつてVCOの出力周波数を広範
囲にわたつて可変して得る種々の発振周波数出力
のすべてを通常水晶発振器にて構成するSFOの
周波数安定度と同等の高安定度にした発振回路で
あつて、このための条件としては可変分周器NV
の分周比をなるべく小さくし(例えば3〜200)
周波数を切替えたときの応答時間を短縮し、かつ
ループカツトオフ周波数cをなるべく大きくし
て閉ループ応答を早めかつ必然的にVCOのもつ
高い周波数域の雑音成分を除去するよう構成す
る。
Now, as is well known, the function of a digital frequency synthesizer is that by synchronizing the VCO output with the reference oscillator SFO output, the output frequency of the VCO can be varied over a wide range. This is an oscillation circuit with high frequency stability equivalent to the frequency stability of the SFO configured with a variable frequency divider N V
Make the division ratio as small as possible (for example, 3 to 200)
The system is configured to shorten the response time when switching the frequency, increase the loop cut-off frequency c as much as possible to speed up the closed loop response, and necessarily remove noise components in the high frequency range of the VCO.

また、デジタル周波数シンセサイザは広範囲に
わたつて、VCOの発振周波数を切替えるために
VCOの感度(即ち制御信号の単位電圧あたりの
周波数変化量)を大きくするためにVCO自身の
感度を高めかつループゲインを大きくした構成を
とる。
Additionally, digital frequency synthesizers are widely used to switch the oscillation frequency of the VCO.
In order to increase the sensitivity of the VCO (that is, the amount of frequency change per unit voltage of the control signal), a configuration is adopted in which the sensitivity of the VCO itself is increased and the loop gain is increased.

従つて、このようなデジタル周波数シンセサイ
ザ機能をもつた発振回路を変調器として兼用する
場合は前記第3図及び第4図にて説明したことと
同様の問題を生ずる。
Therefore, when an oscillation circuit having such a digital frequency synthesizer function is also used as a modulator, problems similar to those explained with reference to FIGS. 3 and 4 occur.

これを具体的な数値を例示して説明すれば、上
述した理由からVCOの感度KVCOを通常2π×
106〔ラジアン/秒/VOLT〕と極めて大きく、
かつ可変分周比は3〜200の範囲で任意に切替え
て所望の周波数を得る。
To explain this using specific numerical examples, for the reasons mentioned above, the VCO sensitivity K VCO is usually 2π×
10 6 [radian/second/VOLT], which is extremely large.
The variable frequency division ratio can be arbitrarily switched within the range of 3 to 200 to obtain a desired frequency.

従つて、このときの開ループゲインKOはKVCO
×KPD×KLPF×1/nで表わされ、nを最大値
200をとり、KPD=8/π、KLPF=1を代入すれ
ばこのときの開ループゲインKOは8×104〔ラジ
アン/秒/VOLT〕又、ループカツトオフ周波数
O/2πは12.7〔kHz〕となる。
Therefore, the open loop gain K O at this time is K VCO
×K PD ×K LPF ×1/n, where n is the maximum value
200 and substitute K PD = 8/π and K LPF = 1, the open loop gain K O at this time is 8×10 4 [rad/sec/VOLT], and the loop cutoff frequency K O /2π is It becomes 12.7 [kHz].

このように閉ループ中に1/nの分周器を含む
場合はループカツトオフ周波数cは1/nと小
さくなるものの通常のデジタル周波数シンセサイ
ザに用いるVCO利得が前記第1図に示したもの
より103倍であるから結果的にループカツトオフ
周波数cは12.7〔KHz〕となる。
In this way, when a 1/n frequency divider is included in the closed loop, the loop cutoff frequency c becomes smaller than 1/n, but the VCO gain used in a normal digital frequency synthesizer is 10% higher than that shown in Fig. 1 above. Since it is tripled , the loop cutoff frequency c becomes 12.7 [KHz] as a result.

従つて、12.7〔KHz〕以下の変調周波数では
6dB/Octの傾斜をもつた変調特性となり、前記
第3図、第4図に示したような対策を必要とする
から、上述したように変調歪を悪化する欠点を有
し、従来周波数シンセサイザ機能をもつた発振器
に変調機能を付加する場合はKO/2πを小さく
することをあきらめこれを変調信号周波数領域よ
り高くして積分回路を介して変調信号を入力する
前記第3図の方法を採用していた。
Therefore, at modulation frequencies below 12.7 [KHz],
The modulation characteristic has a slope of 6 dB/Oct, which requires the countermeasures shown in Figures 3 and 4. As mentioned above, it has the disadvantage of worsening modulation distortion, and the conventional frequency synthesizer function When adding a modulation function to an oscillator with 2π, we give up on reducing K O /2π and adopt the method shown in Figure 3 above, which sets it higher than the modulation signal frequency range and inputs the modulation signal through the integration circuit. Was.

このようにKO/2πをなるべく高く設定する
ことはトランシーバー等のチヤンネル発振器とし
てVCOを使用する場合に該VCOから発生する雑
音成分を高周波数域にわたつて除去するうえから
も絶対不可欠であり、本発明が目的とするような
O/2πが低い発振回路はデジタル周波数シン
セサイザである限り実現不可能であつた。
In this way, setting K O /2π as high as possible is absolutely essential in order to remove noise components generated from the VCO over a high frequency range when the VCO is used as a channel oscillator for a transceiver, etc. An oscillation circuit with a low K O /2π as the object of the present invention has not been possible as long as it is a digital frequency synthesizer.

又、シンセサイザーであるから可変分周器等に
よつてfVCOを変化させなければならないがVCO
はfVCOが変化するとKVCOもそれにつれて変化す
る為、その都度変調感度が変化するという更に厄
介な問題点をもあわせ持つものであり従来は良好
な変調特性を得んとする場合にはできるかぎり位
相同期系外部に於いて変調を施すのが一般的であ
つた。
Also, since it is a synthesizer, f VCO must be varied using a variable frequency divider, etc.
When f VCO changes, K VCO also changes accordingly, so it also has the even more troublesome problem of modulation sensitivity changing each time. It has been common practice to perform modulation outside the phase-locked system.

(発明の目的) 本発明はこのように従来のデジタル周波数シン
セサイザのもつ変調器としての好ましい点(ルー
プカツトオフ周波数が1/nされること)を生か
しつつ欠点を除去してUHF帯の周波数変調器と
して優れた性能をもつた周波数変調方式を提供す
るものである。
(Purpose of the Invention) The present invention utilizes the advantages of conventional digital frequency synthesizers as a modulator (the loop cutoff frequency is reduced to 1/n) and eliminates the disadvantages, thereby achieving frequency modulation in the UHF band. This provides a frequency modulation method with excellent performance as a receiver.

(発明の概要) このため本発明では、従来のデジタル周波数シ
ンセサイザのVCOをVCXOに置換しかつ閉ルー
プのカツトオフ周波数c=KO/2π〔Hz〕が
変調信号の最低周波数より充分小さくなるよう前
記可変分周器を充分分周比の大きな固定分周器に
置換することによつて、デジタル周波数シンセサ
イザの機能を遺失せしめる代りに特性の優れた変
調機能付き発振回路としたものである。
(Summary of the Invention) Therefore, in the present invention, the VCO of the conventional digital frequency synthesizer is replaced with a VCXO, and the closed loop cutoff frequency c=K O /2π [Hz] is made sufficiently smaller than the lowest frequency of the modulation signal. By replacing the frequency divider with a fixed frequency divider having a sufficiently large frequency division ratio, an oscillation circuit with a modulation function with excellent characteristics is created instead of losing the function of a digital frequency synthesizer.

(実施例) 以下本発明を図示した実施例に基づいて詳細に
説明する。
(Example) The present invention will be described in detail below based on an illustrated example.

第8図は本発明の周波数変調方式の原理を説明
するためのブロツク図である。
FIG. 8 is a block diagram for explaining the principle of the frequency modulation method of the present invention.

同図の構成が前記第7図に示した従来の変調器
付きデジタル周波数シンセサイザと異る点は
VCOがVCXOに、可変分周器Nvが固定分周器N
に夫々置き換えられたことの他に該固定分周器N
の分周比nが以下詳述するような値に設定された
点であつて、このような変更を施した回路はデジ
タル周波数シンセサイザとしての機能を遺失した
ものでその代りにUHF帯の無線機に使用しうる
周波数変調器として優れた特性をもつたものとな
る。
The configuration shown in this figure is different from the conventional digital frequency synthesizer with modulator shown in Fig. 7 above.
VCO becomes VCXO, variable frequency divider Nv becomes fixed frequency divider N
The fixed frequency divider N
The difference is that the frequency division ratio n is set to a value as detailed below, and the circuit that has been modified in this way loses its function as a digital frequency synthesizer and is instead used as a UHF band radio device. It has excellent characteristics as a frequency modulator that can be used for.

本発明に於いてVCOをVCXOに置換した理由
は、ループ中の分周比nを大きくしてループカツ
トオフ周波数cを低くすると系に於けるc以
上の雑音除去機能が無くなりVCOが必然的にも
つ高域雑音が出力されてしまうことを解決するた
めである。但しc以下の周波数ではSFOに同
期してその周波数と同一となるからVCXO自身の
安定度はラフなものでよい。
The reason for replacing the VCO with a VCXO in the present invention is that if the frequency division ratio n in the loop is increased and the loop cutoff frequency c is lowered, the noise removal function of the system over c is lost, and the VCO is inevitably replaced. This is to solve the problem of outputting high-frequency noise. However, at frequencies below c, it synchronizes with the SFO and becomes the same frequency, so the stability of the VCXO itself may be rough.

同図に及いてVCXOの出力周波数をfVOXOとす
るとfVCXOは固定分周器Nにて1/N分周されPD
に入力される。
In the same figure, if the output frequency of VCXO is f VOXO , f VCXO is divided by 1/N by fixed frequency divider N and PD
is input.

ここでm、nは任意の整数であるが、分周器の
作り易さから一般にm=n=2r(r=0、1、
2、……)のうちから選択するのが好都合であ
り、同期したときfVCXOはfVCXO=n/mfSFOとな る。
Here, m and n are arbitrary integers, but generally m=n=2 r (r=0, 1,
It is convenient to select from among (2, . . . ), and when synchronized, f VCXO becomes f VCXO =n/mf SFO .

又、mとnの値を適当に選択すると任意のルー
プカツトオフ周波数cを設定することができ
る。このように帰還ループに1/nの分周器を介
押されるとその開ループ利得Koは上述した通り KO=KVCXO×KPD×KLPF×1/n ……(2) と1/nとなつて小さくなるから、このときのル
ープカツトオフ周波数Kp/2πも低くなる。
Further, by appropriately selecting the values of m and n, an arbitrary loop cutoff frequency c can be set. In this way, when a 1/n frequency divider is inserted into the feedback loop, the open loop gain Ko is as described above: K O = K VCXO × K PD × K LPF × 1/n ...(2) and 1/ Since n becomes smaller, the loop cutoff frequency K p /2π at this time also becomes lower.

従つて、前記分周比nをできるだけ大きくして
O/2π〔Hz〕が変調周波数の最低周波数より
十分に低い周波数となるように構成すればKO
2π以上の変調周波数に対しては前記詳述した如
く位相同期しなくなるから変調特性は平坦とな
る。
Therefore, if the frequency division ratio n is made as large as possible so that K O /2π [Hz] is sufficiently lower than the lowest frequency of the modulation frequency, K O /
For modulation frequencies of 2π or more, the modulation characteristics become flat because phase synchronization is no longer achieved as described in detail above.

一方、本発明におけるロツクインレンジ特性は
同様にLPFが位相同期ループに影響を与えないと
すればKOに等しい。このKO値はPDの入力から
見た値であるがロツクインレンジをVCXO出力で
見るとその値がn倍されるので、結局nに無関係
となる。
On the other hand, the lock-in range characteristic in the present invention is similarly equal to K O if the LPF does not affect the phase-locked loop. This K O value is a value seen from the PD input, but when looking at the lock-in range from the VCXO output, the value is multiplied by n, so it is ultimately unrelated to n.

即ち、ロツクインレンジはKO=KVCXO×
KPD×KLPFの値を大きくすればそれに比例して
大となる。
In other words, the lock-in range is K O = KVCXO×
If the value of KPD×KLPF is increased, the value increases proportionally.

KVCXOは前述の如く変調歪の関係から一般に
十分大きくして用いるものであり、その上更に
KPD、KLPFもできる限り大きくすることによつ
て十分なロツクインレンジを得ることができる。
ロツクレンジを大きくできるのでVCXOには簡単
で安価な回路構成を採用しうることとなる。
As mentioned above, KVCXO is generally used in a sufficiently large size due to modulation distortion, and
A sufficient lock-in range can be obtained by making KPD and KLPF as large as possible.
Since the lock range can be increased, a simple and inexpensive circuit configuration can be used for the VCXO.

上述の如く、位相同期VCXOのロツクインレン
ジ特性と変調特性との間にある互に相矛盾する問
題の解決は、変調器付きシンセサイザーのNV
分周比の十分大きい値の分周器Nにすることで解
決できた。
As mentioned above, the solution to the mutually contradictory problem between the lock-in range characteristics and modulation characteristics of a phase-locked VCXO is to use a frequency divider N with a sufficiently large frequency division ratio to reduce the N V of the synthesizer with a modulator. I was able to solve the problem by doing

一方、変調器付シンセサイザーの方式における
VCOのFM雑音は、本発明ではVCXOとなつてい
るので、問題にならない。すなわち、VCXOは、
VCOに比べ頭記した従来のVCXO単体で使つた
場合と同様に、この場合も低いFM雑音しか示さ
ないからである。従つて位相同期ループにて十分
に低い低域カツトオフ周波数cを採用しても変
調器出力のFM雑音は問題とならず、VCOの場合
に比べて格段に優れた特性となる。第9図は本発
明の具体例を示すブロツク図である。この実施例
ではSFOには例えば温度補償型安定水晶発振器
を用い、分周器M、Nの分周比をm=n=1024と
する。(この場合fVCXO=fSFOとなる。)又他の
部分は上述した従来例と同様にKPD、KLPF、
KVCXOを各々KPD=8/π、KLPF=1、
KVCXO=2π×104と選定する。
On the other hand, in the method of synthesizer with modulator,
The FM noise of the VCO is not a problem because it is a VCXO in the present invention. That is, the VCXO is
This is because, as in the case of using the conventional VCXO alone as mentioned above compared to a VCO, this case also shows only low FM noise. Therefore, even if a sufficiently low low cutoff frequency c is adopted in the phase-locked loop, FM noise in the modulator output will not be a problem, and the characteristics will be much better than in the case of a VCO. FIG. 9 is a block diagram showing a specific example of the present invention. In this embodiment, a temperature-compensated stable crystal oscillator, for example, is used for the SFO, and the frequency division ratio of frequency dividers M and N is set to m=n=1024. (In this case, f VCXO = f SFO .) In addition, the other parts are KPD, KLPF,
KVCXO respectively KPD=8/π, KLPF=1,
Select KVCXO=2π× 104 .

このときのループゲインKOは前2式からKO
2.5π×20〔ラジアン/秒〕となり、ループカツ
トオフ周波数はfC≒25〔Hz〕となるから音声及
びデータ通信用の周波数変調器として十分にフラ
ツトな変調周波数特性をもたせることができる。
又、ロツクインレンジ特性は前述の如くPD入力
から見た場合KOに等しく2.5π×20ラジアンであ
るがVCXO出力で見るときはこれがn倍され約
2.5π×20×103ラジアンとなる。
The loop gain K O at this time is K O ≒ from the previous two equations.
2.5π×20 [radians/second], and the loop cutoff frequency is f C ≈25 [Hz], so that it is possible to provide a sufficiently flat modulation frequency characteristic as a frequency modulator for voice and data communications.
Also, as mentioned above, when viewed from the PD input, the lock-in range characteristic is equal to K O and is 2.5π x 20 radians, but when viewed from the VCXO output, this is multiplied by n and becomes approximately
It becomes 2.5π×20×10 3 radians.

従つてVCXOに要求される周波数安定度はn×
O/2π≒20〔KHz〕以下であればよいことに
なる。すなわち、ごく簡単なVCXOで十分得られ
る特性となつている。
Therefore, the frequency stability required for the VCXO is n×
It is sufficient if K O /2π≒20 [KHz] or less. In other words, the characteristics are sufficient to be obtained with a very simple VCXO.

又、変調器付デジタルシンセサイザーで問題と
なるcを下げた時に生ずるVCOのFM雑音は先
に述べた様にここではVCOをVCXOに変えてあ
るので、問題とはならない。
Also, the FM noise of the VCO that occurs when c is lowered, which is a problem with a digital synthesizer with a modulator, is not a problem because the VCO is replaced with a VCXO as mentioned earlier.

又、変調歪に関しては前記第1図にて説明した
方式と異なりVCXOの利得つまり感度を大きくす
ることが可能であり変調信号レベルが小さくて済
むから変調歪特性を向上することができる。
Further, regarding modulation distortion, unlike the method described in FIG. 1, it is possible to increase the gain or sensitivity of the VCXO, and the modulation signal level can be reduced, so that the modulation distortion characteristics can be improved.

更には、VCXOの感度の他PD及びLPFの利得
をともに大きくすることができるから1/n倍す
る以前の総合利得を大きくしてロツクインレンジ
の拡大をはかることができる。
Furthermore, since it is possible to increase both the gain of the PD and LPF in addition to the sensitivity of the VCXO, the lock-in range can be expanded by increasing the total gain before multiplying by 1/n.

ロツクインレンジが大きいことはこれに用いる
VCXOの周波数安定度に対する許容値が広がり簡
単かつ安価な回路構成をもつたVCXOを採用しう
る。
The large lock-in range is used for this purpose.
A VCXO with a wider tolerance for frequency stability and a simple and inexpensive circuit configuration can be used.

(発明の効果) 本発明は以上説明したように構成するものであ
るから、充分な周波数安定度をもち、変調信号周
波数の低い範囲にわたつて平坦な変調特性を有し
かつ歪特性の優れた変調器付き発振器を安価に実
現するうえで著効を奏する。
(Effects of the Invention) Since the present invention is constructed as described above, it has sufficient frequency stability, flat modulation characteristics over a low range of modulation signal frequencies, and excellent distortion characteristics. This is extremely effective in realizing an oscillator with a modulator at low cost.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の位相同期VCXOを用いた周波数
変調方式を示したブロツク図。第2図は第1図の
方式における変調周波数特性を示した特性図。第
3図は従来の位相同期VCXOにおける変調特性、
ロツクインレンジ特性を改良するための一方式を
示したブロツク図。第4図は第3図の方式におい
て変調周波数特性が改善される過程を示した特性
図。第5図は従来の位相同期VCXOにおける変調
特性、ロツクインレンジ特性を改良するための一
方式を示したブロツク図。第6図は第5図の方式
において変調周波数特性ロツクインレンジ特性が
改善される過程を示す特性図。第7図は周波数変
調器付デジタル周波数シンセサイザーの原理を示
したブロツク図。第8図は本発明による周波数変
調方式を示したブロツク図。第9図は本発明によ
る周波数変調方式の一実施例を示すブロツク図。 SFO:基準周波数発振器、PD:位相比較器、
LPF:低域波器、VCXO:電圧制御水晶発振
器、VCO:電圧制御発振器、N,M:固定分周
器、NV:可変分周器、DET:同期外れ検出器、
SW:切替器、INT:積分器。
Figure 1 is a block diagram showing a frequency modulation method using a conventional phase-locked VCXO. FIG. 2 is a characteristic diagram showing modulation frequency characteristics in the method of FIG. 1. Figure 3 shows the modulation characteristics of a conventional phase-locked VCXO.
FIG. 2 is a block diagram showing one method for improving lock-in range characteristics. FIG. 4 is a characteristic diagram showing the process by which modulation frequency characteristics are improved in the method of FIG. FIG. 5 is a block diagram showing one method for improving the modulation characteristics and lock-in range characteristics of a conventional phase-locked VCXO. FIG. 6 is a characteristic diagram showing the process by which the modulation frequency characteristic lock-in range characteristic is improved in the method of FIG. FIG. 7 is a block diagram showing the principle of a digital frequency synthesizer with a frequency modulator. FIG. 8 is a block diagram showing a frequency modulation method according to the present invention. FIG. 9 is a block diagram showing an embodiment of the frequency modulation method according to the present invention. SFO: Reference frequency oscillator, PD: Phase comparator,
LPF: Low frequency filter, VCXO: Voltage controlled crystal oscillator, VCO: Voltage controlled oscillator, N, M: Fixed frequency divider, N V : Variable frequency divider, DET: Out-of-sync detector,
SW: Switch, INT: Integrator.

Claims (1)

【特許請求の範囲】 1 基準周波数発振器と電圧制御水晶発振器出力
信号の両者を入力とする位相比較器の出力に低域
波器を接続して得られる直流電圧を該電圧制御
水晶発振器の制御電圧とする位相同期ループ系の
該直流電圧に変調用交流信号を重畳させて該電圧
制御水晶発振器出力より周波数変調信号を得る如
くする周波数変調方式に於て、該電圧制御水晶発
振器と位相比較器との間に固定分周器を挿入する
と共に、前記位相同期系のループカツトオフ周波
数が変調信号周波数の最低周波数より小さくなる
ように前記固定分周器の分周数を大きく設定した
ことを特徴とする周波数変調方式。 2 基準周波数発振器と位相比較器間にも固定分
周器を挿入した第1項記載の周波数変調方式。
[Claims] 1. A DC voltage obtained by connecting a low-frequency amplifier to the output of a phase comparator that receives both a reference frequency oscillator and a voltage-controlled crystal oscillator output signal as the control voltage of the voltage-controlled crystal oscillator. In a frequency modulation method in which a modulating AC signal is superimposed on the DC voltage of a phase-locked loop system to obtain a frequency modulation signal from the output of the voltage-controlled crystal oscillator, the voltage-controlled crystal oscillator and the phase comparator are combined. A fixed frequency divider is inserted between the two, and the frequency division number of the fixed frequency divider is set to be large so that the loop cutoff frequency of the phase synchronization system is smaller than the lowest frequency of the modulation signal frequency. frequency modulation method. 2. The frequency modulation method according to item 1, in which a fixed frequency divider is also inserted between the reference frequency oscillator and the phase comparator.
JP954576A 1976-01-30 1976-01-30 Frequency modulating system Granted JPS5293261A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP954576A JPS5293261A (en) 1976-01-30 1976-01-30 Frequency modulating system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP954576A JPS5293261A (en) 1976-01-30 1976-01-30 Frequency modulating system

Publications (2)

Publication Number Publication Date
JPS5293261A JPS5293261A (en) 1977-08-05
JPS6127923B2 true JPS6127923B2 (en) 1986-06-27

Family

ID=11723235

Family Applications (1)

Application Number Title Priority Date Filing Date
JP954576A Granted JPS5293261A (en) 1976-01-30 1976-01-30 Frequency modulating system

Country Status (1)

Country Link
JP (1) JPS5293261A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59101910A (en) * 1982-12-02 1984-06-12 Fujitsu Ltd Frequency modulator

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS535503A (en) * 1976-07-02 1978-01-19 Matsushita Electric Ind Co Ltd Tv tuner

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS535503A (en) * 1976-07-02 1978-01-19 Matsushita Electric Ind Co Ltd Tv tuner

Also Published As

Publication number Publication date
JPS5293261A (en) 1977-08-05

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