JPS61263155A - Solid-state image pickup device and manufacture thereof - Google Patents
Solid-state image pickup device and manufacture thereofInfo
- Publication number
- JPS61263155A JPS61263155A JP60104319A JP10431985A JPS61263155A JP S61263155 A JPS61263155 A JP S61263155A JP 60104319 A JP60104319 A JP 60104319A JP 10431985 A JP10431985 A JP 10431985A JP S61263155 A JPS61263155 A JP S61263155A
- Authority
- JP
- Japan
- Prior art keywords
- solid
- groove
- region
- semiconductor substrate
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 238000002955 isolation Methods 0.000 claims abstract description 32
- 239000004065 semiconductor Substances 0.000 claims abstract description 32
- 239000000758 substrate Substances 0.000 claims abstract description 32
- 239000012535 impurity Substances 0.000 claims description 38
- 238000003384 imaging method Methods 0.000 claims description 21
- 238000000034 method Methods 0.000 claims description 13
- 230000003287 optical effect Effects 0.000 abstract description 6
- 230000035945 sensitivity Effects 0.000 abstract description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 5
- 229920005591 polysilicon Polymers 0.000 abstract description 5
- 238000006243 chemical reaction Methods 0.000 abstract description 4
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 239000006185 dispersion Substances 0.000 abstract 1
- 239000000463 material Substances 0.000 description 9
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000003086 colorant Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
【発明の詳細な説明】 〔発明の技術分野〕 本発明は固体Ｒ像装置およびその製造方法に関する。[Detailed description of the invention] [Technical field of invention] The present invention relates to a solid-state R image device and a method for manufacturing the same.
〔発明の技術的１１Ｍとその問題点〕
従来の縦形オーバフロードレイン構造を有するインタラ
イン転送方式のＣＣＤ （Ｃｈａｒｇｅ Ｃｏｕｐｌｅ
ｄＤｅｖｉｃｅ）固体ｍ像装置を第３図に示す。第３図
（ａ）は固体撮像装置の平面図、第３図（ｂ）はそのＡ
−Ａ’線断面図である、固体搬像装置は入射した光によ
り信号電荷が生成され、蓄積される感光画素部１と蓄積
された信号電荷が読み出される読出部２とから構成され
る。第３図（ｂ）の断面図は、１個の感光画素部１およ
びこの感光画素部１に隣接する画素分離領域３の断面を
示す。例えばＮ型シリコン基板からなる半導体基板４表
面に不純物濃度が低く接合が浅い第１のＰウェル領域５
と不純物濃度が比較的高く接合が深い第２のＰウェル領
域６とが形成されている。第１のＰウェル領域５表面に
は感光画素部１に対応してＮ 不純物領域７が形成され
、第２のＰウェル領域６表面には画素分離領域３に対応
してチャンネルストッパとしてのＰ＋不純物領域９が形
成され、また読出部２に対応して埋め込みチャンネルと
してのＮ 不純物領域（図示せず）およびチャンネルス
トッパとしてのＰ＋不純物領域（図示せず）が形成され
ている。接合の深さを異にした第１および第２のＰウェ
ル領域５．６を有する縦形オーバフロードレイン構造に
より強い光が入射して感光画素部１のＮ＋不純物領域７
に過剰電荷が発生した場合、この過剰電荷が第１および
第２のＰウェル領域５゜６のパンチスルー電圧の差によ
って読出部２に流れ込むことなく、半導体基板４の厚み
方向に流れ込むようになっている。また半導体基板４上
には絶縁層１０が形成され、この絶縁層１ｏの内部には
第１の転送電極１１および第２の転送電極１２が設けら
れている。この第２の転送電極１２は第１の転送電極１
１と対になって感光画素部１のＮ＋不純物領域７に蓄積
された信号電荷を読み出す読出部を形成している。これ
ら第１および第２の転送電極１１．１２の上方の絶縁１
１０上には例えばＡ１層からなる光シールド層が形成さ
れ、感光画素部１以外の部分に光が入射しないようにな
っている。また感光画素部１にＮ＋不純物領域７上の絶
縁層１０上にはそれぞれ所定の色フィルタ（図示せず）
が設けられている。[Technical 11M of the invention and its problems] CCD (Charge Couple) using an interline transfer method having a conventional vertical overflow drain structure
dDevice) A solid-state m-image device is shown in FIG. FIG. 3(a) is a plan view of the solid-state imaging device, and FIG. 3(b) is its A.
The solid-state image transfer device shown in the cross-sectional view taken along the line -A' includes a photosensitive pixel section 1 in which signal charges are generated and accumulated by incident light, and a readout section 2 from which the accumulated signal charges are read out. The cross-sectional view of FIG. 3(b) shows a cross section of one photosensitive pixel portion 1 and the pixel isolation region 3 adjacent to this photosensitive pixel portion 1. For example, a first P well region 5 with a low impurity concentration and a shallow junction is formed on the surface of a semiconductor substrate 4 made of an N-type silicon substrate.
A second P well region 6 having a relatively high impurity concentration and a deep junction is formed. An N impurity region 7 is formed on the surface of the first P well region 5 corresponding to the photosensitive pixel portion 1, and a P+ impurity region 7 as a channel stopper is formed on the surface of the second P well region 6 corresponding to the pixel isolation region 3. A region 9 is formed, and an N 2 impurity region (not shown) as a buried channel and a P+ impurity region (not shown) as a channel stopper are formed corresponding to the readout section 2 . Due to the vertical overflow drain structure having the first and second P well regions 5.6 with different junction depths, strong light enters the N+ impurity region 7 of the photosensitive pixel portion 1.
When excess charge is generated in the semiconductor substrate 4, this excess charge does not flow into the readout section 2 but flows into the thickness direction of the semiconductor substrate 4 due to the difference in punch-through voltage between the first and second P well regions 5.6. ing. Further, an insulating layer 10 is formed on the semiconductor substrate 4, and a first transfer electrode 11 and a second transfer electrode 12 are provided inside the insulating layer 1o. This second transfer electrode 12 is the first transfer electrode 1
1 forms a readout section for reading out signal charges accumulated in the N+ impurity region 7 of the photosensitive pixel section 1. Insulation 1 above these first and second transfer electrodes 11.12
A light shield layer made of, for example, an A1 layer is formed on the photosensitive pixel portion 10 to prevent light from entering the portion other than the photosensitive pixel portion 1 . Further, predetermined color filters (not shown) are provided on the insulating layer 10 on the N+ impurity region 7 in the photosensitive pixel portion 1, respectively.
is provided.
次に上記の従来の固体撮像装置の製造方法を第４図に示
す。例えばＮ型シリコン基板から成る半導体基板４表面
に不純物濃度が低く接合の浅い第１のＰウェル領域５と
不純物濃度が比較的高く接合の深い第２のＰウェル領１
１１６とを形成し、この第１のＰウェル領域５表面に感
光画素部としてのＮ＋不純物領域７を形成する（第４図
（ａ））。また第２のＰウェル領ｂＸ６表面には埋め込
みチＶンネルとしてのＮ＋不純物領域（図示せず）およ
び感光画素部１を分離するためのチャンネルストッパと
してのＰ＋不純物領域９を形成する（第４図（ｂ））。Next, FIG. 4 shows a method of manufacturing the above-mentioned conventional solid-state imaging device. For example, on the surface of a semiconductor substrate 4 made of an N-type silicon substrate, there is a first P-well region 5 with a low impurity concentration and a shallow junction, and a second P-well region 1 with a relatively high impurity concentration and a deep junction.
116, and an N+ impurity region 7 as a photosensitive pixel portion is formed on the surface of the first P well region 5 (FIG. 4(a)). Further, on the surface of the second P well region bX6, an N+ impurity region (not shown) as a buried channel and a P+ impurity region 9 as a channel stopper for separating the photosensitive pixel portion 1 are formed (see FIG. 4). (b)).
半導体基板４上の全面に絶縁層１ｏを形成し、この絶縁
層１０上の第２のＰウェル領域６に対応する所定の場所
に例えばポリシリコンから成る第１の転送電極１１を形
成する（第４図（Ｃ））。この第１の転送電極１１の表
面を酸化して酸化膜１０を形成した後、この酸化膜１０
上の第２のＰウェル領域６に対応する所定の場所に第２
の転送電極１２を形成する（第４図（ｄ））。さらに第
２の転送電極１２上に絶ａ！ｒ１１０を形成し、第１の
転送電極１１および第２の転送電極１２が共に絶縁層１
０によって覆われた状態にする。ししてこの絶縁層１０
上の所定の場所に例えばＡ１層から成る光シールド層１
３を形成して第１の転送電極１１および第２の転送電極
１２の上方を完全に覆う（第４図（ｅ））。最後にレジ
スト材料に近い材質からなるフィルタ材料を全面に塗布
し、パターニングを行い、感光画素部としてのＮ＋領域
７上の絶縁層１０上にそれぞれ所定の色の色フィルタを
形成する。An insulating layer 1o is formed on the entire surface of the semiconductor substrate 4, and a first transfer electrode 11 made of polysilicon, for example, is formed at a predetermined location corresponding to the second P well region 6 on this insulating layer 10 (first Figure 4 (C)). After oxidizing the surface of this first transfer electrode 11 to form an oxide film 10, this oxide film 10 is
A second P well region 6 is located at a predetermined location corresponding to the second
A transfer electrode 12 is formed (FIG. 4(d)). Furthermore, there is an absolute aa! on the second transfer electrode 12! r110, and both the first transfer electrode 11 and the second transfer electrode 12 are connected to the insulating layer 1.
Covered by 0. This insulating layer 10
A light shield layer 1 made of, for example, an A1 layer is placed at a predetermined location on the top.
3 to completely cover the upper part of the first transfer electrode 11 and the second transfer electrode 12 (FIG. 4(e)). Finally, a filter material made of a material similar to the resist material is applied over the entire surface and patterned to form color filters of predetermined colors on the insulating layer 10 on the N+ region 7 serving as the photosensitive pixel portion.
ところで、画素分離領域３は本来感光画素部と感光画素
部とを分離するための領域であり、集積度が向上してさ
た場合、設計上できるだけその面積を小さくすることが
望ましい。また従来の固体撮像装置の場合、この領域に
おいて第１および第２の転送電極１１．１２が重なりあ
って存在しているために、第４図（＋３）に示されるよ
うに非常に大きな凹凸形状になっている。このように非
常に狭い面積の中で凹凸の激しい形状に色フィルタを形
成した場合には半導体基板４上に塗布されたフィルタ材
料の厚ざむらに起因するストリエーション現象が発生し
、このストリエーション現象が発生した固体搬像装置に
よる撮像は画面に縞状のむらが現れるという問題があっ
た。このストリエーション現象とは半導体基板上にレジ
スト材料を回転塗布する際にレジスト材料が完全に均一
に塗布されず、半導体基板上にレジスト材料の放射状の
ｇ！厚むらができる現象である。Incidentally, the pixel separation region 3 is originally a region for separating the photosensitive pixel portion from the photosensitive pixel portion, and as the degree of integration increases, it is desirable to reduce its area as much as possible in terms of design. Furthermore, in the case of a conventional solid-state imaging device, since the first and second transfer electrodes 11 and 12 overlap each other in this region, the uneven shape is extremely large as shown in FIG. 4 (+3). It has become. When a color filter is formed in a highly uneven shape in a very narrow area like this, a striation phenomenon occurs due to the uneven thickness of the filter material applied on the semiconductor substrate 4. Imaging by a solid-state imaging device in which this occurs has a problem in that striped unevenness appears on the screen. This striation phenomenon refers to the fact that when a resist material is spin coated onto a semiconductor substrate, the resist material is not completely evenly coated, resulting in radial g! This is a phenomenon that causes uneven thickness.
また光シールドＷ１１３の形成においても、狭い面積の
中で凹凸の激しい形状であるため、ＡＩを全面に蒸着し
、エツチングにより所定のパターニングを行う際に、場
所場所によってパターン変換差が大きくばらつき、転送
電極の一部が光シールドｌｉ！２１３によって覆われな
い事態が発生し、このことに起因して撮像における一種
の感度むらが起こるという問題もあった。In addition, when forming the optical shield W113, since the shape is extremely uneven in a small area, when AI is deposited on the entire surface and a predetermined pattern is performed by etching, the pattern conversion difference varies greatly depending on the location, and the transfer Part of the electrode is a light shield! 213, which causes a kind of sensitivity unevenness in imaging.
本発明は上記事情を考慮してなされたもので、ストリエ
ーションなどによる感度むらが生じないようにした固体
撮像装置およびその製造方法を提供することを目的とす
る。The present invention has been made in consideration of the above circumstances, and it is an object of the present invention to provide a solid-state imaging device and a method for manufacturing the same, which prevent unevenness in sensitivity due to striations or the like from occurring.
上記目的を達成するため本発明による固体撮像装置は、
半導体基板と、この半導体基板上に配列され、入射した
光により生成した信号電荷を蓄積する感光画素部と、こ
の感光画素部に隣接して配列され、前記感光画素部に蓄
積された信号電荷を転送電極により転送して読み出す読
出部と、この読出部の転送電極が配線され、この感光画
素部を分離する画素分離領域とを有する固体搬像装置に
おいて、前記半導体基板上の前記画素分離領域に）清を
形成し、この溝内に前記読出部の転送電極を埋め込んだ
ことを特徴とする。In order to achieve the above object, a solid-state imaging device according to the present invention includes:
a semiconductor substrate; a photosensitive pixel section arranged on the semiconductor substrate to accumulate signal charges generated by incident light; and a photosensitive pixel section arranged adjacent to the photosensitive pixel section to accumulate signal charges accumulated in the photosensitive pixel section. In a solid-state image device having a readout section that transfers and reads data using a transfer electrode, and a pixel isolation region to which the transfer electrode of the readout section is wired and isolates the photosensitive pixel section, the pixel isolation region on the semiconductor substrate is provided with a pixel isolation region. ), and the transfer electrodes of the reading section are embedded in the grooves.
また本発明による固体搬像装置の製造方法は、半導体基
板表面に接合の浅い第１の第１導電型ウェル領域と接合
の深い第２の第１導電型ウェル領域とを形成する第１の
工程と、前記第１の第１導電型ウェル領域表面に第２導
電型不純物を添加して感光画素部を形成する第２の工程
と、前記第２の第１導電型ウェル領域表面に第２導電型
不純物を添加して読出部の埋め込みチャンネルを形成す
る第３の工程と、前記第２の第１導電型ウェル領域表面
に第１導電型不純物を添加して画素分離領域のチャンネ
ルストッパを形成する第４の工程と、前記半導体基板上
の全面に絶縁層を形成する第５の工程と、前記埋め込み
チャンネルおよび前記チャンネルストッパ上の前記絶縁
層上に続出部の転送電極を形成する第６の工程とを有す
る固体撮像装置の製造方法において、前記第４の工程よ
り前に、前記半導体基板上の前記画素分離領域に溝を形
成する工程を有し、前記転送電極が前記画素分離領域に
おい又前記溝内に設けられることを特徴とする。この溝
を形成する工程は、前記第２の第１導電型ウェル領域表
面に第１導電型不純物を添加して画素分離領域のチャン
ネルストッパーを形成する。第４の工程より前のどの工
程においても実施されることができる。Further, the method for manufacturing a solid-state image transfer device according to the present invention includes a first step of forming a first well region of the first conductivity type with a shallow junction and a second well region of the first conductivity type with a deep junction on the surface of a semiconductor substrate. a second step of adding a second conductivity type impurity to the surface of the first first conductivity type well region to form a photosensitive pixel portion; and adding a second conductivity type impurity to the surface of the second first conductivity type well region. a third step of adding type impurities to form a buried channel of the readout section; and adding a first conductivity type impurity to the surface of the second first conductivity type well region to form a channel stopper of the pixel isolation region. a fourth step, a fifth step of forming an insulating layer over the entire surface of the semiconductor substrate, and a sixth step of forming a continuous transfer electrode on the insulating layer on the buried channel and the channel stopper. The method for manufacturing a solid-state imaging device has a step of forming a groove in the pixel isolation region on the semiconductor substrate before the fourth step, and the transfer electrode is disposed in the pixel isolation region or in the pixel isolation region on the semiconductor substrate. It is characterized by being provided within the groove. In the step of forming this groove, a first conductivity type impurity is added to the surface of the second first conductivity type well region to form a channel stopper of the pixel isolation region. It can be performed at any step before the fourth step.
これにより画素分離領域における第１および第２の転送
電極および光シールド層が溝内ないしは溝の上方に設け
られることになり、画素分離領域における凸形状の程度
が小さくなるようにしたものである。As a result, the first and second transfer electrodes and the optical shield layer in the pixel isolation region are provided in the groove or above the groove, thereby reducing the degree of convexity in the pixel isolation region.
（発明の実施例〕
本発明の一実施例による固体１（ｌＪＩ装買の平面図を
第１図（ａ）に、そのＡ−Ａ’線断面図を第１図（ｂ）
にそれぞれ示す。入射した光により信号電荷が生成され
、蓄積される感光画素部１は格子状に多数配列され、蓄
積された信号電荷が読み出される読出部２は感光画素部
１に隣接して垂直ライン状に水平方向に交互に配列され
ている。また各感光画素部１は垂直方向に隣接する画素
弁Ｉｉ！領域３によって分離されている。第１図（ｂ）
は１個の感光画素部１およびこの感光画素部１に垂直方
向に隣接する画素分離領域３の断面を示している。Ｎ型
半導体基板４表面の画素分子ｆｉｌｉｒ４域３に対応す
る部分に深さ６０００人〜８０００人程度の溝が形成さ
れている。また半導体基板４表面の感光画素部１に対応
する部分には不純物濃度が低く接合の浅い第１のＰウェ
ル領域５が形成され、読出部２および溝が形成されてい
る画素分離領域３に対応する部分には不純物濃度が高く
接合の深い第２のＰウェル領域６が形成されている。第
１のＰウェル領域５表面には感光画素部１としてのＮ＋
不純物領域７が形成され、第２のＰウェル領域６表面の
読出部２に対応する部分には感光画素部１のＮ＋不純物
領域７からの信号電荷を読み出すための埋め込みチャン
ネルとしてのＮ＋不純物領域（図示せず）およびチャン
ネルストッパとしてのＰ＋不純物領域（図示せず）が形
成され、また溝が形成されている画素分離領域３に対応
する部分にチャンネルストッパとしてのＰ＋不純物領域
９が形成されている。また半導体基板４上には絶縁層１
０が形成され、この絶縁層１０内部に例えばポリシリコ
ンから成る第１の転送電極１１および第２の転送電極１
２が互いに分離されて形成されている。これらの第１お
よび第２の転送電極１１゜１２は画素分離領域３におい
て溝内に埋め込まれた形状と成っていることに特徴があ
る。第１および第２の転送電極１１．１２の上方の絶縁
層１０上には例えばＡ１層から成る光シールド層１３が
形成され、感光画素部１以外の部分に光が入射しないよ
うになっている。また感光画素部１のＮ＋不純物領域７
上の絶縁層１０上にはそれぞれ所定の色フィルタ（図示
せず）が設けられている。(Embodiment of the Invention) A plan view of a solid body 1 (IJI equipment) according to an embodiment of the present invention is shown in FIG.
are shown respectively. A large number of photosensitive pixel sections 1, in which signal charges are generated and accumulated by incident light, are arranged in a grid pattern, and readout sections 2, from which the accumulated signal charges are read out, are arranged horizontally in vertical lines adjacent to the photosensitive pixel sections 1. arranged in alternating directions. Furthermore, each photosensitive pixel portion 1 has vertically adjacent pixel valves Ii! Separated by region 3. Figure 1(b)
1 shows a cross section of one photosensitive pixel portion 1 and a pixel isolation region 3 vertically adjacent to this photosensitive pixel portion 1. FIG. A groove having a depth of approximately 6,000 to 8,000 grooves is formed in a portion of the surface of the N-type semiconductor substrate 4 corresponding to the region 3 of the pixel molecule filir4. In addition, a first P-well region 5 with a low impurity concentration and a shallow junction is formed in a portion of the surface of the semiconductor substrate 4 corresponding to the photosensitive pixel portion 1, and corresponds to the readout portion 2 and the pixel isolation region 3 in which the groove is formed. A second P-well region 6 with a high impurity concentration and a deep junction is formed in the region where the semiconductor layer is formed. On the surface of the first P well region 5, an N+
An impurity region 7 is formed, and in a portion of the surface of the second P well region 6 corresponding to the readout section 2, an N+ impurity region ( (not shown) and a P+ impurity region (not shown) as a channel stopper are formed, and a P+ impurity region 9 as a channel stopper is formed in a portion corresponding to the pixel isolation region 3 where the groove is formed. . Further, an insulating layer 1 is provided on the semiconductor substrate 4.
0 is formed, and inside this insulating layer 10, a first transfer electrode 11 and a second transfer electrode 1 made of polysilicon, for example, are formed.
2 are formed separately from each other. These first and second transfer electrodes 11 and 12 are characterized in that they are embedded in trenches in the pixel isolation region 3. A light shield layer 13 made of, for example, an A1 layer is formed on the insulating layer 10 above the first and second transfer electrodes 11 and 12 to prevent light from entering areas other than the photosensitive pixel portion 1. . In addition, the N+ impurity region 7 of the photosensitive pixel portion 1
Predetermined color filters (not shown) are provided on the upper insulating layer 10, respectively.
このように本実施例によれば、画素分離領域において絶
縁層１０内部に形成される第１および第２の転送電極１
１．１２が半導体基板４表面に形成された溝内に埋め込
まれた形状となるため、この画素分離領域３における絶
縁層１０の凸状の盛り上がりは比較的小さなものとなり
、従来の固体撮像装置と比較すると、その表面の凹凸の
程度は小さくなる。これによって光シールド層１３の場
所場所によるパターン変換差の大きなばらつきもなくな
り、第１および第２の転送電極１１．１２の一部が光シ
ールド層１３によって覆われないことに起因づるＩｍに
おける一種の感度むらが起こることを防ぐことができる
。また表面の凹凸形状によるストリエーション現象も発
生しにくくなり、感光画素部１の色フィルタは均一な厚
さとなって色フィルタの厚さむらに起因する搬像画面に
おける縞状のむらの発生を防ぐことができる。As described above, according to this embodiment, the first and second transfer electrodes 1 formed inside the insulating layer 10 in the pixel isolation region
1.12 is embedded in the groove formed on the surface of the semiconductor substrate 4, so the convex protrusion of the insulating layer 10 in the pixel isolation region 3 is relatively small, making it different from the conventional solid-state imaging device. By comparison, the degree of unevenness on the surface becomes smaller. This eliminates large variations in pattern conversion differences depending on the location of the optical shield layer 13, and eliminates a type of pattern conversion difference in Im caused by parts of the first and second transfer electrodes 11, 12 not being covered by the optical shield layer 13. It is possible to prevent uneven sensitivity from occurring. In addition, the striation phenomenon due to the uneven shape of the surface is less likely to occur, and the color filter of the photosensitive pixel portion 1 has a uniform thickness, thereby preventing the occurrence of striped unevenness on the image carrying screen due to uneven thickness of the color filter. I can do it.
次に本発明の一実施例による固体ｉｌｌ像装置の製造方
法を第２図を用いて説明する。Ｎ型半導体基板４表面に
不純物濃度が低く接合の浅い第１のＰウェル領ｆｉｌｌ
！５と不純物濃度が比較的高く接合の深い第２のＰウェ
ル領域６とを形成した復、第１のＰウェル領ｉ！！５表
面に感光画素部としてのＮ＋不純物領域７を形成する〈
第２図（ａ））。次に第２のＰウェル領１６表面に埋め
込みデセンネルとしてのＮ＋不純物領域を形成する（図
示せず）。そして第２のＰウェル領域６表面の画素分離
領域１３に対応する部分を例えばＣＤ Ｅ （Ｃｈｅｍ
ｉｃａｌｔ＋ｒｙ Ｅｔｃｈｉｎｇｌ法を用いて６００
０人〜８０００八程度エツチングして溝８を形成する（
第２図（ｂ））。次にチャンネルストッパを形成するが
、画素分離領域１３においては溝８の内側表面にチャン
ネルストッパとしてのＰ＋不純物領域９が形成される（
第２図（Ｃ））。半導体基板４表面を酸化して絶縁Ｒ１
０を形成した後、この絶縁層１０上の第２のＰウェル領
域６に対応する所定の場所に例えばポリシリコンから成
る第１の転送電極１１を形成するが、画素分離領ＩＩｉ
！１３においては溝内に埋め込まれた形状となる（第２
図（ｄ））。Next, a method of manufacturing a solid-state illumination device according to an embodiment of the present invention will be explained using FIG. A first P-well region fill with a low impurity concentration and a shallow junction is formed on the surface of the N-type semiconductor substrate 4.
! 5 and the second P well region 6 with relatively high impurity concentration and deep junction, the first P well region i! ! Form an N+ impurity region 7 as a photosensitive pixel portion on the surface of 5.
Figure 2(a)). Next, an N+ impurity region as a buried desennel is formed on the surface of the second P well region 16 (not shown). Then, a portion of the surface of the second P well region 6 corresponding to the pixel isolation region 13 is formed by, for example, CD E (Chem
600 using the icalt+ry Etchingl method
Etch approximately 0 to 8,000 to form grooves 8 (
Figure 2(b)). Next, a channel stopper is formed. In the pixel isolation region 13, a P+ impurity region 9 as a channel stopper is formed on the inner surface of the groove 8.
Figure 2 (C)). Oxidize the surface of the semiconductor substrate 4 to insulate R1
0, a first transfer electrode 11 made of polysilicon, for example, is formed at a predetermined location corresponding to the second P well region 6 on this insulating layer 10.
! 13, the shape is embedded in the groove (second
Figure (d)).
この第１の転送電極１１表面を酸化して絶縁層１０を形
成した後、この絶縁）Ｘ１０上の第２のＰウェル領域６
に対応する所定の場所にだおてばポリシリコンから成る
第２の転送電極１２を形成するが画素分離領域１３にお
いては溝内に埋め込まれた形状となる（第２図（ｅ））
。この第２の転送電極１２上に絶縁Ｂ１０を形成すると
、第１および第２の転送電極１１．１２は互いに絶縁層
１０によって分離されつつ、絶縁層１０によって包み込
まれた状態となる。次にこの絶縁ｍ１０上の所定の場所
に例えばＡ１層から成る光シールド層１３を形成し、第
１および第２の転送電極１１゜１２の上方を完全に覆い
、感光画素部１としてのＮ＋＋純物領域７以外の部分に
光が入射しないようにする（第２図（「））。最侵にレ
ジスト材料に近い材質から成るフィルタ材料を全面に回
転塗布し、バターニングを行ない、感光画素部１として
のＮ＋不不純頭領ｌ１１７上絶縁層１０上にそれぞれ所
定の色の色フィルタを形成する（図示せず）。After oxidizing the surface of this first transfer electrode 11 to form an insulating layer 10, a second P well region 6 is formed on this insulating layer 10.
The second transfer electrode 12 made of polysilicon is formed by placing it in a predetermined location corresponding to the pixel isolation region 13 (FIG. 2(e)).
. When the insulation B10 is formed on the second transfer electrode 12, the first and second transfer electrodes 11.12 are separated from each other by the insulating layer 10 and are surrounded by the insulating layer 10. Next, a light shield layer 13 made of, for example, an A1 layer is formed at a predetermined location on this insulation m10, completely covering the upper parts of the first and second transfer electrodes 11 and 12, and forming an N++ pure layer as the photosensitive pixel section 1. Prevent light from entering areas other than the object area 7 (Fig. 2 ()). At the most invasive area, a filter material made of a material similar to the resist material is spin-coated over the entire surface, buttering is performed, and the photosensitive pixel area is Color filters of predetermined colors are formed on the insulating layer 10 over the N+ impurity head 1117 (not shown).
上記実施例において埋め込みチャンネルとしてのＮ＋＋
純物領域を形成した後に行なわれた半導体基板４表面の
画素分離領域に対応する部分に溝８を形成ブる■程は、
チャンネルストッパとしてのＰ＋不純物領域９の形成す
る前であればいつでもよい。例えば感光画素部１として
のＮ＋＋純物領域７の形成後、埋め込みチャンネルとし
てのＮ＋＋純物領域の形成前に行ってもよい。また第１
および第２のＰウェル領域５．６の形成後、感光画素と
してのＮ＋不不純頭領７の形成前に行ってもよい。さら
に第１および第２のＰウェル領域５．６の形成前に行っ
てもよい。N++ as an embedded channel in the above embodiment
The step of forming the groove 8 in the portion corresponding to the pixel isolation region on the surface of the semiconductor substrate 4 performed after forming the pure region is as follows.
Any time may be used as long as it is before the formation of P+ impurity region 9 as a channel stopper. For example, it may be performed after forming the N++ pure region 7 as the photosensitive pixel portion 1 and before forming the N++ pure region as the buried channel. Also the first
It may also be performed after the formation of the second P well region 5.6 and before the formation of the N+ impurity head region 7 as a photosensitive pixel. Furthermore, it may be performed before forming the first and second P well regions 5.6.
以上の通り本発明によれば固体撮像装置の表面における
凹凸形状を軽減し、ストリエーションなどによる感度む
らを防止することができる。As described above, according to the present invention, unevenness on the surface of a solid-state imaging device can be reduced, and sensitivity unevenness due to striations or the like can be prevented.
第１図は本発明の一実施例による固体Ｉｌ＠装置を示す
平面図および断面図、第２図は本発明の一実施例による
固体Ｒ像装置の製造方法を示す工程図、第３図は従来の
固体撮像装置を示す平面図および断面図、第４図は従来
の固体撮像装置の製造方法を示す工程図である。
１・・・感光画素部、２・・・読出部、３・・・画素分
離領域、４・・・半導体基板、５，６・・・Ｐウェル領
域、７・・・Ｎ＋＋純物領域、８・・・溝、９・・・Ｐ
＋不純物領域、１０・・・絶縁層、１１．１２・・・転
送電極、１３・・・光シールド層。
出願人代理人 猪 股 清
第１図
第２図FIG. 1 is a plan view and a sectional view showing a solid-state Il@ device according to an embodiment of the present invention, FIG. 2 is a process diagram showing a method of manufacturing a solid-state R image device according to an embodiment of the present invention, and FIG. FIG. 4 is a plan view and a sectional view showing a conventional solid-state imaging device, and a process diagram showing a method for manufacturing the conventional solid-state imaging device. DESCRIPTION OF SYMBOLS 1... Photosensitive pixel part, 2... Readout part, 3... Pixel isolation region, 4... Semiconductor substrate, 5, 6... P well region, 7... N++ pure region, 8 ...Groove, 9...P
+ impurity region, 10... insulating layer, 11.12... transfer electrode, 13... light shield layer. Applicant's agent Kiyoshi Inomata Figure 1 Figure 2
Claims (1)
した光により生成した信号電荷を蓄積する感光画素部と
、この感光画素部に隣接して配列され、前記感光画素部
に蓄積された信号電荷を転送電極により転送して読み出
す読出部と、この読出部の転送電極が配線され、この感
光画素部を分離する画素分離領域とを有する固体撮像装
置において、 前記半導体基板上の前記画素分離領域に溝を形成し、こ
の溝内に前記読出部の転送電極を埋め込んだことを特徴
とする固体撮像装置。 ２、半導体基板表面に接合の浅い第１の第１導電型ウェ
ル領域と接合の深い第２の第１導電型ウェル領域とを形
成する第１の工程と、前記第１の第１導電型ウェル領域
表面に第２導電型不純物を添加して感光画素部を形成す
る第２の工程と、前記第２の第１導電型ウェル領域表面
に第２導電型不純物を添加して読出部の埋め込みチャン
ネルを形成する第３の工程と、前記第２の第１導電型ウ
ェル領域表面に第１導電型不純物を添加して画素分離領
域のチャンネルストッパを形成する第４の工程と、前記
半導体基板上の全面に絶縁層を形成する第５の工程と、
前記埋め込みチャンネルおよび前記チャンネルストッパ
上の前記絶縁層上に読出部の転送電極を形成する第６の
工程とを有する固体撮像装置の製造方法において、 前記第４の工程より前に、前記半導体基板上の前記画素
分離領域に溝を形成する工程を有し、前記転送電極が前
記画素分離領域において前記溝内に設けられることを特
徴とする固体撮像装置の製造方法。 ３、特許請求の範囲第２項記載の方法において、前記溝
を形成する工程が前記第１の工程より前に実行されるこ
とを特徴とする固体撮像装置の製４、特許請求の範囲第
２項記載の方法において、前記溝を形成する工程が前記
第１の工程と、前記第２の工程との間に実行されること
を特徴とする固体撮像装置の製造方法。 ５、特許請求の範囲第２項記載の方法において、前記溝
を形成する工程が、前記第２の工程と前記第３の工程と
の間に実行されることを特徴とする固体撮像装置の製造
方法。 ６、特許請求の範囲第２項記載の方法において、前記溝
を工程が前記第３の工程と前記第４の工程との間に実行
されることを特徴とする固体撮像装置の製造方法。[Scope of Claims] 1. A semiconductor substrate, a photosensitive pixel section arranged on the semiconductor substrate and accumulating signal charges generated by incident light, and a photosensitive pixel section arranged adjacent to the photosensitive pixel section, the photosensitive pixel section arranged on the semiconductor substrate and storing signal charges generated by incident light. In the solid-state imaging device, the solid-state imaging device includes a readout section that transfers and reads out signal charges accumulated in the semiconductor substrate using a transfer electrode, and a pixel isolation region to which the transfer electrode of the readout section is wired and isolates the photosensitive pixel section. A solid-state imaging device characterized in that a groove is formed in the upper pixel isolation region, and a transfer electrode of the readout section is embedded in the groove. 2. A first step of forming a first well region of the first conductivity type with a shallow junction and a second well region of the first conductivity type with a deep junction on the surface of the semiconductor substrate; a second step of adding a second conductivity type impurity to the surface of the region to form a photosensitive pixel portion; and a second step of doping a second conductivity type impurity to the surface of the second first conductivity type well region to form a buried channel of the readout portion. a fourth step of adding a first conductivity type impurity to the surface of the second first conductivity type well region to form a channel stopper of the pixel isolation region; a fifth step of forming an insulating layer over the entire surface;
a sixth step of forming a transfer electrode of a readout section on the buried channel and the insulating layer on the channel stopper; A method for manufacturing a solid-state imaging device, comprising the step of forming a groove in the pixel isolation region, and the transfer electrode is provided in the groove in the pixel isolation region. 3. Manufacturing a solid-state imaging device, characterized in that the step of forming the groove is performed before the first step in the method according to claim 2. 2. A method for manufacturing a solid-state imaging device according to item 1, wherein the step of forming the groove is performed between the first step and the second step. 5. Manufacturing a solid-state imaging device according to claim 2, wherein the step of forming the groove is performed between the second step and the third step. Method. 6. The method of manufacturing a solid-state imaging device according to claim 2, wherein the groove forming step is performed between the third step and the fourth step.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60104319A JPS61263155A (en) | 1985-05-16 | 1985-05-16 | Solid-state image pickup device and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60104319A JPS61263155A (en) | 1985-05-16 | 1985-05-16 | Solid-state image pickup device and manufacture thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61263155A true JPS61263155A (en) | 1986-11-21 |
| JPH0521350B2 JPH0521350B2 (en) | 1993-03-24 |
Family
ID=14377612
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60104319A Granted JPS61263155A (en) | 1985-05-16 | 1985-05-16 | Solid-state image pickup device and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61263155A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63142854A (en) * | 1986-12-05 | 1988-06-15 | Nec Corp | Solid-state image sensing element and manufacture thereof |
| JPH01280354A (en) * | 1988-05-06 | 1989-11-10 | Nec Corp | Solid-state image sensing device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS577979A (en) * | 1980-06-17 | 1982-01-16 | Fujitsu Ltd | Solid-state image picking up device |
| JPS6086975A (en) * | 1983-10-19 | 1985-05-16 | Matsushita Electronics Corp | Solid-state image pickup device |
-
1985
- 1985-05-16 JP JP60104319A patent/JPS61263155A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS577979A (en) * | 1980-06-17 | 1982-01-16 | Fujitsu Ltd | Solid-state image picking up device |
| JPS6086975A (en) * | 1983-10-19 | 1985-05-16 | Matsushita Electronics Corp | Solid-state image pickup device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63142854A (en) * | 1986-12-05 | 1988-06-15 | Nec Corp | Solid-state image sensing element and manufacture thereof |
| JPH01280354A (en) * | 1988-05-06 | 1989-11-10 | Nec Corp | Solid-state image sensing device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0521350B2 (en) | 1993-03-24 |
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