JPS61238985A - Parallel flat plate type plasma etching device - Google Patents
Parallel flat plate type plasma etching deviceInfo
- Publication number
- JPS61238985A JPS61238985A JP8049685A JP8049685A JPS61238985A JP S61238985 A JPS61238985 A JP S61238985A JP 8049685 A JP8049685 A JP 8049685A JP 8049685 A JP8049685 A JP 8049685A JP S61238985 A JPS61238985 A JP S61238985A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- electrode
- plasma etching
- cooling medium
- plate type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
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- Drying Of Semiconductors (AREA)
- ing And Chemical Polishing (AREA)
Abstract
Description
【発明の詳細な説明】
） （１） 発明の属する分野の説明本発明はウェ
ーハ上に集積回路の微細パターンを形成するための平行
平板型プラズマエツチング装置の改良に関する。DETAILED DESCRIPTION OF THE INVENTION (1) Description of the Field of the Invention The present invention relates to an improvement in a parallel plate plasma etching apparatus for forming fine patterns of integrated circuits on a wafer.
（２）従来の技術の説明
大規模集積回路の製造において半導体ウェーハ上に微細
なパターンを形成する必要があり、このためドライエツ
チング装置が用いられる。ドライエツチング装置はこれ
まで種々の形式の装置が考案されているが、集積度の高
い大規模集積回路の製造においては、微細パターン°を
再現性よく形成できる平行平板型ドライエツチング装置
が主流である。(2) Description of the Prior Art In the manufacture of large-scale integrated circuits, it is necessary to form fine patterns on semiconductor wafers, and for this purpose dry etching equipment is used. Various types of dry etching equipment have been devised so far, but in the production of large-scale integrated circuits with a high degree of integration, parallel plate dry etching equipment, which can form fine patterns with good reproducibility, is the mainstream. .
さらにこの平行平板型ドライエツチング装置はウェーハ
を高周波印加電極上に載置するカソード結合式とウェー
ハを接地電極上に載置するアノード結合式とに分類され
る。アノード結合式はパターンの加工特性はカソード結
合式とほぼ同等であるが、ウェーハを載置する電極に高
周波が印加されないため、
（１） 装置の横取が大幅に簡略化される（２）
ウェーハに対するプラズマダメージが減少する
などの利点があるため広く用いられている。しかしなが
らこの平行平板型プラズマエツチング装置は、従来のウ
ェットエツチング装置あるいは多数のウェーハを一括し
て処理する円筒型プラズマエッチング装置等に比較して
より高い処理能力を有しているとは言い難い。このため
平行平板型の優れた微細加工特性を維持しつつ高速でエ
ツチングでき処理能力の高い平行平板型プラズマエツチ
ング装置の供給が重要な課題となっている。また、最近
のウェーハの大口径化に伴って、ウェーハを一枚毎に制
御性良く処理する平行平板型枚葉処理式のプラズマエツ
チング装置がさらに一般化されることは必致である。こ
の枚葉処理式の装置においては、処理能力を大きくする
ため複数のウェーハを一括処理する従来のバッチ式の装
置におけるよりもさらに高速エツチング技術が重要とな
ることは明らかである。Further, this parallel plate type dry etching apparatus is classified into a cathode coupling type in which the wafer is placed on a high frequency applying electrode and an anode coupling type in which the wafer is placed on a ground electrode. The pattern processing characteristics of the anodic bonding method are almost the same as those of the cathode bonding method, but because no high frequency is applied to the electrode on which the wafer is placed, (1) equipment stealing is greatly simplified (2)
It is widely used because it has advantages such as reducing plasma damage to wafers. However, it cannot be said that this parallel plate plasma etching apparatus has a higher processing capacity than a conventional wet etching apparatus or a cylindrical plasma etching apparatus that processes a large number of wafers at once. Therefore, it is important to provide a parallel plate type plasma etching apparatus that can perform high speed etching while maintaining the excellent microfabrication characteristics of the parallel plate type and has a high throughput. Furthermore, with the recent increase in the diameter of wafers, it is inevitable that parallel plate type single wafer processing type plasma etching apparatuses, which process wafers one by one with good controllability, will become more popular. It is clear that high-speed etching technology is even more important in this single-wafer processing type apparatus than in conventional batch-type apparatuses that process a plurality of wafers at once in order to increase processing capacity.
以上述べたように高速でエツチングする技術は今後さら
に重要となるが、エツチング速度の増大と共に生じてく
るのがウェーハ表面温度上昇によるレジスト損傷である
。レジスト損傷は配線幅の減少に直接結びつき、線幅が
１μｍ前後となるＩＭ ｂ ｉ ｔ プロセスでは特
に重大な問題である。さらにエツチング速度の高速化に
伴い、ウェーノＳ１枚の処理に要する時間が短くなり、
ウェーハ冷却が充分に行われないという問題も生じて来
ている。As mentioned above, high-speed etching technology will become even more important in the future, but as the etching speed increases, resist damage occurs due to an increase in wafer surface temperature. Resist damage is directly linked to a reduction in wiring width, and is a particularly serious problem in the IM bit process where the line width is around 1 μm. Furthermore, as the etching speed increases, the time required to process one Waeno S sheet becomes shorter.
A problem has also arisen in that wafer cooling is not performed sufficiently.
第１図は従来用いられている液体あるいは気体の流体冷
却媒体による冷却方式を用いた平行平板型プラズマエツ
チング装置の一例の断面図である。FIG. 1 is a sectional view of an example of a parallel plate type plasma etching apparatus using a conventional cooling method using a liquid or gaseous fluid cooling medium.
図が示すように処理室１には、高周波印加電極２とウェ
ーハ３を載置するウェーハ載置電極４が平行に対向して
配置されている。処理室１を真空排気系５により排気し
た後、反応ガス導入系６により所定の流量の反応ガスを
導入し、真空排気系５の排気能力の調節により処理室１
内を所定の一定圧力に維持する。このときウェーハ３は
流体冷却媒体循還装置７によりウェーハ載置電極４を冷
却する事により温度調節され、所定の一定温反に保トれ
ている。かかる状態で高周波電源８より高周波電力を高
周波印加電極２に印加すると反応ガスがプラズマ化され
、エツチング処理が遂行される。As shown in the figure, in the processing chamber 1, a high frequency application electrode 2 and a wafer mounting electrode 4 on which a wafer 3 is mounted are arranged facing each other in parallel. After the process chamber 1 is evacuated by the vacuum evacuation system 5, a predetermined flow rate of the reaction gas is introduced by the reaction gas introduction system 6, and the process chamber 1 is evacuated by adjusting the exhaust capacity of the vacuum evacuation system 5.
maintain a predetermined constant pressure inside. At this time, the temperature of the wafer 3 is controlled by cooling the wafer mounting electrode 4 by the fluid cooling medium circulation device 7, and the temperature of the wafer 3 is maintained at a predetermined constant temperature. In this state, when high frequency power is applied from the high frequency power supply 8 to the high frequency application electrode 2, the reaction gas is turned into plasma and the etching process is performed.
しかし、エツチング速度の増大に伴い、ウェーハ３０表
面に発生する熱量が増加している事、及び滞留時間が短
くウェーハ３が充分冷却されないという理由からウェー
ハ載置電極４の調節温度は大気中の水分の露結温度以下
に設定される事も多く、凝結水によるエツチング装置の
電気系統の障害も発生している。また流体冷却媒体循還
装置７により低温媒体を循還する従来の装置では配管途
中での熱損失が大きい。冷却媒体の容積が大きいために
温度制御の応答性が悪く、ウェーハ３の温度制御精度が
悪くなるなどの欠点があった。However, as the etching rate increases, the amount of heat generated on the surface of the wafer 30 increases, and the residence time is short and the wafer 3 is not cooled sufficiently. The temperature is often set below the dew temperature of the etching system, and condensed water can cause problems with the etching equipment's electrical system. Further, in the conventional device in which the low temperature medium is circulated by the fluid cooling medium circulation device 7, heat loss in the middle of the piping is large. Since the volume of the cooling medium is large, the responsiveness of temperature control is poor, and there are drawbacks such as poor temperature control accuracy of the wafer 3.
（３）発明の目的
本発明は以上の欠点を除去し、所望の部分のみを効率的
に冷却すると共に、ウェーハの温度全精度よく制御する
事により、高いエツチング速度を維持しつつウェーハの
加工精度を向上させる事を目的とする。(3) Purpose of the Invention The present invention eliminates the above-mentioned drawbacks, efficiently cools only the desired portion, and controls the entire wafer temperature with high accuracy, thereby improving wafer processing accuracy while maintaining a high etching rate. The purpose is to improve.
（４）発明の構成および作用の説明
本発明の特徴は、高周波電力を印加する電極と対向する
ウェーハ載置電極との間に反応ガスを導入しこれらの二
電極間にガスプラズマを発生させてウェーハをエツチン
グする平行平板型プラズマエツチング装置においてウェ
ーハ載を電極の温度制御にペルチェ効果を利用した半導
体冷熱素子と流体冷媒循還装置を併用することにより、
ウェーハの温度制御を効果的かつ高精度にすることにあ
る。(4) Description of structure and operation of the invention The feature of the invention is that a reactive gas is introduced between an electrode to which high-frequency power is applied and a wafer mounting electrode facing the opposite electrode, and a gas plasma is generated between these two electrodes. In parallel plate plasma etching equipment that etches wafers, by using a semiconductor cooling element that uses the Peltier effect and a fluid coolant circulation device to control the temperature of the wafer electrode,
The goal is to control wafer temperature effectively and with high precision.
（５）実施例 以下、本発明の一実施例を図面とともに説明する。(5) Examples An embodiment of the present invention will be described below with reference to the drawings.
第２図は本発明の詳細な説明するための図面である。装
置全体の構成および動作は第１図を用いて説明したのと
同様である。第２図における符号１から８は第１図にお
いて用いた同一符号と同じ機能をもつ構成要素である。FIG. 2 is a drawing for explaining the present invention in detail. The configuration and operation of the entire device are the same as those described using FIG. 1. Reference numerals 1 to 8 in FIG. 2 are components having the same functions as the same reference numerals used in FIG.
また第２図の９は半導体冷熱素子であり、１０は半導体
冷熱素子用電源である。ウェーハ載置電極４は半導体冷
熱素子９に半導体冷熱素子用電源１０により電力を供給
する事により冷却若しくは加熱される。この時、冷却若
しくは加熱は供給電力の極性を選択する事により決定さ
れる。半導体冷却素子９の対向側で吸収あるいは発生し
た熱量は流体冷却媒体循還装置７により室温程度の冷却
媒体を循還させる事により吸収若しくは供給される。こ
の構成においてウェーハ温度は半導体冷熱素子に供給す
る電力量により決定され、吸収若しくは発生できる熱量
は半導体冷熱素子９の能力及び流体冷却媒体循還装置７
の能力により決定される。ここで冷却媒体に室温程度の
温度の媒体を用いるため、結露することはない。Further, 9 in FIG. 2 is a semiconductor cooling element, and 10 is a power supply for the semiconductor cooling element. The wafer mounting electrode 4 is cooled or heated by supplying power to the semiconductor cooling element 9 from the semiconductor cooling element power supply 10. At this time, cooling or heating is determined by selecting the polarity of the supplied power. The amount of heat absorbed or generated on the opposite side of the semiconductor cooling element 9 is absorbed or supplied by the fluid cooling medium circulation device 7 circulating a cooling medium at about room temperature. In this configuration, the wafer temperature is determined by the amount of power supplied to the semiconductor cooling element, and the amount of heat that can be absorbed or generated is determined by the capacity of the semiconductor cooling element 9 and the fluid cooling medium circulation device 7.
determined by the ability of Here, since a medium having a temperature of about room temperature is used as the cooling medium, no dew condensation occurs.
また半導体冷熱素子用電源１０により供給される電力を
切り、半導体冷熱素子９の端子間のゼーベック効果によ
る起電力と、冷却媒体の温度の測定により、電極面の温
度を知ることができるとｂう付加的な効用も生じる。It is also possible to determine the temperature of the electrode surface by cutting off the power supplied by the semiconductor cooling element power supply 10 and measuring the electromotive force due to the Seebeck effect between the terminals of the semiconductor cooling element 9 and the temperature of the cooling medium. Additional benefits also arise.
以上説明したように本発明によれば従来の温度制御方式
に比べより高精度でかつ局所的なウェーハの冷却ができ
る平行平板型プラズマエツチング装置が実現でき、今後
ますます増大する高精度高速エツチング技術への貢献は
大きい。As explained above, according to the present invention, it is possible to realize a parallel plate type plasma etching apparatus that is capable of localized cooling of a wafer with higher precision than conventional temperature control methods, and is a technology that will continue to increase in high precision and high speed etching in the future. The contribution to this is significant.
第１図は従来の流体冷却媒体循還装置のみを用いた平行
平板型プラズマエツチング装置の一例の断面を示す図、
第２図は本発明による半導体冷熱素子と流体冷却媒体循
還装置を併用した装置の実施例を示す図である。
なお図において、ｌ・・・処理室 ２・・・高周波印加
電極 ３・・・ウェーハ ４・・・ウェーハ載置電極５
・・・真空排気系 ６・・・反応ガス導入系 ７・・・
流体冷却媒体循還装置 ８・・・高周波電源 ９・・・
半導体冷熱素子 １０川半導体冷熱素子用電源第１図FIG. 1 is a cross-sectional view of an example of a parallel plate type plasma etching apparatus using only a conventional fluid cooling medium circulation device;
FIG. 2 is a diagram showing an embodiment of a device using a semiconductor cooling element and a fluid cooling medium circulation device according to the present invention. In the figure, l...processing chamber 2...high frequency application electrode 3...wafer 4...wafer mounting electrode 5
...Vacuum exhaust system 6...Reactant gas introduction system 7...
Fluid cooling medium circulation device 8...High frequency power supply 9...
Semiconductor cooling element 10 River power supply for semiconductor cooling element Figure 1
Claims (1)
極との間に反応ガスを導入し、前記二電極間にガスプラ
ズマを発生させてウェーハをエッチングする平行平板型
プラズマエッチング装置において、該ウェーハ載置電極
の冷却若しくは加熱にペルチェ効果を利用した半導体冷
熱素子と流体冷却媒体循還装置を併用した事を特徴とす
る平行平板型プラズマエッチング装置。In a parallel plate type plasma etching apparatus, a reactive gas is introduced between an electrode for applying high frequency power and a wafer mounting electrode facing the wafer, and a gas plasma is generated between the two electrodes to etch the wafer. A parallel plate plasma etching apparatus characterized by using a semiconductor cooling element that utilizes the Peltier effect and a fluid cooling medium circulation device to cool or heat an electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8049685A JPS61238985A (en) | 1985-04-16 | 1985-04-16 | Parallel flat plate type plasma etching device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8049685A JPS61238985A (en) | 1985-04-16 | 1985-04-16 | Parallel flat plate type plasma etching device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61238985A true JPS61238985A (en) | 1986-10-24 |
Family
ID=13719910
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8049685A Pending JPS61238985A (en) | 1985-04-16 | 1985-04-16 | Parallel flat plate type plasma etching device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61238985A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63291423A (en) * | 1987-05-25 | 1988-11-29 | Hitachi Ltd | Low temperature dry-etching equipment |
| JPS6446930A (en) * | 1987-05-30 | 1989-02-21 | Tokyo Electron Ltd | Base plate for sample |
| JPH01268030A (en) * | 1988-04-20 | 1989-10-25 | Hitachi Ltd | Method and apparatus for plasma etching |
| EP0451777A2 (en) * | 1990-04-09 | 1991-10-16 | Nippon Scientific Co., Ltd. | Plasma etching apparatus with accurate temperature and voltage level control on device under test |
| JPH05304116A (en) * | 1991-07-17 | 1993-11-16 | Hitachi Ltd | Dry etching system |
| US8375890B2 (en) * | 2007-03-19 | 2013-02-19 | Micron Technology, Inc. | Apparatus and methods for capacitively coupled plasma vapor processing of semiconductor wafers |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS558593A (en) * | 1978-07-03 | 1980-01-22 | American Water Services | Apparatus for cleaning pipe of heat exchanger |
| JPS5851625A (en) * | 1981-09-24 | 1983-03-26 | Nec Corp | Frequency dividing circuit |
-
1985
- 1985-04-16 JP JP8049685A patent/JPS61238985A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS558593A (en) * | 1978-07-03 | 1980-01-22 | American Water Services | Apparatus for cleaning pipe of heat exchanger |
| JPS5851625A (en) * | 1981-09-24 | 1983-03-26 | Nec Corp | Frequency dividing circuit |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63291423A (en) * | 1987-05-25 | 1988-11-29 | Hitachi Ltd | Low temperature dry-etching equipment |
| JPS6446930A (en) * | 1987-05-30 | 1989-02-21 | Tokyo Electron Ltd | Base plate for sample |
| JPH01268030A (en) * | 1988-04-20 | 1989-10-25 | Hitachi Ltd | Method and apparatus for plasma etching |
| EP0451777A2 (en) * | 1990-04-09 | 1991-10-16 | Nippon Scientific Co., Ltd. | Plasma etching apparatus with accurate temperature and voltage level control on device under test |
| US5227000A (en) * | 1990-04-09 | 1993-07-13 | Nippon Scientific Co., Ltd. | Plasma etching apparatus with accurate temperature and voltage level control on device under test |
| JPH05304116A (en) * | 1991-07-17 | 1993-11-16 | Hitachi Ltd | Dry etching system |
| US8375890B2 (en) * | 2007-03-19 | 2013-02-19 | Micron Technology, Inc. | Apparatus and methods for capacitively coupled plasma vapor processing of semiconductor wafers |
| US8910591B2 (en) | 2007-03-19 | 2014-12-16 | Micron Technology, Inc. | Apparatus and methods for capacitively coupled plasma vapor processing of semiconductor wafers |
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