JPS61214526A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS61214526A
JPS61214526A JP60056639A JP5663985A JPS61214526A JP S61214526 A JPS61214526 A JP S61214526A JP 60056639 A JP60056639 A JP 60056639A JP 5663985 A JP5663985 A JP 5663985A JP S61214526 A JPS61214526 A JP S61214526A
Authority
JP
Japan
Prior art keywords
film
substrate
sio2 film
backside
plasma cvd
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60056639A
Other languages
Japanese (ja)
Inventor
Yoshitaka Hasegawa
長谷川　義隆
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP60056639A priority Critical patent/JPS61214526A/en
Publication of JPS61214526A publication Critical patent/JPS61214526A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate

Abstract

PURPOSE:To provide an SiO2 film with even thickness by a method wherein, when an SiO2 film is formed on the surface of a semiconductor substrate using a plasma CVD equipment, an oxide film formed on the backside of substrate is removed and the backside is mounted on an electrode plate to form a new film. CONSTITUTION:The exposed surface and backside of an Si substrate 1 are respectively covered with an SiO2 film 2 and another SiO2 film 3. Now a new SiO2 film is produced on the surface of Si substrate 1 by plasma CVD method conforming to the procedures described as follows, i.e. a resist film 4 is provided only on the surface of SiO2 film 2 to remove not only the SiO2 film on the backside but also the SiO2 film stuck to the side by etching process using the resist film 4 as a mask. Next the resist film 4 is removed and the backside of substrate 1 having no SiO2 film at all is fixed to an electrode plate of CVD equipment to deposit a new SiO2 film on the film 2 as usual. Through these procedures, the substrate 1 and the electrode plate may be provided with excellent thermal conductivity to supply the substrate 1 with sufficiently high frequency power.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は半導体装置の製造方法に係り、特に反応管（チ
ューブ）方式のプラズマＣＶＤ装置を用いてプラズマＣ
ＶＤＩＩを均一に形成する方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor device, and in particular, to a method for manufacturing a semiconductor device, and in particular to a plasma CVD method using a reaction tube type plasma CVD apparatus.
This invention relates to a method for uniformly forming VDII.

〔発明の技術的背景およびその問題点〕半導体装置の製
造においては、例えばウェーハとなるシリコン基板の表
面保護被覆を行うため、プラズマＣＶＤ膜によりシリコ
ン基板上にプラズマ二酸化シリコン膜を形成させている
。このプラズマ二酸化シリコン膜の堆積は、反応管タイ
プのプラズマＣＶＤ＠Ｉにシリコン基板を載置して行っ
ている。[Technical Background of the Invention and Problems Therewith] In the manufacture of semiconductor devices, for example, a plasma silicon dioxide film is formed on a silicon substrate using a plasma CVD film in order to protect the surface of a silicon substrate that will become a wafer. This plasma silicon dioxide film is deposited by placing a silicon substrate on a reaction tube type plasma CVD@I.

第２図は上記プラズマＣＶＤ装置の要部の断面図である
。石英管（図示せず）内に一定の間隔でグラファイト平
板１０ａ、１０ｂをガイシ１１で連結し、このグラファ
イト平板１０ａ、１０ｂの両面の下部に形成された突起
１３によってシリコンウェハ１２を立て掛けるものであ
る。そして、グラファイト平板１０ａを陽極とし、グラ
ファイト平板１０ｂを陰極としてグロー放電を起こし、
−シリコン基板１２にプラズマ二酸化シリコン膜を形成
させる。FIG. 2 is a sectional view of the main parts of the plasma CVD apparatus. Graphite flat plates 10a and 10b are connected with insulators 11 at regular intervals in a quartz tube (not shown), and a silicon wafer 12 is propped up by protrusions 13 formed at the bottom of both sides of the graphite flat plates 10a and 10b. . Then, a glow discharge is generated using the graphite flat plate 10a as an anode and the graphite flat plate 10b as a cathode,
- forming a plasma silicon dioxide film on the silicon substrate 12;

ところで、シリコン基板が例えば選択酸化（ＬＯＧＯ３
）工程を経ている場合には、第３図に示すように比較的
厚い二酸化シリコン膜２．３がシリコン基板１の全表面
および裏面を被覆していることが多い。このようにシリ
コン基板１の裏面に形成された二酸化シリコンｌ１１３
は、表面のＲＩ　Ｅ　（Ｒｅａｃｔｉｖｅ　ｔｏｎ　Ｅ
ｔｃｈｉｎｏ）ではエツチングされないためそのまま残
存する。このように、基板１の裏面に二酸化シリコン膜
が存在する場合には、シリコンウェハをグラフフィト平
板に立て掛けたときに、それらの間に絶縁膜が介在する
ことになり、従ってプラズマＣＶＤ工程で高周波パワー
がシリコン基板に伝達されず、かつ、ボートからの熱も
良好に伝達しない。このため、プラズマ二酸化シリコン
膜の膜厚が不均一となり、加工精度の低下を招くという
問題点がある。By the way, the silicon substrate is subjected to selective oxidation (LOGO3), for example.
) process, a relatively thick silicon dioxide film 2.3 often covers the entire surface and back surface of the silicon substrate 1, as shown in FIG. Silicon dioxide l113 formed on the back surface of the silicon substrate 1 in this way
is the surface RI E (Reactive ton E
tchino), it remains as it is because it is not etched. In this way, when a silicon dioxide film exists on the back surface of the substrate 1, when a silicon wafer is placed on a graphite flat plate, an insulating film will be interposed between them, and therefore high frequency Power is not transferred to the silicon substrate, and heat from the boat is not transferred well either. Therefore, there is a problem in that the thickness of the plasma silicon dioxide film becomes non-uniform, leading to a decrease in processing accuracy.

〔発明の目的〕[Purpose of the invention]

本発明はこのような問題点を除去するためになされたも
ので、プラズマＣＶＤ工程で半導体基板表面にプラズマ
ＣＶＤ膜を均一に形成することのできる半導体装置の製
造方法を提供することを目的としている。The present invention was made to eliminate such problems, and an object of the present invention is to provide a method for manufacturing a semiconductor device that can uniformly form a plasma CVD film on the surface of a semiconductor substrate in a plasma CVD process. .

〔発明の概要〕[Summary of the invention]

上記目的を達成するため本発明は、プラズマＣＶＤ工程
の前に半導体基板（例えばシリコン基板）の裏面の酸化
膜（例えば二酸化シリコン膜）、をあらかじめ除去し、
この半導体基板の裏面がプラズマＣＶＤ装置の電極板に
接するようにセットして、プラズマｃｖｏｓを堆積させ
る半導体装置の製造方法を提供するものである。In order to achieve the above object, the present invention removes in advance an oxide film (for example, silicon dioxide film) on the back surface of a semiconductor substrate (for example, a silicon substrate) before a plasma CVD process,
The present invention provides a method for manufacturing a semiconductor device in which the back surface of the semiconductor substrate is set so as to be in contact with an electrode plate of a plasma CVD apparatus, and plasma CVOS is deposited.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明を第１図（ａ）〜（ｄ）の断面図を参照し
てさらに具体的に説明する。Hereinafter, the present invention will be explained in more detail with reference to the cross-sectional views of FIGS. 1(a) to 1(d).

第１図（ａ）は選択酸化工程を経たシリコン基板１を示
しており、シリコン基板１の全表面および裏面に二酸化
シリコン膜２．３が形成されている。このうち、表面の
二酸化シリコン膜２は半導体デバイスを保護、形成等す
るための表面保護膜等である。FIG. 1(a) shows a silicon substrate 1 that has undergone a selective oxidation process, and a silicon dioxide film 2.3 is formed on the entire surface and back surface of the silicon substrate 1. Of these, the silicon dioxide film 2 on the surface is a surface protective film for protecting, forming, etc. a semiconductor device.

まず、第１図（ｂ）に示すように、このシリコン基板１
の表面にレジスト膜４を形成してシリコン基板表面にだ
け保護層を形成する。このレジストＷＡ４はレジスト液
をシリコン基板１表面に塗布したり、あるいはレジスト
液をシリコン基板１の中心部に滴下し、シリコン基板高
速回転させて周辺部まで拡散させることで形成すること
ができる。First, as shown in FIG. 1(b), this silicon substrate 1
A resist film 4 is formed on the surface of the silicon substrate to form a protective layer only on the surface of the silicon substrate. This resist WA4 can be formed by applying a resist solution to the surface of the silicon substrate 1, or by dropping the resist solution onto the center of the silicon substrate 1 and spreading it to the periphery by rotating the silicon substrate at high speed.

次いで、このレジストｗＡ４を保護層として表面以外の
他の部分に付着している二酸化シリコン膜３を選択的に
除去する。これは、例えば、シリコン基板をフッ化アン
モニウム（ＮＨ４Ｆ）溶液内に所定時間浸漬することで
行われるが、フッ化アンモニウム以外の他の薬液を使用
してもよい。この選択的除去により、裏面や側面に形成
されていた二１化シリコン膜３が除去され、第１図（Ｃ
）のように表面の二酸化シリコン膜２およびその上のレ
ジスト膜４だけが残存する。Next, using this resist wA4 as a protective layer, the silicon dioxide film 3 adhering to other parts than the surface is selectively removed. This is done, for example, by immersing the silicon substrate in an ammonium fluoride (NH4F) solution for a predetermined period of time, but other chemical solutions other than ammonium fluoride may also be used. By this selective removal, the silicon di1ide film 3 formed on the back and side surfaces is removed, and as shown in FIG.
), only the silicon dioxide film 2 on the surface and the resist film 4 thereon remain.

この選択除去工程の後にはレジスト膜４の除去が行われ
る。この除去はルジスト膜を酸化処理することで行う。After this selective removal step, the resist film 4 is removed. This removal is performed by oxidizing the Lujist film.

例えば、シリコン基板を硫酸（Ｈ２５ｏ４）と過酸化水
素（Ｈ２Ｏ２）の混合酸化液に浸漬することで行うこと
ができ、あるいは、酸素雰囲気内で燃焼させて除去する
ことができる。第１図（ｄ）はこの酸化処理によりレジ
スト膜を除去したシリコン基板の断面図であり、基板１
の表面に二酸化シリコン膜２だけが残っている。For example, the silicon substrate can be removed by immersing it in a mixed oxidizing solution of sulfuric acid (H25O4) and hydrogen peroxide (H2O2), or it can be removed by burning it in an oxygen atmosphere. FIG. 1(d) is a cross-sectional view of the silicon substrate from which the resist film has been removed by this oxidation treatment.
Only the silicon dioxide film 2 remains on the surface.

このように処理されたシリコン基板は、次いで、第２図
のようにプラズマＣＶＤ装置内にセットされ、プラズマ
二酸化シリコン膜が形成される。このとき、シリコン基
板と電極板（グラフフィト平板）の間には絶縁膜が介在
せず、従って両者は直接に密着する。The silicon substrate treated in this manner is then set in a plasma CVD apparatus as shown in FIG. 2, and a plasma silicon dioxide film is formed. At this time, there is no insulating film interposed between the silicon substrate and the electrode plate (graphite flat plate), so that the two are directly in close contact with each other.

〔発明の効果〕 以上のように本発明では、半導体基板、例えばシリコン
基板の裏面に形成された二酸化シリコン膜をあらかじめ
除去し、基板の表面にだけ二酸化シリコン膜を残存させ
るようにしたので、プラズマＣＶＤ工程で高周波パワー
がシリコン基板に十分加わり、かつ、ボートからの熱が
基板裏面から良好に伝達し、従ってプラズマ二酸化シリ
コン膜の膜厚を均一に形成することができ、かつ加工精
度を向上させることのできる半導体装置の製造方法が得
られる。[Effects of the Invention] As described above, in the present invention, the silicon dioxide film formed on the back surface of a semiconductor substrate, for example, a silicon substrate, is removed in advance and the silicon dioxide film remains only on the surface of the substrate. In the CVD process, sufficient high-frequency power is applied to the silicon substrate, and heat from the boat is well transmitted from the back side of the substrate, making it possible to form a plasma silicon dioxide film with a uniform thickness and improving processing accuracy. A method for manufacturing a semiconductor device is obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本発明の一実施例に係る方法の各工程における
シリコン基板の断面図、第２図はプラズマＣＶＤ装置の
要部の断面図、第３図は第２図の装置にセットされるシ
リコン基板の断面図である。 １・・・シリコン基板、２．３・・・二酸化シリコン膜
、４・・・レジスト躾、１０ａ、１０ｂ・・・電極板、
１１・・・ガイシ、１２・・・ウェハ、１３・・・突起
。 出願人代理人　　猪　　股　　　　清 第１図FIG. 1 is a cross-sectional view of a silicon substrate in each step of a method according to an embodiment of the present invention, FIG. 2 is a cross-sectional view of a main part of a plasma CVD apparatus, and FIG. 3 is a cross-sectional view of a silicon substrate set in the apparatus of FIG. 2. FIG. 2 is a cross-sectional view of a silicon substrate. DESCRIPTION OF SYMBOLS 1... Silicon substrate, 2.3... Silicon dioxide film, 4... Resist layer, 10a, 10b... Electrode plate,
11...Insulator, 12...Wafer, 13...Protrusion. Applicant's agent Kiyoshi Inomata Figure 1

Claims (1)

【特許請求の範囲】 １、反応管方式のプラズマＣＶＤ装置を用いて半導体基
板の表面にプラズマＣＶＤ膜を形成する半導体装置の製
造方法において、 前記半導体基板の裏面の酸化膜を除去する工程と、前記
プラズマＣＶＤ装置の電極板に前記半導体基板の裏面が
接するようにセットする工程と、前記電極板の裏面にセ
ットされた前記半導体基板の表面にプラズマＣＶＤ膜を
堆積させる工程とを備えることを特徴とする半導体装置
の製造方法。 ２、前記半導体基板はシリコン基板である特許請求の範
囲第１項記載の半導体装置の製造方法。 ３、前記電極板はカーボン板である特許請求の範囲第１
項もしくは第２項記載の半導体装置の製造方法。[Claims] 1. A method for manufacturing a semiconductor device in which a plasma CVD film is formed on the surface of a semiconductor substrate using a reaction tube type plasma CVD apparatus, comprising: removing an oxide film on the back surface of the semiconductor substrate; It is characterized by comprising the steps of: setting the semiconductor substrate so that its back surface is in contact with an electrode plate of the plasma CVD apparatus; and depositing a plasma CVD film on the surface of the semiconductor substrate set on the back surface of the electrode plate. A method for manufacturing a semiconductor device. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor substrate is a silicon substrate. 3. Claim 1, wherein the electrode plate is a carbon plate.
A method for manufacturing a semiconductor device according to item 1 or 2.
JP60056639A 1985-03-20 1985-03-20 Manufacture of semiconductor device Pending JPS61214526A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60056639A JPS61214526A (en) 1985-03-20 1985-03-20 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60056639A JPS61214526A (en) 1985-03-20 1985-03-20 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS61214526A true JPS61214526A (en) 1986-09-24

Family

ID=13032901

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60056639A Pending JPS61214526A (en) 1985-03-20 1985-03-20 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS61214526A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4925809A (en) * 1987-05-23 1990-05-15 Osaka Titanium Co., Ltd. Semiconductor wafer and epitaxial growth on the semiconductor wafer with autodoping control and manufacturing method therefor
US5225235A (en) * 1987-05-18 1993-07-06 Osaka Titanium Co., Ltd. Semiconductor wafer and manufacturing method therefor
EP0928018A2 (en) * 1997-12-29 1999-07-07 Siemens Aktiengesellschaft Reduction of black silicon in semiconductor fabrication

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5225235A (en) * 1987-05-18 1993-07-06 Osaka Titanium Co., Ltd. Semiconductor wafer and manufacturing method therefor
US4925809A (en) * 1987-05-23 1990-05-15 Osaka Titanium Co., Ltd. Semiconductor wafer and epitaxial growth on the semiconductor wafer with autodoping control and manufacturing method therefor
EP0928018A2 (en) * 1997-12-29 1999-07-07 Siemens Aktiengesellschaft Reduction of black silicon in semiconductor fabrication
EP0928018A3 (en) * 1997-12-29 2000-06-14 Siemens Aktiengesellschaft Reduction of black silicon in semiconductor fabrication

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