JPS61206230A - Manufacture of semiconductor device and apparatus therefor - Google Patents
Manufacture of semiconductor device and apparatus thereforInfo
- Publication number
- JPS61206230A JPS61206230A JP60046040A JP4604085A JPS61206230A JP S61206230 A JPS61206230 A JP S61206230A JP 60046040 A JP60046040 A JP 60046040A JP 4604085 A JP4604085 A JP 4604085A JP S61206230 A JPS61206230 A JP S61206230A
- Authority
- JP
- Japan
- Prior art keywords
- heat treatment
- silicon wafer
- heat
- gas
- light
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は、半導体装置の製造方法およびそのための装置
に係）、特に、 ＭＯＳ ＬＳＩの製造プロセスにおけ
る酸化膜の形成方法およびそのための熱処理装置に関す
る。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor device and an apparatus therefor, and particularly to a method for forming an oxide film in a MOS LSI manufacturing process and a heat treatment apparatus therefor.
従来、シリコン表面の酸化膜は、昇温されたホットウォ
ール型の電気炉中にセットされた石英管内に酸素を導入
し、この石英管内にシリコンウェハを載せた？−トを挿
入するととにより形成されていた。しかし、この方法に
よると、ケートの熱応答速度がシリコンウェハのそれに
比べ数１０〜数１００倍大きいため、シリコンウェハ上
に均一な酸化膜を形成するには、シリコンウェハとケー
トの熱処理時間差および電気炉内へのＭ−ト挿入時の温
度低下を無視できる程度の長時間の処理が必要であり、
従って、スループットが非常に低いという欠点を有して
いた。また、熱処理工程に数１０分の時間が必要である
ため、特に膜厚１５０Ｘ程度以下の薄い酸化膜を形成す
るには熱処理を９００℃程度以下の低温で行なう必要が
ｌ）、そのため界面準位密度が高くなシ、その値を１０
１０ｃＩｎ−２オーダ以下だ抑えることは困難であった
。Conventionally, oxide films on silicon surfaces were created by introducing oxygen into a quartz tube set in a heated hot-wall electric furnace, and then placing a silicon wafer inside the quartz tube. - It was formed by inserting the plate. However, according to this method, the thermal response speed of CATE is several tens to hundreds of times higher than that of a silicon wafer, so in order to form a uniform oxide film on a silicon wafer, it is necessary to The process requires a long time to the extent that the temperature drop when inserting the M-t into the furnace can be ignored.
Therefore, it has the disadvantage that the throughput is extremely low. In addition, since the heat treatment process requires several tens of minutes, it is necessary to perform the heat treatment at a low temperature of about 900°C or less, especially in order to form a thin oxide film with a film thickness of about 150X or less. If the density is high, set the value to 10
It was difficult to suppress it to less than 10 cIn-2 order.
一方、界面準位密度を低下させるために、低温で形成し
た酸化膜を電気炉内で非酸化性雰囲気中で高温熱処理す
るという方法もあるが、電気炉中では先に示したように
、処理時間は数１０分程度の長゛時間が必要である。従
って電気炉処理では、これに伴う他の特性たとえばシリ
コン基板の特定の領域に局在されるべき不純物の大幅な
拡散による素子の特性悪化などへの影響があるため、そ
の適用領域は限られていた。On the other hand, in order to reduce the interface state density, there is a method of subjecting the oxide film formed at low temperature to high-temperature heat treatment in a non-oxidizing atmosphere in an electric furnace. A long time of about several tens of minutes is required. Therefore, electric furnace processing has an impact on other characteristics, such as deterioration of device characteristics due to significant diffusion of impurities that should be localized in specific regions of the silicon substrate, so its application range is limited. Ta.
一方、従来、非酸化性雰囲気中で短時間の熱処理を行な
う装置として、・・ログンランプ光照射を利用した急速
熱処理装置が知られている。On the other hand, as an apparatus for performing short-time heat treatment in a non-oxidizing atmosphere, a rapid heat treatment apparatus using light irradiation from a logon lamp has been known.
第１図は従来の急速熱処理装置を示す図であシ、（ａ）
は平面図、（ｂ）ＩＩｉ（ａ）のＡ −Ａ’断面図であ
る。第１図において、１はハロダンランプ、２は熱処理
槽としての石英チェンバ、３は熱処理サンプルとしての
シリコンウェハ、４ｄ石英裂ウェハ支持台、５は石英製
のをそれぞれ示す。第１図に示した従来の急速熱処理装
置で熱処理を行なう場合、次のようなシーケンスをとっ
ていた。Figure 1 is a diagram showing a conventional rapid heat treatment apparatus, (a)
is a plan view, and (b) is a sectional view taken along line AA' of IIi (a). In FIG. 1, reference numeral 1 indicates a halodan lamp, 2 a quartz chamber as a heat treatment tank, 3 a silicon wafer as a heat treatment sample, 4d a quartz cracked wafer support, and 5 a quartz chamber. When heat treatment is performed using the conventional rapid heat treatment apparatus shown in FIG. 1, the following sequence is used.
まず、石英チェンバ２内に一定の流量の処理ガスを流し
ておき、蓋５を開けてシリコンウェハ−３をウェハ支持
台にのせ、蓋５を閉める。続いて、石英チェンバ２内に
処理ガスを充満させるために一定時間石英チェンパ２内
の７４’−ジを行なう。次に、ハロダンランプ１を点灯
し、シリコンウェハへの光照射による熱処理を行なった
後、ハロダンランプ１を消灯する。続いて冷却のための
一定時間の放置を行なった後、蓋５を開けてシリコンウ
ェハ３をとシ出し、１枚のシリコンウェハの熱処理を完
了する。First, a constant flow rate of processing gas is allowed to flow into the quartz chamber 2, the lid 5 is opened, the silicon wafer 3 is placed on the wafer support, and the lid 5 is closed. Subsequently, in order to fill the quartz chamber 2 with the processing gas, the inside of the quartz chamber 2 is heated 74' for a certain period of time. Next, the Halodan lamp 1 is turned on and the silicon wafer is subjected to heat treatment by irradiation with light, and then the Halodan lamp 1 is turned off. Subsequently, after being left for a certain period of time for cooling, the lid 5 is opened and the silicon wafer 3 is taken out, completing the heat treatment of one silicon wafer.
しかし、従来の急速熱処理装置では、上述のようにシリ
コンウェハ３の１枚の熱処理ごとに、その前後で・ぐ−
ジおよび冷却のための時間が必要であシ、スループット
の改善には限界があった。However, in the conventional rapid heat treatment equipment, as mentioned above, each silicon wafer 3 is heated before and after the heat treatment.
However, there was a limit to the improvement of throughput due to the need for time for washing and cooling.
本発明の目的は、高温短時間の熱処理により優れた特性
の半導体装置の製造を可能とする半導体装置の製造方法
を提供することにある。An object of the present invention is to provide a method for manufacturing a semiconductor device that enables manufacturing of a semiconductor device with excellent characteristics by heat treatment at high temperature and for a short time.
本発明の他の目的は、前記熱処理を高処理量で行なうこ
との可能な半導体装置の製造装置を提供することにある
。Another object of the present invention is to provide a semiconductor device manufacturing apparatus capable of performing the heat treatment at a high throughput.
本発明の一態様だよると、シリコンウェハを収納する熱
処理槽内に酸化性ガスを導入する工程、および前記シリ
コンウェハに光を照射することによりりシリコンウェハ
を熱処理して表面に酸化膜を形成する工程を具備する半
導体装置の製造方法が提供される。According to one aspect of the present invention, the silicon wafer is heat-treated by introducing an oxidizing gas into a heat treatment tank containing the silicon wafer, and irradiating the silicon wafer with light to form an oxide film on the surface. A method of manufacturing a semiconductor device is provided, which includes the steps of:
本発明の他の態様によると、表面に酸化膜が形成された
シリコンウェハを収納する熱処理槽内に非酸化性ガスを
導入する工程、および前記シリコンウェハに光を照射す
ることによりリコンウェハを熱処理する工程を具備する
半導体装置の製造方法が提供される。According to another aspect of the present invention, the silicon wafer is heat treated by introducing a non-oxidizing gas into a heat treatment tank containing a silicon wafer having an oxide film formed on its surface, and irradiating the silicon wafer with light. A method for manufacturing a semiconductor device including steps is provided.
本発明の更に他の態様によると、密閉可能な熱処理サン
プル出入口を有する２つ以上の熱処理槽と、前記熱処理
サンプル出入口を通して前記熱処理槽内に熱処理サンプ
ルを出し入れする機欅と、前記熱処理槽内に導入するガ
ス流量を制御する手段と、前記各熱処理槽内の熱処理サ
ンプルに順次光照射を行なう手段を半導体装置の製造装
置が提供される。According to still another aspect of the present invention, two or more heat treatment vessels each having a sealable heat treatment sample inlet/outlet, a mechanism for loading and unloading the heat treated sample into and out of the heat treatment vessel through the heat treatment sample inlet/outlet, and a A semiconductor device manufacturing apparatus is provided that includes means for controlling the flow rate of introduced gas and means for sequentially irradiating the heat-treated samples in each of the heat treatment tanks with light.
以下、本発明の実施例を示し、本発明をよシ具体的に説
明する。Hereinafter, the present invention will be explained in more detail by showing examples of the present invention.
第２図は、本発明に係る急速熱処理装置を示し、（ａ）
＃：を平面図、（ｂ）は（ａ）のＢ −Ｂ’断面図であ
る。FIG. 2 shows a rapid heat treatment apparatus according to the present invention, (a)
#: is a plan view, and (b) is a BB' sectional view of (a).
この装置は、第１図に示す従来の装置を、ガス源および
電源を共通として２つ並設したものである。この装置は
以下のような手順で動作される。This device is constructed by installing two conventional devices shown in FIG. 1 in parallel using a common gas source and power source. This device is operated according to the following procedure.
まず第１の石英デエンパ２ａの蓋５ａを開けて１枚目の
シリコンウェハ３ａをウェハ支、持合４ａの上にのせた
後、第１の石英チェンバ２ａ内に大量の処理ガスを流し
、短時間でチェンバ内を処理ガスで満たすためのノや−
ジを行なう。First, the lid 5a of the first quartz de-emperor 2a is opened and the first silicon wafer 3a is placed on the wafer support and support 4a, and then a large amount of processing gas is flowed into the first quartz chamber 2a. How long does it take to fill the chamber with processing gas?
Do ji.
つづいて熱処理時のウェハ３ａの冷却を抑えるために流
量調整弁１０＊ｌ／Ｃよシガス流量を絞ると同時にハロ
ダンランプ１ａを点灯し光照射釦よる熱処理を行なう、
この間に同様に第２の石英チェンバ２ｂ内に第２のシリ
コンウェハ３ｂを入れ石英チェンバ２ｂ内の・々−ジを
行なっておく。ハロｒ７：７ンデ１ａの消灯後、電源６
を電源切替装置７によりを切シ換えハロダンランプ１ｂ
を点灯し、今度は第２のシリコンウェハ３ｂの熱処理を
行なう、この間、第１のシリコンウェハ３ａは、冷却の
ための放置を行ない、蓋５ａを開けて取出され、さらに
次に熱処理を行なう３枚目のシリコンウェハの収納と石
英チェンバ２ａ内のパージが行なわれる０以上を第１お
よび第２のチェンバＪａ ＃ ２ｂにおいて交互に〈シ
返すことによって連続的にシリコンウェハの熱処理が可
能となる。さらにこれを石英テエンノ４３ｇ、２ｂ内へ
のウェハの収納および取出しを自動的に行なう機構と組
み合せることによりて枚葉式でスループットの高い熱処
理装置が実現できる。Next, in order to suppress cooling of the wafer 3a during heat treatment, the flow rate adjustment valve 10*l/C is used to reduce the gas flow rate, and at the same time, the Halodan lamp 1a is turned on and the light irradiation button is pressed to perform heat treatment.
During this time, the second silicon wafer 3b is similarly placed in the second quartz chamber 2b and the inside of the quartz chamber 2b is replaced. Haro r7: After turning off 7nd 1a, power supply 6
The power supply switching device 7 switches the Halodan lamp 1b.
is turned on, and the second silicon wafer 3b is then subjected to heat treatment.During this time, the first silicon wafer 3a is left to cool, and is taken out by opening the lid 5a, and is then subjected to heat treatment. Continuous heat treatment of the silicon wafers becomes possible by alternately turning over the quartz chambers 0 and 2b in which the first silicon wafer is stored and the quartz chamber 2a is purged. Furthermore, by combining this with a mechanism that automatically stores and takes out wafers into and out of the quartz tubes 43g and 2b, a single-wafer type heat treatment apparatus with high throughput can be realized.
石英チェノΔｊｍ 、２ｂ内にシリコンウェハＪａ 、
Ｊｂをセットし、ハロダンランプ光を照射すれば、その
光エネルギのほとんどはシリコンウェハＪａ 、Ｊｂに
吸収される。シリコンウェハＪａ 、Ｊｂは厚さが０．
５−程度であシ、光はその両面から吸収されるため、直
径数インチのものであればその熱応答速度は速く、時定
数換算で数１００ミリ秒である。又、シリコンウェハ３
ｍ 、 、？ ｂからの放射冷却以外の放熱は先のと
がった石英興シリコン支持台４ｍ、４ｂからのごくわず
かな伝熱と雰囲気ガスからの伝熱だけであるため、シリ
コンウェハＪａ 、３ｂの温度制御はハロダンランプ１
ｍ、１ｂへの入力・やグーの制御により秒オーダ以下で
可能である。Quartz Cheno Δjm, silicon wafer Ja in 2b,
When Jb is set and halodan lamp light is irradiated, most of the light energy is absorbed by the silicon wafers Ja and Jb. The silicon wafers Ja and Jb have a thickness of 0.
Since light is absorbed from both sides, the thermal response speed is fast if the diameter is several inches, which is several hundred milliseconds in terms of time constant. Also, silicon wafer 3
m, ,? Heat radiation other than radiation cooling from b is only a very small amount of heat transfer from the pointed quartz silicon support 4m, 4b and heat transfer from the atmospheric gas, so the temperature control of the silicon wafer Ja, 3b is performed using a halodan lamp. 1
It is possible to do this in less than a second order by controlling the inputs to m and 1b and the control.
第３図は、本発明の急速熱処理装置にて、直径４インチ
のシリコンウェハを加熱し１１００℃１８秒間の熱処理
を行なった場合に得られた加熱特性である。第３図から
秒オーダの高温短時間熱処理が目標温度１１００ＣＫ対
して±４℃程度の精度で制御可能であることが判る。FIG. 3 shows the heating characteristics obtained when a silicon wafer having a diameter of 4 inches was heated at 1100° C. for 18 seconds using the rapid thermal processing apparatus of the present invention. It can be seen from FIG. 3 that high-temperature, short-time heat treatment on the order of seconds can be controlled with an accuracy of approximately ±4° C. with respect to a target temperature of 1100 CK.
第４図は、本発明の急速熱処理装置に、酸素を導入し、
第３図で示したような高温短時間熱処理を行なりた場合
の酸化時間と酸化膜厚との関係を示す特性図である。第
４図の酸化特性は先に示した理由から、従来の電気炉等
では得ることのできなかった高温短時間の酸化特性であ
ル、このことから、本発明の酸素中でのハロゲンランプ
光照射が短時間にシリコンウェハ１の酸化を可能とする
、スループットの高いシリコンウェハ酸化法であること
がわかる。FIG. 4 shows that oxygen is introduced into the rapid heat treatment apparatus of the present invention,
FIG. 4 is a characteristic diagram showing the relationship between oxidation time and oxide film thickness when high-temperature, short-time heat treatment as shown in FIG. 3 is performed. For the reason shown above, the oxidation characteristics shown in FIG. It can be seen that this is a high-throughput silicon wafer oxidation method that allows irradiation to oxidize the silicon wafer 1 in a short time.
酸素中１０５０℃２６０秒のハロダンランプ光照射によ
り形成した２１６Ｘのシリコン酸化膜をＡＬｆ−）ＭＯ
Ｓダイオードのｒ−ト酸化膜として適用し、そのＩ Ｍ
Ｈｎ高周高周波Ｃ性特測知結果を第５図に示す。第５図
よシ特性は曳好でアシ、本発明による酸化法がＭＯ８Ｌ
８Ｉのｙ−ト酸化膜として充分適用できることがわかる
。A silicon oxide film of 216
It is applied as the r-t oxide film of S diode, and its I M
The Hn high-frequency high-frequency C characteristic detection results are shown in FIG. As shown in Figure 5, the characteristics are good and the oxidation method according to the present invention is MO8L.
It can be seen that it can be sufficiently applied as a y-to oxide film of 8I.
本発明の他の実施態様として、あらかじめ１ず気炉中あ
るいは上記の方法で得られた酸化膜を急速熱処理装置に
たとえば窒素などの非酸化性ガスを導入し、ハロダンラ
ンプ光加熱を行なうことも可能である。電気炉を用いて
酸素中９００℃、７２分の酸化により得た２００Ｘの酸
化膜を窒素中１０５０℃、６０秒のハロダンランプ光照
射を行なった場合のＡｔグー）ＭＯＳダイオードの界面
準位密度を第６図に示す。Ａはハロダンランプ光照射を
行なっていないダイオードのデータ、Ｂはハロダンラン
プ光照射を行なりたダイオードのデータである。第６図
からハロダンランプ光照射で界面単位密度が改善されて
いることがわかる。As another embodiment of the present invention, it is also possible to first introduce a non-oxidizing gas such as nitrogen into an air furnace or a rapid heat treatment apparatus for the oxide film obtained by the above method, and then perform light heating with a halodane lamp. It is. When a 200X oxide film obtained by oxidation at 900°C in oxygen for 72 minutes using an electric furnace is irradiated with halodane lamp light for 60 seconds at 1050°C in nitrogen, the interface state density of the MOS diode is determined as follows: It is shown in Figure 6. A is data for a diode not irradiated with halodan lamp light, and B is data for a diode irradiated with halodan lamp light. It can be seen from FIG. 6 that the interfacial unit density is improved by irradiation with halodan lamp light.
なお、従来の装置では温度制御のための温度検出系とし
て、熱処理サンプルに隣接して置かれたシリコンチップ
に接続されたＣＡ熱電対を用いていたためこのＣＡ熱電
対は高温酸素中の酸化でもろくなシ、連続使用に耐えら
れなかった。これに対し、本発明の装置では、第２図に
示すように、温度検出系として、表面がシリコン酸化膜
で覆われたシリコンチップ８ｍ＊８ｂに接続されたＰＲ
熱電対９＊、９ｂをシリコンウェハＪａ、ＪｂＫ隣接し
て配置させることＫよって１４００℃穆度までの高温酸
素中でも連続して安定使用が可能となった。In addition, as the conventional device used a CA thermocouple connected to a silicon chip placed adjacent to the heat-treated sample as a temperature detection system for temperature control, this CA thermocouple became brittle due to oxidation in high-temperature oxygen. However, it could not withstand continuous use. On the other hand, in the device of the present invention, as shown in FIG.
By arranging the thermocouples 9* and 9b adjacent to the silicon wafers Ja and JbK, continuous and stable use is possible even in high temperature oxygen up to 1400°C.
以上説明したように、本発明の方法における酸素中のハ
ロダンランプ光照射によるシリコンウェハの酸化方法は
、短時間で一連の処理が完了するためスループットが高
い優れた酸化方法である。さらに、シリコン酸化膜の非
酸化性雰囲気中でのハロダンランプ光照射による熱処理
方法は、高温であるが短時間の処理であるため、シリコ
ン基板中の特定の領域に局在させるべき不純物の大幅な
拡散による素子の特性悪化といりた、素子への悪影響を
極力抑えつつ、シリコン酸化膜とシリコン界面の界面準
位密度を低下させ、それによりて優れたＭＯ８型半導体
素子を得ることを可能とする熱処理方法である。As explained above, the method of oxidizing a silicon wafer by irradiating halodane lamp light in oxygen in the method of the present invention is an excellent oxidation method with high throughput because a series of treatments can be completed in a short time. Furthermore, since the heat treatment method of silicon oxide film by irradiation with halodane lamp light in a non-oxidizing atmosphere is a high-temperature but short-time treatment, impurities that should be localized in specific areas in the silicon substrate are significantly diffused. Heat treatment that reduces the interface state density between the silicon oxide film and the silicon interface while minimizing adverse effects on the device, such as deterioration of device characteristics due to heat treatment, thereby making it possible to obtain an excellent MO8 type semiconductor device. It's a method.
また、本発明による急速熱処理装置では、２つの熱処理
槽を交互に働かせることができるため、自動ウェハ族て
ん機構と組み合わせることによってスループットの高い
枚葉式の光照射による熱処理が可能であると共に、温度
検出系としてシリコン酸化膜上のＰＲ熱電対を用いるこ
とによって酸素雰囲気中でも安定した温度制御が可能で
ある。さらに、／＃−ジ時に大量のガスを導入し、光照
射時にガス流量を絞る機構を付加することにより、従来
の一定流量のガス導入しか行なえなかった装置に比し、
・クージ時間を大幅に減少させることができるため、酸
素ガス使用時においても、・苧−ジ時間によるスループ
ットの低下を防止することができる。In addition, in the rapid heat treatment apparatus according to the present invention, the two heat treatment tanks can be operated alternately, so when combined with an automatic wafer concentration mechanism, it is possible to perform heat treatment by single wafer light irradiation with high throughput, and also to increase the temperature. By using a PR thermocouple on a silicon oxide film as a detection system, stable temperature control is possible even in an oxygen atmosphere. Furthermore, by adding a mechanism that introduces a large amount of gas during the /#- period and throttles the gas flow rate during light irradiation, compared to conventional devices that can only introduce gas at a constant flow rate,
・Since the cooling time can be significantly reduced, even when oxygen gas is used, it is possible to prevent throughput from decreasing due to the cooling time.
第１図は、従来の急速熱処理装置を示し、（ａ）はその
横断百図、（ｂ）は（ａ）のＡ −Ａ’縦断面図、第２
図は本発明の一実施例に係る急速熱処理装置を示し、（
１）はその横断百図、（ｂ）は（ａ）のＢ−Ｂ’縦断面
図、第３図は本発明の方法によるシリコンウェハの加熱
特性、第４図は本発明の方法によるシリコンウェハの酸
化特性、第５図は本発明の方法により得たシリコン酸化
膜の高周波ＣＶ特性、第６図は本発明の方法による界面
準位密度の改善を示す特性図をそれぞれ示す。
１．１ｍ、１ｂ・・・ハ’ｏグンランデ、２．２ｍ。
ｘ ｂ−・・石英チェンバ、３ 、 ｊ ｈ 、 ３
ｂ ・・・シリコンウェハ、４．４ｍ、４ｂ・・・石英
製ウェハ支持台、５．５ｍ、５ｂ・・・蓋。
出願人代理人 弁理士 鈴 江 武 彦第１図
（ａ）
第２図
（ｂ）
第３図
升円（秒）
第４図
酸（ｔＺａＴｒＩ （ｖ）
第６図FIG. 1 shows a conventional rapid heat treatment apparatus; (a) is a cross-sectional view thereof, (b) is a vertical cross-sectional view taken along line A-A' of (a), and FIG.
The figure shows a rapid heat treatment apparatus according to an embodiment of the present invention, (
1) is a cross-sectional view thereof, (b) is a BB' vertical cross-sectional view of (a), FIG. 3 is the heating characteristics of a silicon wafer according to the method of the present invention, and FIG. 4 is a diagram showing the silicon wafer according to the method of the present invention. 5 shows the high-frequency CV characteristics of the silicon oxide film obtained by the method of the present invention, and FIG. 6 shows a characteristic diagram showing the improvement in interface state density by the method of the present invention. 1.1m, 1b...Ha'o Gunlande, 2.2m. x b-...quartz chamber, 3, j h, 3
b... Silicon wafer, 4.4m, 4b... Quartz wafer support stand, 5.5m, 5b... Lid. Applicant's representative Patent attorney Takehiko Suzue Figure 1 (a) Figure 2 (b) Figure 3 Square circle (seconds) Figure 4 Acid (tZaTrI (v) Figure 6
Claims (5)
スを導入する工程、および前記シリコンウェハに光を照
射することによりシリコンウェハを熱処理して表面に酸
化膜を形成する工程を具備する半導体装置の製造方法。(1) A semiconductor device comprising a step of introducing an oxidizing gas into a heat treatment tank that stores a silicon wafer, and a step of heat-treating the silicon wafer by irradiating the silicon wafer with light to form an oxide film on its surface. manufacturing method.
することにより更に熱処理する工程を更に具備する特許
請求の範囲第１項記載の半導体装置の製造方法。2. The method of manufacturing a semiconductor device according to claim 1, further comprising the step of further heat-treating the silicon wafer by irradiating the silicon wafer with light in a non-oxidizing gas.
する熱処理槽内に非酸化性ガスを導入する工程、および
前記シリコンウェハに光を照射することによりシリコン
ウェハを熱処理する工程を具備する半導体装置の製造方
法。(3) A semiconductor comprising a step of introducing a non-oxidizing gas into a heat treatment tank that houses a silicon wafer with an oxide film formed on its surface, and a step of heat-treating the silicon wafer by irradiating the silicon wafer with light. Method of manufacturing the device.
たものである特許請求の範囲第３項記載の半導体装置の
製造方法。(4) The method of manufacturing a semiconductor device according to claim 3, wherein the oxide film is formed by heat treatment in an electric furnace.
上の熱処理槽と、前記熱処理サンプル出入口を通して前
記熱処理槽内に熱処理サンプルを出し入れする機構と、
前記熱処理槽内に導入するガス流量を制御する手段と、
前記各熱処理槽内の熱処理サンプルに順次光照射を行な
う手段を具備する半導体装置の製造装置。(5) two or more heat treatment tanks having sealable heat treatment sample entrances and exits, and a mechanism for loading and unloading the heat treatment samples into and out of the heat treatment tank through the heat treatment sample entrances;
means for controlling the flow rate of gas introduced into the heat treatment tank;
A semiconductor device manufacturing apparatus comprising means for sequentially irradiating the heat treated samples in each of the heat treatment tanks with light.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60046040A JPH0691076B2 (en) | 1985-03-08 | 1985-03-08 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60046040A JPH0691076B2 (en) | 1985-03-08 | 1985-03-08 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61206230A true JPS61206230A (en) | 1986-09-12 |
| JPH0691076B2 JPH0691076B2 (en) | 1994-11-14 |
Family
ID=12735915
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60046040A Expired - Lifetime JPH0691076B2 (en) | 1985-03-08 | 1985-03-08 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0691076B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7025831B1 (en) * | 1995-12-21 | 2006-04-11 | Fsi International, Inc. | Apparatus for surface conditioning |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5694631A (en) * | 1979-12-28 | 1981-07-31 | Fujitsu Ltd | Forming method for minute pattern |
| JPS58192330A (en) * | 1982-05-06 | 1983-11-09 | Oak Seisakusho:Kk | Oxidation treating method for surface of silicon wafer |
| JPS59126641A (en) * | 1983-01-11 | 1984-07-21 | Seiko Epson Corp | Photo-oxidation |
| JPS6124239A (en) * | 1984-07-13 | 1986-02-01 | Nippon Telegr & Teleph Corp <Ntt> | Manufacture of thin film semiconductor device |
| JPS6187341A (en) * | 1984-10-05 | 1986-05-02 | Nec Corp | Oxidation and nitriding device for surface of silicon irradiated with beam |
-
1985
- 1985-03-08 JP JP60046040A patent/JPH0691076B2/en not_active Expired - Lifetime
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5694631A (en) * | 1979-12-28 | 1981-07-31 | Fujitsu Ltd | Forming method for minute pattern |
| JPS58192330A (en) * | 1982-05-06 | 1983-11-09 | Oak Seisakusho:Kk | Oxidation treating method for surface of silicon wafer |
| JPS59126641A (en) * | 1983-01-11 | 1984-07-21 | Seiko Epson Corp | Photo-oxidation |
| JPS6124239A (en) * | 1984-07-13 | 1986-02-01 | Nippon Telegr & Teleph Corp <Ntt> | Manufacture of thin film semiconductor device |
| JPS6187341A (en) * | 1984-10-05 | 1986-05-02 | Nec Corp | Oxidation and nitriding device for surface of silicon irradiated with beam |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7025831B1 (en) * | 1995-12-21 | 2006-04-11 | Fsi International, Inc. | Apparatus for surface conditioning |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0691076B2 (en) | 1994-11-14 |
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