JPS6119578U - Flat package integrated circuit case - Google Patents

Flat package integrated circuit case

Info

Publication number
JPS6119578U
JPS6119578U JP10324984U JP10324984U JPS6119578U JP S6119578 U JPS6119578 U JP S6119578U JP 10324984 U JP10324984 U JP 10324984U JP 10324984 U JP10324984 U JP 10324984U JP S6119578 U JPS6119578 U JP S6119578U
Authority
JP
Japan
Prior art keywords
integrated circuit
flat package
package integrated
circuit case
leads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10324984U
Other languages
Japanese (ja)
Inventor
博充 涌井
Original Assignee
沖電気工業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 沖電気工業株式会社 filed Critical 沖電気工業株式会社
Priority to JP10324984U priority Critical patent/JPS6119578U/en
Publication of JPS6119578U publication Critical patent/JPS6119578U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】 第1図a, bは本考案フラットパッケージ型集積回路
用ケースの一実施例を示し、aはその平面図、bはa図
のA−A’断面図、第2図a, bはフラットパッケー
ジ型集積回路の一例で、aはその平面図、bは正面図、
第3図a,bは従来のケースで、aはその平面図、bは
a図のB−B’断面図である。 1・・・ケース本体、2・・・外辺、3・・・段部、4
・・・中空部分、5・・・溝、11・・・プラスチック
樹脂、12・・・リード。
[Brief Description of the Drawings] Figures 1a and 1b show an embodiment of the flat package integrated circuit case of the present invention, in which a is a plan view thereof, b is a sectional view taken along line A-A' in figure a, Figures a and b are examples of flat package integrated circuits, where a is a plan view, b is a front view,
Figures 3a and 3b show the conventional case, where a is a plan view thereof and b is a sectional view taken along line BB' in figure a. 1...Case body, 2...Outside edge, 3...Step part, 4
...Hollow part, 5...Groove, 11...Plastic resin, 12...Lead.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] フラットパッケージ型集積回路の樹脂部分を収納する中
空部と該集積回路のリードを乗せる段部と、複数のケー
スを嵌合して積重ねるた吟の段部とを具備するフラット
パッケージ型集積回路用ケースにおいて、前記集積回路
のリードを乗せる段部には、それぞれリードに嵌合する
溝を設けたことを特徴とするフラットパッケージ型集積
回路用ケース。
For flat package integrated circuits, comprising a hollow part for storing the resin part of the flat package integrated circuit, a step part for placing the leads of the integrated circuit, and a step part for fitting and stacking a plurality of cases. 1. A case for a flat package integrated circuit, characterized in that the stepped portions on which the leads of the integrated circuit are placed are provided with grooves that fit the leads, respectively.
JP10324984U 1984-07-10 1984-07-10 Flat package integrated circuit case Pending JPS6119578U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10324984U JPS6119578U (en) 1984-07-10 1984-07-10 Flat package integrated circuit case

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10324984U JPS6119578U (en) 1984-07-10 1984-07-10 Flat package integrated circuit case

Publications (1)

Publication Number Publication Date
JPS6119578U true JPS6119578U (en) 1986-02-04

Family

ID=30662643

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10324984U Pending JPS6119578U (en) 1984-07-10 1984-07-10 Flat package integrated circuit case

Country Status (1)

Country Link
JP (1) JPS6119578U (en)

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