JPS61159774A - Compound semiconductor device - Google Patents
Compound semiconductor deviceInfo
- Publication number
- JPS61159774A JPS61159774A JP59281562A JP28156284A JPS61159774A JP S61159774 A JPS61159774 A JP S61159774A JP 59281562 A JP59281562 A JP 59281562A JP 28156284 A JP28156284 A JP 28156284A JP S61159774 A JPS61159774 A JP S61159774A
- Authority
- JP
- Japan
- Prior art keywords
- type
- layer
- junction
- impurity
- xas
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 15
- 150000001875 compounds Chemical class 0.000 title claims abstract description 9
- 239000012535 impurity Substances 0.000 claims abstract description 39
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims abstract description 31
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 230000001747 exhibiting effect Effects 0.000 claims description 4
- 229910052732 germanium Inorganic materials 0.000 claims description 4
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 4
- 239000013078 crystal Substances 0.000 abstract description 12
- 125000005842 heteroatom Chemical group 0.000 abstract description 5
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 abstract description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 27
- 239000007791 liquid phase Substances 0.000 description 14
- 238000000034 method Methods 0.000 description 14
- 239000000243 solution Substances 0.000 description 13
- 239000007788 liquid Substances 0.000 description 8
- 238000009792 diffusion process Methods 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 210000004709 eyebrow Anatomy 0.000 description 3
- 238000002347 injection Methods 0.000 description 3
- 239000007924 injection Substances 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000012071 phase Substances 0.000 description 2
- 229920006395 saturated elastomer Polymers 0.000 description 2
- 241000255789 Bombyx mori Species 0.000 description 1
- 241000218645 Cedrus Species 0.000 description 1
- 240000005109 Cryptomeria japonica Species 0.000 description 1
- 241001669573 Galeorhinus galeus Species 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- FTWRSWRBSVXQPI-UHFFFAOYSA-N alumanylidynearsane;gallanylidynearsane Chemical compound [As]#[Al].[As]#[Ga] FTWRSWRBSVXQPI-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- -1 aluminum gallium arsenide compound Chemical class 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000007710 freezing Methods 0.000 description 1
- 230000008014 freezing Effects 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 210000004243 sweat Anatomy 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/0004—Devices characterised by their operation
- H01L33/002—Devices characterised by their operation having heterojunctions or graded gap
- H01L33/0025—Devices characterised by their operation having heterojunctions or graded gap comprising only AIIIBV compounds
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Light Receiving Elements (AREA)
- Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
- Junction Field-Effect Transistors (AREA)
- Semiconductor Lasers (AREA)
- Led Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、発光素子およびトランジスタなどに有用な、
単一不純物を添加してなるp−n接合を有するアルミニ
ウムガリウム砒素系化合物半導体装曖に関するものであ
る。[Detailed Description of the Invention] [Industrial Field of Application] The present invention provides a light emitting device, a transistor, etc. useful for light emitting devices, transistors, etc.
The present invention relates to an aluminum gallium arsenide compound semiconductor device having a pn junction formed by adding a single impurity.
化合吻半導不の液相成長法岐、例えば溶融ガリウム(G
a)溶液に高温でガリウム砒!! (GaAs )、ア
ルミこラム(Aj’ )むよび・前当な不純物を溶解さ
せてアルミニウムガリウム砒素(A/GaAs ’FD
飽和鷹液な作り、この飽和Ga溶液をGaAsまな岐A
/GaAs 4板上に接触させ徐冷することによりA/
GaA1碕晶を成長させることからなっている〇この液
相@樋法によって、p−n接合を有する化合物半導体を
得るに岐、一般にp形伝導性を示すp形不#祷とn形伝
導性を示すnP3不純物とをそれぞれ添加しな溶液小ら
形成するか、またけp形およびn形伝導性の両方を示す
両性不純物を添加した溶液から形成する方法がある。Non-semiconducting liquid phase growth methods, such as molten gallium (G
a) Gallium arsenic in solution at high temperature! ! (GaAs), aluminum column (Aj') and aluminum gallium arsenide (A/GaAs 'FD) by dissolving the impurities.
Make a saturated falcon solution, and add this saturated Ga solution to GaAs Managi A.
/GaAs 4 by contacting and slowly cooling A/
By this liquid phase method, a compound semiconductor having a p-n junction is obtained, which generally consists of growing a p-type conductivity and an n-type conductivity. There is a method of forming from a solution without adding nP3 impurity, which exhibits .
従来、GaAsおよびA/xGa 1−xAsにおいて
、結晶成長によりp−n接合を形成する場合一般にp杉
不純吻としてZn、 BへMgなどを用いている狐これ
らの不fIl吻喧結晶成咲中むよびその後の熱処1中に
拡散により移動するため、当初のp1接合の位置がn府
側に移動することとなり、p−n接合の不純物分布およ
び位置の制御が困難である。このことを端5図をもって
従来のAjGaAsのp−nu合について説明すると、
液相エピタキシャル我醍法により、n形GaAs肩板l
l上にn形不純!#1111eをドープし一!P−n
W klxGal−xAs @ 12を績晶戎長せしめ
、次にp形不純物Znをドープしたp形AlyGa 1
−yAs f@ 14を前記n形層12の上にエピ々キ
シャル成長させている。この場合、本来不純物Znが拡
散しをければp−n接合の位置16社、n形層12とp
1ヒー14の界面にあるはずである。Conventionally, when forming a p-n junction by crystal growth in GaAs and A/xGa1-xAs, Zn, Mg, etc. are generally used as the p-p impurity. Since the impurities move by diffusion during the subsequent heat treatment 1, the original position of the p1 junction moves to the n-fu side, making it difficult to control the impurity distribution and position of the pn junction. To explain this about the conventional p-nu combination of AjGaAs using Figure 5,
By the liquid phase epitaxial method, n-type GaAs shoulder plate l
N-type impurity on l! Dope #1111e! P-n
W klxGal-xAs @ 12 was crystallized and then p-type AlyGa 1 doped with p-type impurity Zn
-yAs f@ 14 is epitaxially grown on the n-type layer 12. In this case, if the impurity Zn is originally not diffused, the p-n junction position 16, the n-type layer 12 and the p-n
It should be at the interface of 1 and 14.
しかしながら、I) W AJyGan−yAs層14
の結晶成長中に不純41y Znの拡散による移動がお
きて、p−f’1層合而が面初の接合位[16からn形
/L#xGa 1−xAs膚12中へと移動する。移動
しな接合位115を破線で示す。そのため、n形讐中に
図に示すようにp形AJxGa1−xAs l 13が
形成される。このようにp−n接合面がずれる現象は、
X〜yのへテロ接合のときrN踵で、ヘテap−1接合
を作ったつもりが実は、p P、AJxGal−xAs
AlB12形A/xGa1−xAs @ 12とのホモ
p−n接合となるなめ、発光素子としたときキャリアの
とじ込め効果や曳少数キャリアの注入効率などが城少し
、発光効率6f悪くなると小、まなトランジスタの場合
ではZnをドープしをp形A/GaAsをベースとする
J−1n形エミツ々、ゴレクタ側にZnが拡散してペー
ス巾が広<lkす、側波I&特注が低下するという間−
を生ずる@
一方、凍り族元素である珪11g(Si)はp形層よび
n形伝導性を示す両性不純物でちることが、GaAsで
示されており、同族であるゲルマニウム(Ge)につい
ても両極性が期待されている0特にSi吋同−不純物の
添加によってGaAs中にp−n接合を形成することが
でき、このものは結晶成長m程およびその後の熱処1で
、上記異種不純物により形成しなp−n接合に与られる
ようなp−n接合位胃の変動がなく、発光素子などに実
用化されてμる〇
上記の叩く、同一不純物の添加によってp−n接合が形
成できれば、p−n接合の移動もを〈良好な#性カ得ら
れるこ七から、AlxGat−xAs(0(x(1)系
においても、発光素子、受光素子およびトランジスタな
どで要望されているが、液相ljt長法で#iklが含
まれるAJGaAsで蝶、不純!siでは実用キャリア
濃度でのp形伝導性が得られていをい。不純物Geで蝶
n形伝導性が優られていなさっな。その−由として狭い
限定された成長条件でちるなめおよびあまり母金に調べ
られなかっなセめと考えられる。However, I) W AJyGan-yAs layer 14
During crystal growth, impurity 41yZn moves due to diffusion, and the p-f'1 layer moves from the plane-first junction [16] into the n-type/L#xGa1-xAs layer 12. A non-migrated junction 115 is indicated by a dashed line. Therefore, p-type AJxGa1-xAs 13 is formed in the n-type as shown in the figure. This phenomenon in which the p-n junction plane shifts is caused by
When there is a heterojunction between
Since it becomes a homo p-n junction with AlB12 type A/xGa1-xAs @ 12, when used as a light emitting element, the carrier trapping effect and the injection efficiency of attracted minority carriers will be slightly reduced, and if the luminous efficiency 6f deteriorates, it will be small. In the case of transistors, Zn-doped p-type A/GaAs-based J-1n emitters have Zn diffused into the collector side, increasing the pace width and reducing the side wave I & customization. −
On the other hand, it has been shown in GaAs that silicon 11g (Si), which is a freezing group element, is composed of amphoteric impurities that exhibit p-type layer and n-type conductivity, and germanium (Ge), which is in the same group, also has an amphoteric impurity. It is possible to form a p-n junction in GaAs by adding impurities, especially Si, which is expected to have good properties. If a p-n junction can be formed by adding the same impurity as described above, there is no fluctuation of the p-n junction position as occurs in a p-n junction, and it can be put to practical use in light emitting devices. The movement of the p-n junction can also be improved (because of its ability to obtain good In AJGaAs containing #ikl according to the phase ljt length method, p-type conductivity at a practical carrier concentration is obtained with impure!Si.N-type conductivity is not superior with impurity Ge. This is probably due to the narrow growth conditions that lead to Chiruname and Seme, whose parent metals have not been investigated much.
不純@ Geけ、従来液相エピ41中シヤル成長法でけ
、AlxGa1−xAs(0(x(1) T:n p形
伝導性のみを示し、まな分子線エピ々牛シャル成長でけ
n形伝4性のみしム示さず、それ放間−の成醍法ではn
形およびp形伝導性な同時に制御することけできないと
されてい七〇
一方、前記2mの成長法を使用してもp−n#合葬・曙
のi!!I(Sがむずかしいなめp−n接合叶まだ得ら
れていない。Impurity@Ge, conventional liquid phase epitaxial growth method shows only AlxGa1-xAs (0(x(1) T:n p-type conductivity, and molecular beam epitaxial growth shows n-type conductivity. 4.The way to develop yourself is to not show the only characteristic of nature, but to do it in a relaxed manner.
On the other hand, even if the 2m growth method described above is used, it is impossible to control the p-n conductivity and p-type conductivity at the same time. ! A p-n junction in which I(S is difficult) has not yet been obtained.
しかしながら、仮りに同一不純物Geによってp−n
79合を有するAlxGa1−xAs(0(x(1)i
sを得れば、上記しなようにp−n接合の4!glh#
′i生ぜず、p−n接合界面での不純物濃度ボ少なくな
り、しか屯Geけ拡散係数が小さいなめ拡散のほとんど
ない良好な化合物半導体装置な得ることができることが
予想される。However, if the same impurity Ge causes p−n
AlxGa1-xAs(0(x(1)i
If s is obtained, the 4! of the p-n junction as described above! glh#
It is expected that it will be possible to obtain a good compound semiconductor device in which the impurity concentration at the p-n junction interface is reduced, and the Ge diffusion coefficient is small, so that there is almost no diffusion.
しながって、本発明は同一不純物Geを使用してなるn
形A/xGa 1−xAs (0(x (1)とp形A
7yGa 1−yAs (Q (y (1)とのp−n
接合を有する化合物半導体装置を提供せんとするもので
ある。Therefore, the present invention uses the same impurity Ge.
Form A/xGa 1-xAs (0(x (1) and p form A
7yGa 1-yAs (p-n with Q (y (1)
The present invention aims to provide a compound semiconductor device having a junction.
本発明者らは、従来p形)JGa)hsを作るのに用い
られていな伽不純物について注目し%!tJ不純物につ
いて詳嘲なドーピング実験を行った結果、従来のAlG
aAsの液相成長法においても、結晶成長温間、Ga・
溶液中へのGeの添加量を一定にして、AA?の蚕加碌
すなわち成長する人lGa 1−xAsのX値を増加さ
せていくと、成長するAJxGa1−X&Sが成るX値
以上となるとp形からn形に変わることを見出しな0
したがりて、本発明の化合物半導体装[は、不純物とし
てGeを添加したn形伝導性を示すAJxGa 1−x
As(0(x(1)kよびp形伝導性を示すIylyG
a 1−yAs (0< y < 1 )のp1接合を
少々くとも一つ含むことを特徴とする。The present inventors focused on the impurities that have not been used in the conventional production of p-type JGa) hs. As a result of detailed doping experiments with tJ impurities, we found that conventional AlG
In the aAs liquid phase growth method, warm crystal growth, Ga.
By keeping the amount of Ge added to the solution constant, AA? As we increase the X value of the silkworm, that is, the growing person lGa1-xAs, we find that when the growing AJxGa1-X&S exceeds the X value, it changes from p-type to n-type.0 Therefore, The compound semiconductor device of the present invention [is AJxGa 1-x exhibiting n-type conductivity with Ge added as an impurity.
As(0(x(1)k and IylyG exhibiting p-type conductivity
It is characterized by containing at least one p1 junction of a 1-yAs (0<y<1).
(に具体的には、本発明の半導体i@q、()aAs
J板ヒに、該基板と同一伝導性を示す不純物Geを添加
しな肩1のuxGa 1−xAs (0(x (1)
1を形成し、咳第1の聯と喧異なる伝導性を示す不純物
Geをamしな嬉2のAJyGa 1−yAs (0<
’!<1)聯を前記第1の層上に形成し、前記GaAs
基板およびAJyGa 1−yAsJi K JE &
を形成したものからなり、例えばこの構成からなるダイ
オードを包含する。(Specifically, the semiconductor i@q of the present invention, ()aAs
Do not add Ge, an impurity that has the same conductivity as the substrate, to the J-board.
AJyGa 1-yAs (0<
'! <1) Forming a bond on the first layer, and forming a bond on the first layer,
Substrate and AJyGa 1-yAsJi K JE &
For example, it includes a diode having this configuration.
また、本発明の半導体装置は、GaAs基板上に1該基
板と同−伝、悼性を示す肩lのuxGa t −X人3
(0(x(1)IF k形成し、該s1の轡と#−j!
J4なる伝4ヰを示す不純物Geを添加した第2のAJ
yGa1−yAs(0<y<1 ) !flJを前記4
1の層上に形成し、(に前記第1の層と同じ伝導性を示
す不純物Get添加しfe’′s3のkl zGa 1
−zAs (0(z (1)#/を前記第2の層上に形
成してなり、かつ前記−GaAs4板s Aj’yGa
1−yAs @およびA#Ga 1−zA4に成極を形
成し念ものからなり、例えばこの構成よりなるトランジ
スタを包含する。Further, the semiconductor device of the present invention is provided on a GaAs substrate with a ux Ga t -
(0(x(1)IF k is formed, and #-j!
The second AJ with impurity Ge added showing the legend 4i called J4
yGa1-yAs(0<y<1)! flJ above 4
kl zGa 1 of fe''s3, doped with an impurity Get that has the same conductivity as the first layer.
-zAs (0(z (1) #/) is formed on the second layer, and the -GaAs4 plate sAj'yGa
1-yAs @ and A#Ga 1-zA4, and includes, for example, a transistor having this configuration.
以ド、本発明をよりJL体的に説明する。Hereinafter, the present invention will be explained in a more JL style.
従来の液相エピタキシャル成長法では、pF’3A/x
Ga 1−xAsをうるとき、所定量のGaAsとMを
含有するGa 溶液(/11融液)中にGa1gにつき
伽を約0.01g添加して−な0本発明者らは、このG
eの添加量を従来よりも少くした条件、例えばGa1g
につきo、oos gと小、0.002gとしなときニ
”l) イテ、人JxGa 1−xAsをGaAs基板
上にMl減を種々資化させて800°Cの飽和温度で液
相成長させたところ、41151図に示すように、Ge
の添加量が同一でもMIIIi成値Xを増加させると、
すなわちGa溶液へのMの添加量を増加させると、時晶
成浸するAJxGa 1−xAsが従来知られているp
形から今まで知られていなかっなn形に賓ることを見出
した。具体的に説明すると、まずM(L 5 GaO,
7Asが成長af能なtllのGaAsとAJ &よび
Ga1gにつき0.002 gのGeをGa中に800
’0でと小したGa溶液を作り、このGa溶液を例えば
第2図に示すようにp形GaAs 基板1上に接軸させ
て徐冷し、Ga溶液を除去すると、該基板l上に411
のp形人in、s Gap、y As 層2 (キャリ
アA lt= 10 ” an−’)がtaiする。つ
づいてAJ 0.65Ga o、 ss As M成長
するような通量のGaAsとAIおよびGa Ig K
ツき0.002 g tD Ge 7kGa中ニ80
060でとかし七〇a溶液を前記嬉1の層2上に接峡さ
せ徐冷し、Ga溶液を除去すると前記′41の層2上に
n形An O,45Gaa、 !S Asss(キャリ
ア4 ? =m to” am−3)が成長し、n形A
go、6s Gao、 is As−p形AJo、 s
Ga o、 y Asのヘテap−n接合を形成する
ことができる。こうして作られ七本発明のへテロp−n
接合は断面をSEMにより観測すると、p−n接合の位
置を示す電子ゼームにより誘起される起電力信号のピー
ク5位へテロ界面6と一致しており、45図で説明しな
ような結晶成長中にヘテロ接合界面とp−nm合との分
離がおこっていな−ことがわかる(4!2図参a)OE
記のp−n反転のXの値は、不純物Geの添加量の減少
により低下する。jlli1図に示すように、Geの添
加量が0.002 gのときo、oos gのときより
もAAfAsのモル分率は小さい。ま7Th、p@n反
転のXの噴け、Ga溶液中のGe添加II−を一定とし
たとき飽和a麿の上昇により減少することもわかりを〇
は上述べたように、液$a成長法での不純物としてGe
t添加しなAArxGa 1−xAsの成長特性から1
0a溶液中のGe添加曖およびM添加量、さらにGa溶
液の飽和弧度(はぼ成長層間に等しい)の条件を選定す
ることにより、同一不純物Geを添加してn形およびp
形AjxGa 1−xAsを成長させることができる0
虜1図の結果かられかるように、Geの添加量をn影響
とp影響で弯えることによりA/xGa 1−xAsの
ホモp−n接合も可能である。In the conventional liquid phase epitaxial growth method, pF'3A/x
When obtaining Ga1-xAs, the present inventors added about 0.01 g of Ga per 1 g of Ga to a Ga solution (/11 melt) containing a predetermined amount of GaAs and M.
Conditions in which the amount of e added is smaller than before, for example, 1 g of Ga.
(0, oos g and small, 0.002 g and 2"l) JxGa 1-xAs was grown in liquid phase on a GaAs substrate at a saturation temperature of 800°C with various reductions in Ml. However, as shown in Figure 41151, Ge
Even if the amount of addition is the same, if the MIIIi value X is increased,
That is, when the amount of M added to the Ga solution is increased, AJxGa 1-xAs, which crystallizes over time, becomes
Based on its shape, I discovered that it is a hitherto unknown n-type. To explain specifically, first, M(L 5 GaO,
7As grows af-capable GaAs and AJ & 0.002 g of Ge per 1 g of Ga in 800 g of Ga.
When a small Ga solution is prepared, for example, on a p-type GaAs substrate 1 as shown in FIG.
The p-type layer 2 (carrier Alt=10''an-') is grown. Then, AJ 0.65Gao, ss As M is grown. GaIgK
Tsuki 0.002 g tD Ge 7kGa Medium Ni 80
When the 70a solution melted with 060 is applied to the layer 2 of the above-mentioned 1 and slowly cooled, and the Ga solution is removed, n-type AnO, 45Gaa, ! S Asss (carrier 4?=m to” am-3) grows and becomes n-type A
go, 6s Gao, is As-p form AJo, s
A heteroap-n junction of GaO, yAs can be formed. Seven heterogeneous p-n of the present invention made in this way
When the cross section of the junction is observed by SEM, the peak 5 of the electromotive force signal induced by the electron beam, which indicates the position of the p-n junction, coincides with the heterointerface 6, indicating crystal growth that cannot be explained in Fig. 45. It can be seen that there is no separation between the heterojunction interface and the p-nm junction (see Figure 4!2 a).
The value of X in the pn inversion described above decreases as the amount of the impurity Ge added decreases. As shown in Figure 1, when the amount of Ge added is 0.002 g, the molar fraction of AAfAs is smaller than when the amount of Ge added is o, oos g. It is also found that when the Ge addition II- in the Ga solution is constant, the jet of Ge as an impurity in the method
From the growth characteristics of AArxGa 1-xAs without t addition, 1
By selecting the Ge addition amount and M addition amount in the 0a solution, and the saturation arc degree of the Ga solution (equal between the growth layers), the same impurity Ge is added to form n-type and p-type.
The form AjxGa 1-xAs can be grown0
As can be seen from the results in Figure 1, homopn junctions of A/xGa 1-xAs are also possible by varying the amount of Ge added depending on the n and p effects.
〔′J!1例〕 以下、本発明を実・1例により説明する。[′J! 1 example] Hereinafter, the present invention will be explained by way of a practical example.
実鳴例1
fa3図に示すように、n形GaAs基板31上に不純
物としてGet添加しfen形人70.70a0.3
AsWI321E子晴度= 3X10 am )を2
tsm 114度の厚さに1F咬し、さらに七の上に
不純物としてGeを添加したp形人70.20ao、e
As層33Cホール4! = 1.5XIO’ cm
−’)を厚さ2μm程實形成し、基板31およびp形A
j’0.20ap、 a As ’M 33に電極あを
形成してなるヘテロルーn接合界面具をもつダイオード
を作製しな。このダイオードは、ヘテロ接合界面とp−
n接合界面が、瀉2図に示したものと同様によく一致し
た高性能のへテロ接合ダイオードで、発光および受光素
子として使用可能である。Actual sound example 1 As shown in figure FA3, Get was added as an impurity onto the n-type GaAs substrate 31 to form a fen-shaped figure 70.70a0.3.
AsWI321E child brightness = 3X10 am) 2
tsm P-type 70.20ao, e with 1F bite on 114 degree thickness and Ge added as an impurity on top of 70.
As layer 33C hole 4! = 1.5XIO' cm
-') is formed to a thickness of about 2 μm, and the substrate 31 and the p-type A
j'0.20ap, a As 'M 33. Fabricate a diode having a hetero-n junction interface with an electrode formed thereon. This diode connects the heterojunction interface and the p-
This is a high-performance heterojunction diode whose n-junction interface closely matches the one shown in Figure 2, and can be used as a light-emitting and light-receiving device.
このダイオードの製法は、従来のスライドボートによる
液相エピタキシャル成長法で、液相の仕込み条件なF紀
要1に記載の如くシ、80000でまず褒lのGaメル
トNへ1の組成のGa溶液をn形GaAs基板31上に
接触させ、0.3°CI5+の速さで徐冷しなのちGa
メルトNo、 1液を除去することによってn形AA!
0.7 Gao、 S As Mt32を成長させ、つ
づいて797°0で表1の龜メルトNへ2液1kn I
ff go、 7 Gaol As 脅’12上に接触
さセテ、前記と同じ速さで徐冷しなのちGaメルトNo
、 2液を除去することによって、p形AノG、2 G
aO,8ks−1?33を成長させる。このようにして
得七皓晶に適当なオーミック電極(Au IC極)あを
つけることによって肩3図に示しなへテロ接合ダイオー
ドができる。The manufacturing method for this diode is a conventional liquid phase epitaxial growth method using a slide boat.The liquid phase preparation conditions are as described in F Bulletin 1. After being brought into contact with a GaAs substrate 31 and slowly cooled at a rate of 0.3° CI5+,
Melt No. 1 by removing liquid n-type AA!
0.7 Gao, S As Mt32 was grown, and then 2 liquids 1 kn I were added to the kettle N shown in Table 1 at 797°0.
ff go, 7 Gaol As it is in contact with '12, it is slowly cooled at the same speed as above, and then Ga melt No.
, By removing the 2 liquids, p-type A no G, 2 G
Grow aO,8ks-1?33. By attaching an appropriate ohmic electrode (Au IC electrode) to the obtained crystal in this way, a heterojunction diode as shown in Figure 3 can be obtained.
表1 液相エピタキシャル成長時の液相仕込み条件実棒
例2
本発明によるトランジスタの例を消4図により説明する
。Table 1 Liquid phase preparation conditions during liquid phase epitaxial growth Example 2 An example of a transistor according to the present invention will be explained with reference to FIG.
¥I4図に示すように、n1杉GaAs域板(4子濃麿
= 1 xio18@rn’ ) 41上に不純物を添
加しないノンドープn1GaAs屑42(4子濃度=
lx to” crrr’)な11さ2μm程変形影成
し、このノンドープn形層42上にGeを不純物として
添加したp形A/ (1,2Gao、a As 神43
(ホール?Ik N 〜10 ” am−’ )を0.
2pm厚程麿形成し、このp @ H43上にさらにG
eを不純物として添加しなn形Aj!Q、4 Gtlへ
6 As層祠(電子製産〜tO”Cm ’> ft1
ttm厚1i1&形成し、n形層44上に該−伺に対す
るオーミックコンタクトをとりやす(するなめTeをド
ープしたnlはGaAs層 45 (111E子◆度〜
10” am ’)を形成し、そシテ層葛、 43.4
1の各層にオーミック電#46を形成し、n1杉GaA
s QIF42をコレ少々−1p形klla、2Gaa
、aAsWI43をイース、n形A/a、4Gao、6
As 昔44をエミッター、n e GaAs層45を
オーミックコンタクト用補助膚としなトランジスタの例
である。¥I4 As shown in the figure, a non-doped n1 GaAs scrap 42 (four-element concentration =
The p-type A/ (1,2 Gao, a As God 43
(Hole? Ik N ~10"am-') to 0.
A layer of 2 pm thick is formed, and further G is formed on this p@H43.
n-type Aj without adding e as an impurity! Q, 4 to Gtl 6 As layer shrine (electronic production~tO"Cm '> ft1
ttm thickness 1i1& is formed on the n-type layer 44 to make an ohmic contact with the layer (nl doped with Te is a GaAs layer 45 (111E)
10" am '), and its depth is 43.4
Ohmic conductor #46 is formed on each layer of n1 Sugi GaA
s A little bit of QIF42 - 1p type klla, 2Gaa
, aAsWI43 to Ys, n-type A/a, 4Gao, 6
This is an example of a transistor in which As 44 is used as an emitter and ne GaAs layer 45 is used as an auxiliary layer for ohmic contact.
このトランジスタは、従来のスライドボートによる液相
エピタキシャル成長法にし念がって、セして各層を形成
するなめの液相の仕込み条件を表1のようにして結晶を
作製することによって得られる。各工程を詳記すると、
80000でまず表1のGaメルトNo、3液をn形り
a入S基板41に接触させ0.3°07分の確さで徐冷
し、このGaメルトNへ3液を@I失してノンドープn
形GaAs 層42を成長させ、つづφて797 Go
でGaメルトNα4液をノンドープn形GaAs層42
上に接触させ前記速さで徐冷しGaメルトNへ4液を除
去してGe トープp Ifa AJQ、2 Gaa、
a As層43ケ成長させ、つづいて798°Cでaa
メルトN005液を前記Geドープp形143上に接峡
させ前記速さで徐冷し、GaメルトNo、 5液を#失
してs Geドープn形Uo、a Ga QjAs @
44を成長させ、つづφて796°0でGedルトN
a 6液をGeドープn形844上に接触させ前記速さ
で徐冷しGaメルトNo、 6液を吟去してTeドープ
n形GaAs層45を成長させることによって目的とす
る結晶を得る@このようにして得られた結晶に適当なオ
ーミック電M(人U合金)46をつけると膚4図に示す
ヘテロ接合トランジスタが形成できる。This transistor is obtained by manufacturing a crystal using the liquid phase preparation conditions for forming each layer as shown in Table 1, following the conventional liquid phase epitaxial growth method using a slide boat. Detailing each process,
At 80,000 ℃, Ga melt No. 3 in Table 1 was first brought into contact with the n-type a-filled S substrate 41 and slowly cooled at an accuracy of 0.3°07 minutes, and the 3 liquid was lost to this Ga melt N. Non-doped n
797 Go
A non-doped n-type GaAs layer 42 is formed using Ga melt Nα4 liquid.
The 4 liquids were removed to the Ga melt N by contacting the upper surface and slowly cooling at the above speed to form a Ge tope p Ifa AJQ, 2 Gaa,
a 43 As layers were grown, followed by aa at 798°C.
Melt No. 5 liquid was applied onto the Ge-doped p-type 143 and slowly cooled at the above speed, and Ga melt No. 5 was lost to form Ge-doped n-type Uo, a Ga QjAs@
44, then φ and Ged root N at 796°0.
a 6 liquid is brought into contact with the Ge-doped n-type 844 and slowly cooled at the above speed, Ga melt No. 6 is removed, and a Te-doped n-type GaAs layer 45 is grown to obtain the desired crystal. By attaching a suitable ohmic conductor M (human alloy) 46 to the crystal thus obtained, a heterojunction transistor shown in Fig. 4 can be formed.
トランジスタではペースの厚さが薄くなるほどp−n接
合位置の#lIJがトランジスタの性能に影響する。そ
のなめ、折角ペースの厚さを薄くしても、拡散などによ
りp−n接合位置が移動すると、それにより高周波特性
が劣化する。本発 ・明のトランジスタでは、こうした
p−n?t!今位置の移動が結晶成長中まなはその後の
熱処理中におこらないなめ、高周波特性が設計どおり達
成できる。In a transistor, as the thickness of the paste becomes thinner, #lIJ at the pn junction position affects the performance of the transistor. Therefore, even if the thickness of the paste is made thinner, if the pn junction position moves due to diffusion or the like, the high frequency characteristics will deteriorate. In the transistor of the present invention, such a p-n? T! Since the current position does not move during crystal growth or during subsequent heat treatment, high frequency characteristics can be achieved as designed.
本発明d1種類の不純II#FGCを添加することによ
って、p形およびn形のλ1GaAs結晶を形成せしめ
ているなめ、n形の入1xGa 1−xAsとp形のM
yGa 1−yAsのへテロ接金とp−n接合界面が一
致しな設計どおりのへテロp−n接合を有する化合物半
導体”tlM−S得られる。このことId、AJGaA
s/ GaAs 、 A/GaAs/A/GaAsなど
の組合わせでヘテロp−n接合を有する半導体レーザ、
発光ダイオード、受光素子およびトランジス々としても
、結晶成長申分よび成長後の鳥屋処理でもp−fl接合
位置とへテロ接合位Rが変化しないため、高効率の少敬
キャリア注入、高効率のキャリアとじ込めができ、発光
素子の場合でt’を発光効率の高#I率化、受光素子で
ゆ暗電流の低下、トランジスタでは高増巾率および高周
波化をはかることができろという効果を賽する。In the present invention, p-type and n-type λ1GaAs crystals are formed by adding 1 type of impurity II#FGC.
A compound semiconductor "tlM-S" having a heteropn junction as designed in which the heterojunction interface of yGa1-yAs and the pn junction interface is not coincident is obtained.This indicates that Id, AJGaA
A semiconductor laser having a hetero p-n junction with a combination of s/GaAs, A/GaAs/A/GaAs, etc.
In light emitting diodes, light receiving elements, and transistors, the p-fl junction position and heterojunction position R do not change even during crystal growth and post-growth Toriya treatment, resulting in highly efficient carrier injection and highly efficient carrier injection. In the case of light-emitting devices, it is possible to increase the luminous efficiency of t' to a high #I rate, in the case of light-receiving devices, it is possible to reduce the dark current, and in the case of transistors, it is possible to achieve high amplification rates and high frequencies. do.
第11I!Jは本発明における液相成長法によるGeド
ープA7xGa t−xAsの特性な示すグラフ、−1
!2図は、本発明の化合物半導体のp−n 接合の断面
とS’EM@測信号の開信号示すグラフ薯3図は本発明
の一実1例を示す断面模式図、弯■は本発明の他の実也
例を示す断面模式塙5図は従来のAJGaAsのp−n
接合を示す断面模式図である。
項中
” ・= 9 @ GaAs基板
2・・・f) aUGaAa層
3・−n形AjG仏S層
4・・・IE衡
5・・・起電力信号のピーク
6・・・ヘテロ界面
(ばか1名)
第1図
AlAs/Ieル今牢(A(xGco−xAsax+、
t)第2図
第3図
31 ・・・n % GQAS JA= M32−Ge
ドープnf4ALGaAs層33−Geドープp7fl
ALGQAs眉34・・・p−n冴今(へゾロ判1ト謬
面)35・・・1!極
第4図
41− nc、GaAs J1!:叡
42−n形GaAs 4
幻・・・p杉AlGaAs層
44−n ノf’6AIGaAs層
45・n形GQAS眉
硯・・・電極
第5図
11−n形GaAsKt&
12−Teドーアn@ALGaAs眉
13・・・Zn鈍散シニよるρ形ALGaAs層14・
・・znドーアpaAteQAS層15・・・ρ−n汗
合界面
16・・・ヘテロ往令面11th I! J is a graph showing the characteristics of Ge-doped A7xGa t-xAs produced by the liquid phase growth method in the present invention, -1
! Figure 2 is a graph showing the cross section of the p-n junction of the compound semiconductor of the present invention and the open signal of the S'EM @ measurement signal. Figure 5 is a cross-sectional schematic diagram showing another example of conventional AJGaAs p-n.
FIG. 3 is a schematic cross-sectional view showing bonding. ``・= 9 @ GaAs substrate 2... f) aUGaAa layer 3 - n-type AjG Buddha S layer 4... IE balance 5... Peak of electromotive force signal 6... Hetero interface (idiot 1 Figure 1: AlAs/Ie (A(xGco-xAsax+,
t) Figure 2 Figure 3 31...n% GQAS JA= M32-Ge
Doped nf4ALGaAs layer 33-Ge doped p7fl
ALGQAs eyebrows 34... p-n Saeima (Hezoro size 1 to error side) 35... 1! Polar Figure 4 41-nc, GaAs J1! : E42-n-type GaAs 4 Phantom...p Cedar AlGaAs layer 44-n Nof'6AIGaAs layer 45-n-type GQAS eyebrow...electrode Fig. 5 11-n-type GaAsKt & 12-Te door n@ALGaAs Eyebrow 13...ρ-shaped ALGaAs layer 14 due to Zn dull scattering
...zn door paAteQAS layer 15...ρ-n sweat joint surface 16...hetero phase surface
Claims (3)
を示すAl_xGa_1_−_xAs(0<x<1)お
よびp形伝導性を示すAl_yGa_1_−_yAs(
0<y<1)のp−n接合を少なくとも一つ含むことを
特徴とする化合物半導体装置。(1) Al_xGa_1_-_xAs (0<x<1) exhibiting n-type conductivity with germanium added as an impurity and Al_yGa_1_-_yAs( exhibiting p-type conductivity)
A compound semiconductor device comprising at least one pn junction where 0<y<1.
ルマニウムを不純物として添加した第1のAl_xGa
_1_−_xAs(0<x<1)層を形成し、該第1の
層とは異なる伝導性を示すゲルマニウムを不純物として
添加した第2のAl_yGa_1_−_yAs(0<y
<1)層を前記第1の層上に形成し、前記GaAs基板
およびAl_yGa_1_−_yAs層に電極を形成し
たことを特徴とする特許請求の範囲第1項記載の半導体
装置。(2) First Al_xGa doped with germanium, which has the same conductivity as the substrate, as an impurity on a GaAs substrate.
_1_-_xAs (0<x<1) layer is formed, and a second Al_yGa_1_-_yAs (0<y
<1) The semiconductor device according to claim 1, wherein a layer is formed on the first layer, and electrodes are formed on the GaAs substrate and the Al_yGa_1_-_yAs layer.
1のAl_xGa_1_−_xAs(0≦x<1)層を
形成し、該第1の層とは異なる伝導性を示すゲルマニウ
ムを不純物を添加した第2のAl_yGa_1_−_y
As(0<y<1)層を前記第1の層上に形成し、前記
第1の層と同じ伝導性を示すゲルマニウムを不純物とし
て添加した第3のAl_zGa_1_−_zAs(0<
z、1)層を前記第2の層上に形成し、かつ前記GaA
s基板、Al_yGa_1_−_yAs層およびAl_
zGa_1_−_zAs層に電極を形成したことを特徴
とする特許請求の範囲第1項記載の半導体装置。(3) A first Al_xGa_1_-_xAs (0≦x<1) layer having the same conductivity as the substrate is formed on the GaAs substrate, and germanium having a conductivity different from that of the first layer is doped with impurities. Added second Al_yGa_1_-_y
An As (0<y<1) layer is formed on the first layer, and a third Al_zGa_1_-_zAs(0<y<
z, 1) layer is formed on the second layer, and the GaA
s substrate, Al_yGa_1_-_yAs layer and Al_
2. The semiconductor device according to claim 1, wherein an electrode is formed on the zGa_1_-_zAs layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28156284A JPH0658976B2 (en) | 1984-12-29 | 1984-12-29 | Method for manufacturing compound semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28156284A JPH0658976B2 (en) | 1984-12-29 | 1984-12-29 | Method for manufacturing compound semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61159774A true JPS61159774A (en) | 1986-07-19 |
JPH0658976B2 JPH0658976B2 (en) | 1994-08-03 |
Family
ID=17640913
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP28156284A Expired - Lifetime JPH0658976B2 (en) | 1984-12-29 | 1984-12-29 | Method for manufacturing compound semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0658976B2 (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4925629A (en) * | 1972-06-30 | 1974-03-07 | ||
JPS4925630A (en) * | 1972-07-03 | 1974-03-07 |
-
1984
- 1984-12-29 JP JP28156284A patent/JPH0658976B2/en not_active Expired - Lifetime
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4925629A (en) * | 1972-06-30 | 1974-03-07 | ||
JPS4925630A (en) * | 1972-07-03 | 1974-03-07 |
Also Published As
Publication number | Publication date |
---|---|
JPH0658976B2 (en) | 1994-08-03 |
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