JPH055191B2 - - Google Patents

Info

Publication number
JPH055191B2
JPH055191B2 JP2294785A JP2294785A JPH055191B2 JP H055191 B2 JPH055191 B2 JP H055191B2 JP 2294785 A JP2294785 A JP 2294785A JP 2294785 A JP2294785 A JP 2294785A JP H055191 B2 JPH055191 B2 JP H055191B2
Authority
JP
Japan
Prior art keywords
cladding layer
active layer
layer
compound semiconductor
mixed crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2294785A
Other languages
Japanese (ja)
Other versions
JPS61183977A (en
Inventor
Tetsuo Sekiwa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP60022947A priority Critical patent/JPS61183977A/en
Publication of JPS61183977A publication Critical patent/JPS61183977A/en
Publication of JPH055191B2 publication Critical patent/JPH055191B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
  • Led Devices (AREA)

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は化合物半導体を用いた発光素子及びそ
の製造方法に係り、特に混晶型化合物半導体とし
てGaAlAsを用い可視光で高輝度化を実現できる
発光素子及びその製造方法に関する。
[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a light emitting device using a compound semiconductor and a method for manufacturing the same, and in particular to a light emitting device that uses GaAlAs as a mixed crystal compound semiconductor and can achieve high brightness in visible light. This invention relates to an element and its manufacturing method.

〔発明の技術的背景〕[Technical background of the invention]

フアクシミリの読取り用光源等、LEDデイス
プレイの応用分野の拡大に伴い可視LEDの需要
が年々増大しており、より高輝度化が求められて
いる。
The demand for visible LEDs is increasing year by year as the application fields of LED displays, such as light sources for facsimile reading, are expanding, and higher brightness is required.

従来、可視光で高輝度を実現できるLEDとし
て、第6図に示すような混晶型化合物半導体であ
るGaAlAsを用いたダブルヘテロ接合構造(DH
構造)のLEDがある。
Conventionally, LEDs that can achieve high brightness in visible light have a double heterojunction structure (DH) using GaAlAs, a mixed crystal compound semiconductor, as shown in Figure 6.
structure).

このLEDは、p型GaAs結晶基板11上に液相
エピタキシヤル成長法により、高AlAs混晶比の
Zn(亜鉛)添加p型GaAlAsクラツド層12、発
光波長に必要なAlAs混晶比の不純無添加の
GaAlAs活性層13、GaAlAsクラツド層12と
同等のAlAs混晶比のTe(テルル)添加n型
GaAlAsクラツド層14を順次結晶成長させる。
その後、このエピタキシヤルウエハの両面にオー
ミツク電極15,16を形成し、続いてn型
GaAlAsクラツド層14表面からp−n接合を越
えてメサエツチングを行ない、ダイシングをして
各素子を分離する。
This LED is produced using a liquid phase epitaxial growth method on a p-type GaAs crystal substrate 11 with a high AlAs mixed crystal ratio.
Zn (zinc) doped p-type GaAlAs cladding layer 12, with no impurities added to the AlAs mixed crystal ratio necessary for the emission wavelength.
Te (tellurium) doped n-type with AlAs mixed crystal ratio equivalent to GaAlAs active layer 13 and GaAlAs cladding layer 12
A GaAlAs cladding layer 14 is successively crystal-grown.
After that, ohmic electrodes 15 and 16 are formed on both sides of this epitaxial wafer, and then n-type
Mesa etching is performed from the surface of the GaAlAs cladding layer 14 beyond the p-n junction, and dicing is performed to separate each element.

〔背景技術の問題点〕[Problems with background technology]

このようにして形成されたLEDは、発光層と
なるGaAlAs活性層13が薄い(0.1μ以下)場
合、GaAlAs活性層13へ注入された電子は有効
に活性層13に閉じこめられて、シングルヘテロ
接合構造のLEDに比較して高輝度化を実現でき
る。
In the LED formed in this way, when the GaAlAs active layer 13 serving as the light emitting layer is thin (0.1μ or less), electrons injected into the GaAlAs active layer 13 are effectively confined in the active layer 13, resulting in a single heterojunction. Higher brightness can be achieved compared to structural LEDs.

しかしながら、GaAlAs活性層13の厚さが1
〜2μになると、0.3mm角ペレツトの順方向通電電
流10mAの発光効率は0.2%とシングルヘテロ接合
構造のLEDの発光効率よりも低くなり、有効に
ダブルヘテロ接合構造が生かされないという問題
があつた。
However, the thickness of the GaAlAs active layer 13 is 1
When the size is ~2μ, the luminous efficiency of a 0.3 mm square pellet at a forward current of 10 mA is 0.2%, which is lower than the luminous efficiency of an LED with a single heterojunction structure, and there is a problem that the double heterojunction structure cannot be effectively utilized. .

〔発明の目的〕[Purpose of the invention]

本発明は上記実情に鑑みてなされたもので、そ
の目的は、GaAlAs活性層が厚くなつても、成長
技術及び成長装置は従来のままで高輝度化を実現
できる発光素子及びその製造方法を提供すること
にある。
The present invention has been made in view of the above circumstances, and its purpose is to provide a light emitting device and a method for manufacturing the same, which can achieve high brightness even when the GaAlAs active layer becomes thicker, while using the conventional growth technology and growth apparatus. It's about doing.

〔発明の概要〕[Summary of the invention]

本発明は、第1導電型のGaAs結晶基板上に、
高AlAs混晶比の第1導電型GaAlAsクラツド層、
発光波長に必要なAlAs混晶比のGaAlAs活性層、
前記クラツド層と同等のAlAs混晶比の第2導電
型のGaAlAsクラツド層を順次徐冷法エピタキシ
ヤル成長により形成するダブルヘテロ接合構造の
LEDに於いて、前記GaAlAs活性層に所定濃度の
Znを添加し、かつ前記第2導電型のGaAlAsクラ
ツド層のp−n接合近傍の濃度を、前記GaAlAs
活性層のZn濃度より低くすることにより発光効
率を向上させるものである。
In the present invention, on a GaAs crystal substrate of the first conductivity type,
a first conductivity type GaAlAs cladding layer with a high AlAs mixed crystal ratio;
GaAlAs active layer with AlAs mixed crystal ratio required for emission wavelength,
A double heterojunction structure in which a GaAlAs cladding layer of the second conductivity type with the same AlAs mixed crystal ratio as the cladding layer is sequentially formed by slow cooling epitaxial growth.
In the LED, the GaAlAs active layer has a predetermined concentration.
Zn is added and the concentration near the p-n junction of the GaAlAs cladding layer of the second conductivity type is adjusted to
Luminous efficiency is improved by making the Zn concentration lower than that of the active layer.

本発明は、また上記GaAs結晶基板をエツチン
グ除去することにより、LEDの裏面側に向う発
光成分の取出しをも可能としさらに発光効率を向
上させるものである。
The present invention also makes it possible to take out the light-emitting component toward the back side of the LED by etching away the GaAs crystal substrate, thereby further improving the light-emitting efficiency.

〔発明の実施例〕[Embodiments of the invention]

以下、図面を参照して本発明の一実施例を説明
する。第2図に於いて、21は濃度が1〜4×
1019cm-3で、厚さ300μのp型のGaAs結晶基板で
あり、このGaAs結晶基板21上には高AlAs混晶
比のp型のGa0.2Al0.8Asクラツド層(以下、p型
クラツド層と略称する。)22が形成されている。
このp型クラツド層22上には、発光波長に必要
なAlAs混晶比のGa0.65Al0.35As活性層(以下、活
性層と略称する。)23が形成されている。この
活性層23には所定濃度のp型不純物としてZn
が添加されている。活性層23上には、上記p型
クラツド層22と同等のAlAs混晶比のn型の
Ga0.2Al0.8Asクラツド層(以下、n型クラツド層
と略称する。)24が形成されている。上記
GaAs結晶基板21の裏面側にはP型のオーミツ
ク電極25、n型クラツド層24の表面にはp型
のオーミツク電極26が形成されている。
Hereinafter, one embodiment of the present invention will be described with reference to the drawings. In Figure 2, 21 has a density of 1 to 4×
It is a p-type GaAs crystal substrate 21 with a size of 10 19 cm -3 and a thickness of 300 μm, and on this GaAs crystal substrate 21 is a p-type Ga 0.2 Al 0.8 As clad layer (hereinafter referred to as a p-type clad layer) with a high AlAs mixed crystal ratio. ) 22 is formed.
On this p-type cladding layer 22, a Ga 0.65 Al 0.35 As active layer (hereinafter abbreviated as active layer) 23 having an AlAs mixed crystal ratio necessary for the emission wavelength is formed. This active layer 23 is doped with Zn as a p-type impurity at a predetermined concentration.
is added. On the active layer 23, an n-type layer with an AlAs mixed crystal ratio equivalent to that of the p-type cladding layer 22 is formed.
A Ga 0.2 Al 0.8 As cladding layer (hereinafter abbreviated as n-type cladding layer) 24 is formed. the above
A p-type ohmic electrode 25 is formed on the back side of the GaAs crystal substrate 21, and a p-type ohmic electrode 26 is formed on the surface of the n-type cladding layer 24.

次に、上記構造の製造方法について説明する。
結晶の成長は、徐冷法による液相エピタキシヤル
成長により行つた。成長用ボートは第3図に示す
ようなボート27が用いられ、各溜の溶液の組成
は次のようにした。p型クラツド層用溶液溜28
にはAlAs混晶比が0.8となる量のAl、多結晶の
GaAs、Ga、アクセプタ濃度が3〜5×1017cm-3
となる量のZnを添加する。p型活性層用溶液溜
29には、発光波長660nmとなるAlAs混晶比が
0.35のAl、多結晶のGaAs、Ga、アクセプタ濃度
が所定の値となる量のZnを添加する。n型クラ
ツド層用溶液溜30には、AlAs混晶比が0.8とな
る量のAl、多結晶のGaAs、Ga、ドナー濃度が
1×1017cm-3となる量のTeを添加する。
Next, a method for manufacturing the above structure will be explained.
The crystal growth was carried out by liquid phase epitaxial growth using a slow cooling method. A growth boat 27 as shown in FIG. 3 was used, and the composition of the solution in each reservoir was as follows. Solution reservoir 28 for p-type cladding layer
contains Al in an amount that makes the AlAs mixed crystal ratio 0.8, and polycrystalline
GaAs, Ga, acceptor concentration 3-5×10 17 cm -3
Add Zn in an amount that becomes . The p-type active layer solution reservoir 29 has an AlAs mixed crystal ratio that gives an emission wavelength of 660 nm.
Add 0.35% Al, polycrystalline GaAs, Ga, and Zn in an amount that makes the acceptor concentration a predetermined value. To the solution reservoir 30 for the n-type cladding layer, Al in an amount such that the AlAs mixed crystal ratio is 0.8, polycrystalline GaAs, Ga, and Te in an amount such that the donor concentration is 1×10 17 cm -3 are added.

このような溶液組成のボート27を用いて第4
図に示すような温度プログラムで結晶成長を行な
つた。すなわち、先ず、水素H2ガス中で、室温
から850℃まで昇温させ、次にこの温度を2時間
保持した後、徐々に冷却させる。冷却速度は約
0.5℃/minとする。この間、845℃でGaAs結晶
基板21をp型クラツド層用溶液溜28まで移動
させ、GaAs結晶基板21上にp型クラツド層2
7を60秒間成長させる。その後、830℃でGaAs
結晶基板21をさらに活性層用溶液溜29まで移
動させ、活性層23を成長させる。この成長後、
GaAs結晶基板21をさらにn型クラツド層用溶
液溜30まで移動させ、n型クラツド層24を成
長させる。780℃になると、n型クラツド層24
の成長を停止させ、その後室温まで放冷させる。
Using the boat 27 with such a solution composition, the fourth
Crystal growth was performed using the temperature program shown in the figure. That is, first, the temperature is raised from room temperature to 850° C. in hydrogen H 2 gas, then this temperature is maintained for 2 hours, and then gradually cooled. The cooling rate is approx.
0.5℃/min. During this time, the GaAs crystal substrate 21 was moved to the p-type cladding layer solution reservoir 28 at 845°C, and the p-type cladding layer 2 was placed on the GaAs crystal substrate 21.
Grow 7 for 60 seconds. After that, GaAs was heated at 830℃.
The crystal substrate 21 is further moved to the active layer solution reservoir 29, and the active layer 23 is grown. After this growth,
The GaAs crystal substrate 21 is further moved to the n-type cladding layer solution reservoir 30, and the n-type cladding layer 24 is grown. At 780°C, the n-type cladding layer 24
growth is stopped and then allowed to cool to room temperature.

このようにして形成した各成長層の厚さは、p
型クラツド層22は10μ、活性層23は1〜2μ、
n型クラツド層24は40μであつた。
The thickness of each grown layer formed in this way is p
The type cladding layer 22 has a thickness of 10μ, the active layer 23 has a thickness of 1 to 2μ,
The n-type cladding layer 24 had a thickness of 40μ.

その後、このエピタキシヤルウエハの両面にオ
ーミツク電極25,26を形成した後、n型クラ
ツド層24表面からp−n接合を越えてメサエツ
チングを行ない、ダイシングにより各素子を分離
して、第2図に示した構造を得る。
Thereafter, after forming ohmic electrodes 25 and 26 on both sides of this epitaxial wafer, mesa etching is performed from the surface of the n-type cladding layer 24 beyond the p-n junction, and each element is separated by dicing, as shown in FIG. We get the structure shown.

このようにして得られたLEDは、活性層23
にZnを添加しているため、活性層23が比較的
に厚い(2μ)場合でも、ダブルヘテロ接合構造
を有効に活用することができ、従来構造の数倍の
発光特性の向上した素子を実現できた。第5図は
p型クラツド層22のアクセプタ濃度を4×1017
cm-3、n型クラツド層24のドナー濃度を1×
1017cm-3一定としたときの、活性層23のアクセ
プタ(亜鉛)の濃度と、順方向に10mAを通電し
たときの発光出力との関係を示すものである。同
図に於いて、aは従来例の場合、bは第2図の実
施例の場合を示すものである。同図から、活性層
23の濃度がn型クラツド層24の濃度より低濃
度であると、発光効率は低くなる。濃度上昇に伴
い、発光効率も向上し、5〜6×1017cm-3で最高
(従来の5倍程度)となり、それより高濃度とな
ると発光効率は低下する。従つて、活性層23の
アクセプタ濃度を1×1017〜1×1018cm-3にする
ことにより、高輝度のLEDが得られる。
The LED thus obtained has an active layer 23
Since Zn is added to the active layer 23, even if the active layer 23 is relatively thick (2μ), the double heterojunction structure can be effectively utilized, resulting in a device with improved light emitting characteristics several times that of the conventional structure. did it. Figure 5 shows the acceptor concentration of the p-type cladding layer 22 as 4×10 17
cm -3 , the donor concentration of the n-type cladding layer 24 is 1×
This figure shows the relationship between the concentration of acceptor (zinc) in the active layer 23 and the light emission output when a current of 10 mA is applied in the forward direction when 10 17 cm -3 is constant. In the figure, a shows the conventional example, and b shows the embodiment of FIG. 2. As can be seen from the figure, when the concentration of the active layer 23 is lower than the concentration of the n-type cladding layer 24, the luminous efficiency decreases. As the concentration increases, the luminous efficiency also improves, reaching a maximum at 5 to 6 x 10 17 cm -3 (approximately 5 times the conventional level), and when the concentration is higher than that, the luminous efficiency decreases. Therefore, by setting the acceptor concentration of the active layer 23 to 1×10 17 to 1×10 18 cm −3 , a high-brightness LED can be obtained.

第1図は他の実施例を示すもので、上記GaAs
結晶基板21を化学的エツチング、例えば
(NH3+H2O2)の混合液により除去し、またオ
ーミツク電極31は不連続に設け、例えば水玉模
様の形状に形成したものである。
Figure 1 shows another embodiment, in which the GaAs
The crystal substrate 21 is removed by chemical etching, for example, using a mixed solution of (NH 3 +H 2 O 2 ), and the ohmic electrodes 31 are provided discontinuously, for example, in the shape of a polka dot pattern.

このような構造であれば、クラツド層22の裏
面側からも発光を取り出すことができる。すなわ
ち、このLEDを図示しないリードフレームに取
付けた場合、活性層23からの発光は、クラツド
層22を経てオーミツク電極31の隙間32,3
2……を通り、さらにリードフレームの反射面で
反射され、その結果クラツド層24の表面から取
出された光と共に発光に寄与するものである。第
5図にcで示す曲線は上記構造のLEDの発光効
率を示すもので、第2図のLEDに比べ、さらに
発光効率が2〜3倍向上している。
With such a structure, it is possible to extract light from the back side of the cladding layer 22 as well. That is, when this LED is attached to a lead frame (not shown), light emitted from the active layer 23 passes through the clad layer 22 and enters the gaps 32, 3 between the ohmic electrodes 31.
2 . The curve indicated by c in FIG. 5 shows the luminous efficiency of the LED having the above structure, and the luminous efficiency is further improved by two to three times as compared to the LED of FIG. 2.

尚、上記実施例に於いては、GaAs結晶基板2
1としてp型のものを用いて説明したが、本発明
はこれに限定するものではなく、n型のGaAs結
晶基板を用いた構造のLEDにも適用できるもの
である。また、第1図の実施例に於いて、オーミ
ツク電極28の形状を水玉模様としたが、これに
限定するものではなく、要はクラツド層22の裏
面からの発光が通過できる形状であれば良い。
In the above embodiment, the GaAs crystal substrate 2
Although the present invention has been described using a p-type LED as No. 1, the present invention is not limited to this, and can also be applied to an LED having a structure using an n-type GaAs crystal substrate. Further, in the embodiment shown in FIG. 1, the shape of the ohmic electrode 28 is made into a polka dot pattern, but the shape is not limited to this, and any shape may be used as long as the shape allows light emitted from the back surface of the cladding layer 22 to pass through. .

〔発明の効果〕〔Effect of the invention〕

以上のように本発明によれば、GaAlAs活性層
を厚くしても高輝度化を実現でき、ダブルヘテロ
接合構造を有効に利用することができる発光素子
及びその製造方法を提供できる。
As described above, according to the present invention, it is possible to provide a light emitting device and a method for manufacturing the same, which can achieve high brightness even when the GaAlAs active layer is thickened and can effectively utilize a double heterojunction structure.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例に係るLEDの構造
を示す断面図、第2図は本発明の他の実施例に係
るLEDの構造を示す断面図、第3図は第2図の
LEDの製造装置を示す断面図、第4図は第3図
の製造装置に使用される温度プログラムを示す
図、第5図は発光効率の活性層に於ける亜鉛濃度
に対する依存性を示す図、第6図は従来のLED
の構造を示す断面図である。 21……GaAs結晶基板、22……p型
GaAlAsクラツド層、23……GaAlAs活性層、
24……n型GaAlAsクラツド層、25,26,
27……オーミツク電極。
FIG. 1 is a cross-sectional view showing the structure of an LED according to one embodiment of the present invention, FIG. 2 is a cross-sectional view showing the structure of an LED according to another embodiment of the present invention, and FIG.
4 is a diagram showing the temperature program used in the manufacturing equipment of FIG. 3; FIG. 5 is a diagram showing the dependence of luminous efficiency on the zinc concentration in the active layer; Figure 6 shows conventional LED
FIG. 21...GaAs crystal substrate, 22...p type
GaAlAs cladding layer, 23...GaAlAs active layer,
24...n-type GaAlAs cladding layer, 25, 26,
27...ohmic electrode.

Claims (1)

【特許請求の範囲】 1 第1導電型の混晶型化合物半導体により形成
された第1のクラツド層と、この第1のクラツド
層上に設けられ、発光波長に必要な混晶比の混晶
型化合物半導体に、亜鉛が濃度1×1017〜1×
1018cm-3に添加されて形成され、1〜2μmの厚さ
を有する活性層と、前記第1のクラツド層と同等
の混晶比の第2導電型の混晶型化合物半導体によ
り形成され、かつ前記活性層となす接合部近傍の
濃度が前記活性層の亜鉛濃度より低く、前記活性
層上に設けられた第2のクラツド層と、前記第1
のクラツド層の裏面に設けられた第1の電極と、
前記第2のクラツド層の表面に設けられた第2の
電極とを具備したことを特徴とする発光素子。 2 前記第1の電極は前記第1のクラツド層の裏
面に於いて不連続的に形成されている特許請求の
範囲第1項記載の発光素子。 3 第1導電型の化合物半導体結晶基板と、第1
導電型の混晶型化合物半導体により形成され、前
記化合物半導体結晶基板上に設けられた第1のク
ラツド層と、この第1のクラツド層上に設けら
れ、発光波長に必要な混晶比の混晶型化合物半導
体に、亜鉛が濃度1×1017〜1×1018cm-3に添加
されて形成され、1〜2μmの厚さを有する活性層
と、前記第1のクラツド層と同等の混晶比の第2
導電型の混晶型化合物半導体により形成され、か
つ前記活性層となす接合部近傍の濃度が前記活性
層の亜鉛濃度より低く、前記活性層上に設けられ
た第2のクラツド層と、前記化合物半導体結晶基
板の裏面に設けられた第1の電極と、前記第2の
クラツド層の表面に設けられた第2の電極とを具
備したことを特徴とする発光素子。 4 ダブルヘテロ接合構造の発光素子を製造する
方法に於いて、第1導電型の化合物半導体結晶基
板上に第1導電型の混晶型化合物半導体をエピタ
キシヤル成長させ第1のクラツド層を形成する工
程と、この第1のクラツド層上に発光波長に必要
な混晶比で亜鉛を濃度1×1017〜1×1018cm-3
添加した混晶型化合物半導体をエピタキシヤル成
長させ、1〜2μmの厚さを有する活性層を形成す
る工程と、この活性層上に前記第1のクラツド層
と同等の混晶比の第2導電型の混晶型化合物半導
体をエピタキシヤル成長させ、前記活性層となす
接合部近傍の濃度が前記活性層の亜鉛濃度より低
い第2のクラツド層を形成する工程とを具備し、
前記第1のクラツド層、活性層及び第2のクラツ
ド層のエピタキシヤル成長は徐冷法により行なう
ことを特徴とする発光素子の製造方法。
[Scope of Claims] 1. A first cladding layer formed of a mixed crystal compound semiconductor of a first conductivity type, and a mixed crystal layer provided on the first cladding layer and having a mixing crystal ratio necessary for the emission wavelength. zinc at a concentration of 1×10 17 to 1×
10 18 cm -3 and is formed by an active layer having a thickness of 1 to 2 μm, and a mixed crystal compound semiconductor of a second conductivity type having a mixed crystal ratio equivalent to that of the first clad layer. , and the concentration of zinc near the junction with the active layer is lower than the zinc concentration of the active layer, and the second cladding layer provided on the active layer and the first
a first electrode provided on the back surface of the cladding layer;
and a second electrode provided on the surface of the second cladding layer. 2. The light emitting device according to claim 1, wherein the first electrode is formed discontinuously on the back surface of the first cladding layer. 3 a first conductivity type compound semiconductor crystal substrate;
A first clad layer formed of a conductive mixed crystal compound semiconductor and provided on the compound semiconductor crystal substrate; An active layer is formed by adding zinc to a crystalline compound semiconductor at a concentration of 1×10 17 to 1×10 18 cm -3 and has a thickness of 1 to 2 μm, and a mixture equivalent to the first cladding layer. The second crystal ratio
a second cladding layer formed of a conductive mixed crystal compound semiconductor and having a zinc concentration near the junction with the active layer that is lower than the zinc concentration of the active layer, and a second cladding layer provided on the active layer; A light emitting device comprising: a first electrode provided on the back surface of a semiconductor crystal substrate; and a second electrode provided on the surface of the second cladding layer. 4. In a method for manufacturing a light emitting device with a double heterojunction structure, a first conductivity type mixed crystal compound semiconductor is epitaxially grown on a first conductivity type compound semiconductor crystal substrate to form a first cladding layer. A mixed crystal compound semiconductor doped with zinc at a concentration of 1×10 17 to 1×10 18 cm -3 at a mixed crystal ratio necessary for the emission wavelength is epitaxially grown on this first cladding layer. A step of forming an active layer having a thickness of ~2 μm, epitaxially growing a mixed crystal compound semiconductor of a second conductivity type with a mixed crystal ratio equivalent to that of the first cladding layer on this active layer, and forming a second cladding layer having a lower zinc concentration near the junction with the active layer than the active layer;
A method for manufacturing a light emitting device, characterized in that epitaxial growth of the first cladding layer, the active layer, and the second cladding layer is performed by a slow cooling method.
JP60022947A 1985-02-08 1985-02-08 Light emitting element and manufacture thereof Granted JPS61183977A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60022947A JPS61183977A (en) 1985-02-08 1985-02-08 Light emitting element and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60022947A JPS61183977A (en) 1985-02-08 1985-02-08 Light emitting element and manufacture thereof

Publications (2)

Publication Number Publication Date
JPS61183977A JPS61183977A (en) 1986-08-16
JPH055191B2 true JPH055191B2 (en) 1993-01-21

Family

ID=12096813

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60022947A Granted JPS61183977A (en) 1985-02-08 1985-02-08 Light emitting element and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS61183977A (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62211970A (en) * 1986-03-13 1987-09-17 Sanyo Electric Co Ltd Light emitting diode
JPS63278383A (en) * 1987-05-11 1988-11-16 Toshiba Corp Light emitting diode
JP2681352B2 (en) * 1987-07-31 1997-11-26 信越半導体 株式会社 Light emitting semiconductor device
JP2763008B2 (en) * 1988-11-28 1998-06-11 三菱化学株式会社 Double hetero epitaxial wafer and light emitting diode
JP2783580B2 (en) * 1989-03-08 1998-08-06 株式会社東芝 Double hetero-type infrared light emitting device
JP2818312B2 (en) * 1990-04-18 1998-10-30 株式会社東芝 Light emitting element
JP2560964B2 (en) * 1993-03-05 1996-12-04 日亜化学工業株式会社 Gallium nitride compound semiconductor light emitting device
DE4305296C3 (en) * 1993-02-20 1999-07-15 Vishay Semiconductor Gmbh Method of manufacturing a radiation emitting diode
DE19536438A1 (en) * 1995-09-29 1997-04-03 Siemens Ag Semiconductor device and manufacturing process

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50157084A (en) * 1974-05-28 1975-12-18
JPS5563887A (en) * 1978-11-06 1980-05-14 Nec Corp Light-emitting diode
JPS56111275A (en) * 1980-02-07 1981-09-02 Semiconductor Res Found Luminous semiconductor device
JPS56111276A (en) * 1980-02-07 1981-09-02 Semiconductor Res Found Luminous semiconductor device
JPS5958878A (en) * 1982-09-28 1984-04-04 Matsushita Electric Ind Co Ltd Semiconductor light emitting device
JPS59225580A (en) * 1983-06-06 1984-12-18 Hitachi Ltd Semiconductor light emitting diode and manufacture thereof
JPS604277A (en) * 1983-06-22 1985-01-10 Nec Corp Light emitting diode

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50157084A (en) * 1974-05-28 1975-12-18
JPS5563887A (en) * 1978-11-06 1980-05-14 Nec Corp Light-emitting diode
JPS56111275A (en) * 1980-02-07 1981-09-02 Semiconductor Res Found Luminous semiconductor device
JPS56111276A (en) * 1980-02-07 1981-09-02 Semiconductor Res Found Luminous semiconductor device
JPS5958878A (en) * 1982-09-28 1984-04-04 Matsushita Electric Ind Co Ltd Semiconductor light emitting device
JPS59225580A (en) * 1983-06-06 1984-12-18 Hitachi Ltd Semiconductor light emitting diode and manufacture thereof
JPS604277A (en) * 1983-06-22 1985-01-10 Nec Corp Light emitting diode

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