JPS61134020A - Formation of pattern - Google Patents

Formation of pattern

Info

Publication number
JPS61134020A
JPS61134020A JP25665484A JP25665484A JPS61134020A JP S61134020 A JPS61134020 A JP S61134020A JP 25665484 A JP25665484 A JP 25665484A JP 25665484 A JP25665484 A JP 25665484A JP S61134020 A JPS61134020 A JP S61134020A
Authority
JP
Japan
Prior art keywords
substrate
electron beam
deposited
wcl6
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP25665484A
Other languages
Japanese (ja)
Other versions
JPH0680629B2 (en
Inventor
Shinji Matsui
真二 松井
Katsumi Mori
克己 森
Susumu Asata
麻多 進
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP59256654A priority Critical patent/JPH0680629B2/en
Publication of JPS61134020A publication Critical patent/JPS61134020A/en
Publication of JPH0680629B2 publication Critical patent/JPH0680629B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electron Beam Exposure (AREA)

Abstract

PURPOSE:To improve resolution and to prevent yield from lowering by a method wherein gas contained a member to deposit as a constitutional element is flown on a substrate to be deposited and electron beam is subjected to project to desired part of the substrate, then the said member is deposited on the substrate and patterning is performed thereon, after that, oxygen dry-etching is performed to a macromolecule film with the use of the pattern as a mask. CONSTITUTION:A tungsten hescachlorid WCl6 is housed in an atmosphere gas member housing chamber 201, a substrate 205 to be deposited by W is set on a sample stand 204. A projection system 210 of electron beam and a sample chamber 208 are evacuated at high vacuum more than about 10<-5> Torr. WCl6, which is solid, is sublimated easily by evacuation and flows into a sample sub- chamber 206 through a pipe 203, then the inside thereof is filled by WCl6 to be atmosphere gas. WCl6, which is adhered on the surface of the substrate 205, is resolved, by means that electron beam 212 is projected to the desired part of the substrate 205 through a pinhole 207, thus W is deposited to the desired part on the surface of the substrate 205.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は電子ビームを用いたパターン形成方法に関する
ものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a pattern forming method using an electron beam.

〔従来の技術〕[Conventional technology]

超LSIレベルの高密度集積回路の製造に伴い、パター
ンの微細化が要求され、1prn以下の寸法を十分制御
してパターン形成することが必要となりてきておシ、こ
のためリング、7フイ一手段として、光学的方法から電
子ビームの直接描画方法へと移行してきている。第3図
(a)〜(C)に従来技術である電子ビームリソグラフ
ィー技術を示す。第3図(a)において、基板32上に
、電子ビームに感応する、例えばPMMA (ポリメチ
ルメタクリレート)や、P GMA (ポリグリ7キル
メタクリレート)等の電子ビームレジスト31をスピン
塗布し、プリベイクする0次に第3図(b)として、集
束した電子ビームをレジスト31上に照射する。レジス
ト31内部には、その照射部に蓄積エネルギーの潜像が
形成される。
With the manufacture of high-density integrated circuits at the VLSI level, finer patterns are required, and it has become necessary to form patterns with sufficient control over dimensions of 1 prn or less. As a result, there has been a shift from optical methods to direct writing methods using electron beams. FIGS. 3(a) to 3(C) show a conventional electron beam lithography technique. In FIG. 3(a), an electron beam resist 31 sensitive to electron beams, such as PMMA (polymethyl methacrylate) or PGMA (poly glycol 7-kill methacrylate), is spin-coated on a substrate 32 and prebaked. Next, as shown in FIG. 3(b), the resist 31 is irradiated with a focused electron beam. Inside the resist 31, a latent image of accumulated energy is formed at the irradiated portion.

最後に第3図(C)として、現像プロセスを経て、潜儂
部が除去される。
Finally, as shown in FIG. 3(C), the latent portion is removed through a development process.

〔発明が屏決しようとする問題点〕[Problems that the invention attempts to resolve]

ところで、これらの電子ビーム用レジストを用いて実際
に集積回路等で使われるパターンを形成する場合に、近
接効果と現像時にウェットプロセスが必要であることが
大きな問題となっていた。
By the way, when using these electron beam resists to form patterns actually used in integrated circuits, etc., the proximity effect and the necessity of a wet process during development have become major problems.

すなわち、電子ビームが照射されると、主に基板32の
表面に発生した2次電子によりレジスト中で散乱された
領域のレジスト感度が変化するという近接効果と呼ばれ
る現象が生じ、この効果がパターンの微細化と共に顕著
となシ、制御性や解像度に支障をきたしていた。又、現
像がウェットプロセスであるため、歩留υの点でドライ
プロセス化が望まれている。以上述べた様に従来の電子
ビームリソグラフィー技術では、近接効果によ)パター
ン精度に問題があり、又、ウェットプロセスによる歩留
シの低下の問題があった。
That is, when an electron beam is irradiated, a phenomenon called the proximity effect occurs in which the resist sensitivity changes in the area where the secondary electrons generated on the surface of the substrate 32 are scattered in the resist, and this effect causes a change in the pattern. As miniaturization progresses, this becomes more noticeable, causing problems in controllability and resolution. Furthermore, since development is a wet process, a dry process is desired from the viewpoint of yield υ. As described above, the conventional electron beam lithography technique has problems with pattern accuracy (due to the proximity effect) and a decrease in yield due to the wet process.

本発明は、電子ビームデボジシラン効果を微細加工技術
に適用し、電子ビームによる直接微細加工を行うパター
ン形成方法を提供するものである。
The present invention applies the electron beam debodisilane effect to microfabrication technology to provide a pattern forming method that directly performs microfabrication using an electron beam.

〔問題点を確決するための手段〕[Means for determining the issue]

本発明は、被加工材を表面(備えた基板上に有機高分子
膜を形成し、少なくとも堆積させるべき材料を構成元素
として含んだガスを被堆積基板上に流し、基板の所望の
部分に電子ビームを照射して前記材料を基板上に堆積し
てバターニングし、次いでこのパターンをマスクとして
前記高分子膜を酸素ドライエツチングすることを特徴と
するパターン形成方法である。
In the present invention, an organic polymer film is formed on a substrate with a workpiece material on the surface (surface), a gas containing at least the material to be deposited as a constituent element is flowed onto the substrate to be deposited, and a desired part of the substrate is exposed to electrons. This pattern forming method is characterized in that the material is deposited on a substrate by irradiation with a beam and patterned, and then the polymer film is dry-etched with oxygen using this pattern as a mask.

〔実施例〕〔Example〕

以下、本発明について、実施例を示す図面を参照して説
明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to drawings showing embodiments.

第1図(a)〜(C)は一実施例を工程屓に示す図であ
る。第1図において、基板13上にAZレジストやポリ
イミドの様な有機高分子膜12を0.5〜2μmの厚さ
に塗布し、250℃、60分程度にベイクする0次に第
1図伽)のように大塩化タングステン(WCl6)ガス
を有機膜12上に流し、且つ有機膜12上の所望の部分
に電子ビームを照射し、タングステン(W)のパターン
11を形成する。次に、第1図(c)において、バター
ニングされたタングステンパターンをマスクとして酸素
リアクティブスパッターエツチングによ)有機膜12を
エツチングする。
FIGS. 1(a) to 1(C) are diagrams showing one embodiment at the step of the process. In FIG. 1, an organic polymer film 12 such as AZ resist or polyimide is coated on a substrate 13 to a thickness of 0.5 to 2 μm and baked at 250° C. for about 60 minutes. ), a large tungsten chloride (WCl6) gas is caused to flow over the organic film 12, and a desired portion of the organic film 12 is irradiated with an electron beam to form a tungsten (W) pattern 11. Next, in FIG. 1(c), the organic film 12 is etched by oxygen reactive sputter etching using the patterned tungsten pattern as a mask.

第2図は第1図(b)の工程に用いる電子ビームデポジ
ション装置の構成図である。本装置は電子ビーム照射系
210と、試料室208と、副試料室206と雰囲気ガ
ス材料収納室201とから構成されている。本実施例に
おいてはタングステンWを構成元素として含む大塩化タ
ングステンWeb、を雰囲気ガスとして用い、集束され
た電子ビーム照射により基板上にWをデポジションさせ
た。WCl6202を雰囲気ガス材料収納室201に入
れ、Wをデポジションさせる基板205を試料台204
にセットする。
FIG. 2 is a block diagram of an electron beam deposition apparatus used in the step of FIG. 1(b). This apparatus is composed of an electron beam irradiation system 210, a sample chamber 208, a sub-sample chamber 206, and an atmospheric gas material storage chamber 201. In this example, a large tungsten chloride web containing tungsten W as a constituent element was used as an atmospheric gas, and W was deposited on the substrate by focused electron beam irradiation. WCl6202 is placed in the atmosphere gas material storage chamber 201, and the substrate 205 on which W is to be deposited is placed on the sample stage 204.
Set to .

電子ビーム照射系210と試料室208を10−’To
rr程度以上の高真空に排気する。副試料室206に設
けたピンホール207は副試料皇206内部と外部との
差圧を保つためと、電子ビーム212をデポジションさ
せる基板205上に照射するための通路である。
The electron beam irradiation system 210 and the sample chamber 208 are
Evacuate to a high vacuum of about rr or higher. A pinhole 207 provided in the sub-sample chamber 206 is a passage for maintaining a pressure difference between the inside and outside of the sub-sample chamber 206 and for irradiating the electron beam 212 onto the substrate 205 on which it is deposited.

副試料室206と雰囲気ガス材料収納室201とは配管
203によって接続されておシ、試料室208を真空排
気することによシ、ピンホール207を通して、副試料
室208の内部および雰囲気ガス材料収納室201内部
が真空排気される。雰囲気ガス材料であるWCI 6は
大気中では固体であるが真空にひくことによシ、容易に
昇華し、配管203を通し、副試料塞206内に流入し
てその内部が雰囲気ガスであるWCl、で充満される。
The sub-sample chamber 206 and the atmosphere gas material storage chamber 201 are connected by a pipe 203, and by evacuating the sample chamber 208, the inside of the sub-sample chamber 208 and the atmosphere gas material storage chamber are connected through the pinhole 207. The inside of the chamber 201 is evacuated. Although WCI 6, which is an atmospheric gas material, is solid in the atmosphere, it easily sublimates by applying a vacuum, flows into the sub-sample block 206 through the pipe 203, and the inside becomes WCl, which is an atmospheric gas. , is filled with.

圧力は5mTorr程度である。この様にして、基板2
05の雰囲気がWCI 、となシ、電子ビーム212を
ピンホール207を通して基板205の所望の部分に照
射することにより基板205表面上に吸着されたWC1
,を分解する。その分解の結果WC1,はWと塩素分子
CI2とに分かれる。Wは基板205上に析出する。一
方CI2は揮発性ガスであるので排出される。この様に
してWが基板205表面の所望の部分にデポクシ1ンさ
れる。
The pressure is about 5 mTorr. In this way, the board 2
When the atmosphere of 05 is WCI, the electron beam 212 is irradiated onto a desired part of the substrate 205 through the pinhole 207, and the WC1 is adsorbed onto the surface of the substrate 205.
, is decomposed. As a result of the decomposition, WC1 is separated into W and chlorine molecule CI2. W is deposited on the substrate 205. On the other hand, CI2 is a volatile gas and is therefore exhausted. In this way, W is deposited onto a desired portion of the surface of the substrate 205.

以上実施例では、タングステンのデポジションソースと
してWCl、を用いたが、WCl5、WF、、W(CO
)。
In the above embodiments, WCl was used as a tungsten deposition source, but WCl5, WF, , W(CO
).

を用いても良い。又、デポジション材としては酸素ドラ
イエツチング耐性があるクロム(Cr)等の他の金属や
シリコン(Sl)等を用いても良い。Crのデボジシy
 7ソースとしてはCr (Co Hs ) 2やCr
 (Co)6等がある。又、Slのデポジションソース
としては5ICI4.5IH2CI2やS [4等がち
る。
You may also use Further, other metals such as chromium (Cr), silicon (Sl), etc., which are resistant to oxygen dry etching, may be used as the deposition material. Deposit of Cr
7 Sources include Cr (Co Hs) 2 and Cr
(Co)6 etc. In addition, 5ICI4.5IH2CI2 and S[4 are available as deposition sources for Sl.

〔発明の効果〕〔Effect of the invention〕

以上のように本発明によれば、従来の電子ビームリソグ
ラフィーの問題点であった近接効果がな低下の問題を解
消できる効果を有するものである。
As described above, according to the present invention, it is possible to solve the problem of a decrease in the proximity effect, which was a problem in conventional electron beam lithography.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)〜(C)は、本発明の電子ビームデボジシ
iノによシ形成されたパターンをマスクにして、有機膜
を酸素リアクティブスパッタによりエツチングする工程
のプロセスを示す断面図、第2図は電子ビームデボジン
1ン装置の構成図、第3図は従来の電子ビームリソグラ
フィープロセスを示す断面図である。 11・・・・・・パターン、 n・・・・・・有機高分
子膜、13・・・・・・基板、212・・・・・・電子
ビーム第1図 (cL) (b) (C)
1(a) to 1(C) are cross-sectional views showing the process of etching an organic film by oxygen reactive sputtering using a pattern formed by electron beam deposition according to the present invention as a mask. FIG. 2 is a block diagram of an electron beam debossing apparatus, and FIG. 3 is a sectional view showing a conventional electron beam lithography process. 11...Pattern, n...Organic polymer film, 13...Substrate, 212...Electron beam Fig. 1 (cL) (b) (C )

Claims (1)

【特許請求の範囲】[Claims] (1)被加工材を表面に備えた基板上に有機高分子膜を
形成し、少なくとも堆積させるべき材料を構成元素とし
て含んだガスを被堆積基板上に流し、基板の所望の部分
に電子ビームを照射して前記材料を基板上に堆積してパ
ターニングし、次いでこのパターンをマスクとして前記
高分子膜を酸素ドライエッチングすることを特徴とする
パターン形成方法。
(1) An organic polymer film is formed on a substrate with a material to be processed on its surface, a gas containing at least the material to be deposited as a constituent element is flowed onto the substrate to be deposited, and an electron beam is directed onto a desired portion of the substrate. A method for forming a pattern, comprising depositing and patterning the material on a substrate by irradiating the material, and then performing oxygen dry etching on the polymer film using this pattern as a mask.
JP59256654A 1984-12-05 1984-12-05 Pattern formation method Expired - Lifetime JPH0680629B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59256654A JPH0680629B2 (en) 1984-12-05 1984-12-05 Pattern formation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59256654A JPH0680629B2 (en) 1984-12-05 1984-12-05 Pattern formation method

Publications (2)

Publication Number Publication Date
JPS61134020A true JPS61134020A (en) 1986-06-21
JPH0680629B2 JPH0680629B2 (en) 1994-10-12

Family

ID=17295612

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59256654A Expired - Lifetime JPH0680629B2 (en) 1984-12-05 1984-12-05 Pattern formation method

Country Status (1)

Country Link
JP (1) JPH0680629B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01140729A (en) * 1987-11-27 1989-06-01 Sony Corp Formation of fine pattern

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5745234A (en) * 1980-08-29 1982-03-15 Mitsubishi Electric Corp Method for formation of microscopic pattern
JPS57202740A (en) * 1981-06-05 1982-12-11 Mitsubishi Electric Corp Manufacture of semiconductor device
JPS5892216A (en) * 1981-11-27 1983-06-01 Mitsubishi Electric Corp Manufacture of semiconductor device
JPS59132132A (en) * 1983-01-17 1984-07-30 Mitsubishi Electric Corp Forming method of fine pattern

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5745234A (en) * 1980-08-29 1982-03-15 Mitsubishi Electric Corp Method for formation of microscopic pattern
JPS57202740A (en) * 1981-06-05 1982-12-11 Mitsubishi Electric Corp Manufacture of semiconductor device
JPS5892216A (en) * 1981-11-27 1983-06-01 Mitsubishi Electric Corp Manufacture of semiconductor device
JPS59132132A (en) * 1983-01-17 1984-07-30 Mitsubishi Electric Corp Forming method of fine pattern

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01140729A (en) * 1987-11-27 1989-06-01 Sony Corp Formation of fine pattern

Also Published As

Publication number Publication date
JPH0680629B2 (en) 1994-10-12

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