JPS6095944A - Plug-in package and manufacture thereof - Google Patents

Plug-in package and manufacture thereof

Info

Publication number
JPS6095944A
JPS6095944A JP20426283A JP20426283A JPS6095944A JP S6095944 A JPS6095944 A JP S6095944A JP 20426283 A JP20426283 A JP 20426283A JP 20426283 A JP20426283 A JP 20426283A JP S6095944 A JPS6095944 A JP S6095944A
Authority
JP
Japan
Prior art keywords
plug
substrate
package
board
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20426283A
Other languages
Japanese (ja)
Other versions
JPH0582060B2 (en
Inventor
Katsumi Mabuchi
勝美 馬淵
Osamu Fujikawa
治 藤川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP20426283A priority Critical patent/JPS6095944A/en
Publication of JPS6095944A publication Critical patent/JPS6095944A/en
Publication of JPH0582060B2 publication Critical patent/JPH0582060B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/486—Via connections through the substrate with or without pins
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/306—Lead-in-hole components, e.g. affixing or retention before soldering, spacing means
    • H05K3/308—Adaptations of leads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3447—Lead-in-hole components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3494—Heating methods for reflowing of solder

Abstract

PURPOSE:To obtain a plug-in package having high reliability by mounting a printed wiring circuit with through-holes to a substrate using an organic group resin and aligning and arranging pins for connection to the outside conducting to the circuit. CONSTITUTION:Holes are bored to a glass epoxy both-surface copper lined laminated board in approximately 0.54mm. thickness, the through-holes are plated with Cu12, and a circuit pattern is completed through a normal method. Copper foils and metallic plating films 13 are left selectively on the back at that time. Solder paste 14 is printed to lands in the peripheries of the through-holes of the surface. Solder is composed of 5% Sn and 95% Pb. Pins 4 with collars 16 made of FeNi alloy are inserted into the through-holes, the laminated board is pushed by a block heater 17 to melt solder, and the pins 4 are connected to the lands. A semiconductor element is fitted to a pad 15, a frame is bonded and a resin is injected, the resin is covered with a cover having the same quality of material as the substrate, and the resin is heated and cured. According to the constitution, a plug-in package, which is lightened and thinned and has excellent shock resistance, dampproofness and heat dissipation properties, is obtained.

Description

【発明の詳細な説明】 本発明は、有機系樹脂素材のプリント配線用基板を用い
て外部接続用の入出力ピンを配設した半導体素子搭載用
プラグインパッケージ（以下ピングリットアレーともい
う）とそのｊ％ｉ１７造方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a plug-in package for mounting semiconductor elements (hereinafter also referred to as a pin grid array) in which input/output pins for external connection are arranged using a printed wiring board made of an organic resin material. Regarding the j%i17 production method.

従来、基板裏面に外部接続用の入出力ピンを配設した半
導体素子搭載用プラグインパッケージとしては第１図の
斜視図に示すようなセラミックス製基板のものがあり、
アルミナ基板等の各種ナラミックス焼結体から成るノ、
（板（イ）の表面に、半導体素子塔載部分（ハ）を中心
として略放射線状にプリント配線回路の導体部分（ロ）
が形成され、該回路と導通して外部接続用の入出力ピン
に）が基板の裏面に格子の交点上に整列して配設さノ１
．たものである。Conventionally, as a plug-in package for mounting a semiconductor element with input/output pins for external connection arranged on the back side of the board, there is a ceramic board as shown in the perspective view of Figure 1.
Consisting of various Naramix sintered bodies such as alumina substrates,
(On the surface of the board (a), conductor parts (b) of the printed wiring circuit are arranged approximately radially around the semiconductor element mounting part (c).
are formed, conductive with the circuit and become input/output pins for external connection) are arranged on the back side of the board aligned on the intersections of the grid.
．． It is something that

しかしながら、セラミックス製基板は一般に比重が大き
く全体の重量が重くなると共に耐轡撃ｒ１：が小さいた
め一定の板厚（２〜５間位）のものが用いられており、
近年のｔｔｒ子部品の軽ｊ・グ短小に１４に密度化傾向
に追従してゆくには不利であり、しかも半導体素子を塔
載した部分を保護するためにセラミックス製又は金属製
の蓋釡フリット接合又はハンダ接合して気密封圧する頻
雑さを伴い、さらにはプリント配線回路の導体部分を形
成するに当っては材料が制約されたり、外部接続用の入
出力ピンを装着するに当っては約８００°Ｃという比較
的高温の金属のロウ付けを行わなければならないなどの
＠穀さがあり、またナラミックス製基板は高価である欠
点があった。However, ceramic substrates generally have a large specific gravity, which increases the overall weight, and low dent resistance r1:, so ceramic substrates are used with a fixed thickness (approximately 2 to 5 mm).
It is disadvantageous to follow the trend of increasing density of TTR components in recent years, and in addition, ceramic or metal lid frits are required to protect the part on which semiconductor elements are mounted. This involves the frequency of bonding or soldering and hermetic sealing, and there are also restrictions on materials when forming the conductor part of a printed wiring circuit, and when installing input/output pins for external connections. There were drawbacks such as the need to braze metal at a relatively high temperature of about 800°C, and the Naramix substrate was expensive.

そこで本発明は、上記従来のセラミックス製のブラッグ
インパッケージ用の基板を有機系樹脂素材のプリント配
線用基板に転換し、セラミックス製基板の欠点である比
重が大角〈て板厚を一定の厚さ以下に軽薄化することが
困難であった問題点′ｆｒ：解消すると共に、一方有機
系樹脂素材のプリント配線用基板の欠点である耐水性及
び放熱性が劣る点を向上すべき１１０意工夫を雷ね半導
体素子搭載用に適したブラッグインパッケージ用の基板
を提供し５、半導体素子からの熱の放散性に優れ吸湿性
の製造方法を提案することを目的として完成されたもの
である。Therefore, the present invention converts the conventional ceramic plug-in package substrate into a printed wiring board made of an organic resin material. Below are 110 ideas to solve the problems that were difficult to make lighter and thinner, and to improve the poor water resistance and heat dissipation, which are the drawbacks of printed wiring boards made of organic resin materials. It was completed with the aim of providing a plug-in package substrate suitable for mounting semiconductor elements5, and proposing a manufacturing method that has excellent heat dissipation properties from semiconductor elements and is hygroscopic.

以下、本発明のプラグインパッケージとその製造方法に
ついて図面及び実施例に基づいて具体的に説明する。EMBODIMENT OF THE INVENTION Hereinafter, the plug-in package of the present invention and its manufacturing method will be specifically explained based on drawings and examples.

第２図は、本発明によるプラグインパッケージ′の斜視
図であり、この図面において、（１１１ｄ”Ｔｌわ′！
系樹脂素材のプリント配線用基板である。／ｉ：５も代
表的なものけ、ガラス繊糾強化エポキシ樹Ｉ′ｌｌ′ｉ
基板（以下ガラエボ基板と略称すｈ）、紙フェノールｔ
ｉ’ｉ、Ｉ脂基板、紙エポキシ樹脂基板などの他にポリ
イミド樹脂基板又は変性トリアジン樹脂基板などである
。そしてこれらの基板の両面には予め銅箔等の導ＸＥ皮
膜が積層貼着されており、プリント配線回路の等体部分
又は基板ｍ面においては前記銅箔等の導Ｔｉ皮膜を残存
させて半導体素子Ｗ蓄ＰＩた熱を／ｉｋ散するｙｌｌが
形成される、このように木５「；明によれば、０−１〜
２．０絹の板ｊ？ＯＴＴ機系樹膨シ：；Ｈのプリント配
線用基板をＪｌｌいるため、ｔ）６来のナラミー、ｈ　
７．ＩＩＷＪ、ＣＷｌｆｆ　Ｈ−、ＩＩ＊　ｌ　イ市Ｌ
）−ｔ’ｉｆσ１すＡ（１／　ウ〜ｌ　／＋　ｎ位に軽
薄化することができ、近年の電子部品の高密度化傾向に
最適の安価なプラグインパッケージを提供することがで
きる。また、有機系樹脂素材の基板は、セ”ｙ；ックス
焼結体に比較して一般に弾性や可撓性に富み、ヒートシ
ョックや物理的衝撃に対しては耐久性も優れている。FIG. 2 is a perspective view of the plug-in package' according to the invention, in which (111d"Tlwa'!")
This is a printed wiring board made of resin material. /i:5 is also a typical monoke, glass fiber reinforced epoxy tree I'll'i
Substrate (hereinafter abbreviated as Gala Evo substrate), paper phenol t
In addition to i'i, I resin substrates, paper epoxy resin substrates, polyimide resin substrates, modified triazine resin substrates, and the like. A conductive XE film such as copper foil is laminated and pasted on both sides of these boards in advance, and the conductive Ti film such as copper foil is left on the equal part of the printed wiring circuit or on the m side of the board to form a semiconductor. A yll is formed that dissipates the heat accumulated in the element W, and in this way, the tree 5 "; According to Ming, 0-1~
2.0 silk board j? OTT machine tree expansion: ;H's printed wiring board is required, so t) 6th Naramie, h
7. IIWJ, CWlff H-, II* l I City L
)-t'ifσ1A(1/U~l/+n) It is possible to provide an inexpensive plug-in package that is optimal for the recent trend toward higher density electronic components. A substrate made of an organic resin material is generally more elastic and flexible than a sintered body of resin, and has excellent durability against heat shock and physical impact.

そｔｌゆえ、従来のブラッグインパッケージ用の基板は
、その取扱中に亀裂や破損を生じたり、基板の軽薄化に
制約があったものが本発明によれば著しく改善できる効
果がある。次に、（２）は配線回路の導体部分である。Therefore, the present invention can significantly improve the conventional plug-in package substrates, which tend to crack or break during handling and have limitations in making the substrate lighter and thinner. Next, (2) is the conductor portion of the wiring circuit.

この導体部分は前記プリント配線用基板の両面に積層貼
着さ第１．た銅箔層が銅メッキ工程を経てエツチング処
理後に残存した部分であ−て、必要に応じて各種の金属
、例えばニッケルメッキや金メッキによる金属皮膜が形
成される。そして、パターン配線回路が半導体素子塔載
部分を中心として放射線状に形成されている場合には、
基板の外周面にスルホール又は外部接続用の入出力ピン
を挿入するための孔並びにランド部分が形成される。（
３）け半導体素子塔載用ダイパッドである。、（４１は
外部接続用の入出力ビンであり。This conductor portion is laminated and adhered to both sides of the printed wiring board. The copper foil layer is the portion that remains after the copper plating process and etching process, and a metal film of various metals, such as nickel plating or gold plating, is formed as necessary. If the pattern wiring circuit is formed radially around the semiconductor element mounting area,
A through hole or a hole for inserting an input/output pin for external connection and a land portion are formed on the outer peripheral surface of the substrate. (
3) It is a die pad for mounting a semiconductor element. , (41 is an input/output bin for external connection.

該基板の外周などに、仮想上の格子の交点に整列して配
設さｉ上る。この入出力ピンは、基板表面上に形成さｉ
またパターン配線回路の末端部に設けられたスルホール
又はビン立て専用の孔に挿入さｙｔ、該ビンの頭部が基
板の表面又はランド部分、すなわちスｌレホールの周辺
又はビン立て専用の孔の周辺に設けられた導体部分と導
通ずる金屈皮１１％’ｉ部分にハンダ又はハンダペース
トを介して接合される。They are arranged on the outer periphery of the substrate, aligned with the intersections of the imaginary grid. This input/output pin is formed on the board surface.
In addition, if the head of the bottle is inserted into the through hole provided at the end of the pattern wiring circuit or the hole dedicated to the bottle stand, the head of the bottle is located on the surface of the board or the land area, that is, around the through hole or around the hole dedicated to the bottle stand. It is bonded via solder or solder paste to the 11%'i portion of the metal cover that is electrically conductive with the conductor portion provided on the.

ハンダによりピンをランド部分に接合する場合には、主
として基板裏面に設けられたランドにビンの頭部を接合
することが連続作業１適しており、・一方ハンダペース
トによりビンケランド部分に接合する場合は、主として
基板表面［設けら１したランド部分周辺に予めハンダペ
ーストを印刷などの方法により塗布し加熱溶融して接合
することが有利である。When joining the pin to the land part with solder, it is suitable for continuous work 1 to join the head of the bottle to the land provided on the back side of the board.On the other hand, when joining the pin to the land part with solder paste, It is advantageous to apply solder paste in advance mainly around the land portions provided on the surface of the substrate by a method such as printing, and to heat and melt the solder paste for bonding.

３、ｔ、−、ピンをハンダ又はハンダベースＩ・で接合
するに当っては、第７図のｌｌｌｉ面に示すように、ビ
ンと基板の孔との間に一定の空隙部が形Ｊｔ’ａさｉす
るよう含ピンを挿入しておくことにより、溶融）１ンダ
が基板の孔の中に多く侵入しピンを強固に回路と接合で
き有利である。3, t, -, When bonding pins with solder or solder base I, a certain gap is formed between the bottle and the hole in the board in the shape Jt', as shown in the llli plane of FIG. By inserting the pin-containing pin in such a manner that a large amount of the molten solder is inserted into the hole in the substrate, it is advantageous that the pin can be firmly connected to the circuit.

次に、第３図は本発明のプラグインパッケージの裏面側
の平面であり、（４）は前記の通り外部接続用の入出力
ピンであって、基板周辺に仮想上の格子の交点に整列し
て配設される。（５）は該基板の裏面のＮｇ電回路部、
例えば導通用のランド部分以外の他の部分に残存する核
基板に予め積層貼着された銅箔Ｉｉ′ＰＪ及び、金属メ
ッキ盾である。このように基板裏面に銅箔）「１及び金
属メッキ層を残存させてかく理由は、基板表面のほぼ中
央部に実装された半導体素子に蓄熱された熱を放散して
耐久性金白上して高信頼性を駿持すると共に、基板裏面
より外気の湿度が浸透することを防止するためである。Next, FIG. 3 is a plan view of the back side of the plug-in package of the present invention, and as mentioned above, (4) is the input/output pin for external connection, which is aligned at the intersection of a virtual grid around the board. It will be arranged as follows. (5) is the Ng electric circuit section on the back side of the substrate;
Examples include a copper foil Ii'PJ and a metal plated shield, which are laminated and adhered in advance to the core substrate remaining in areas other than the land areas for conduction. The reason for leaving the copper foil (1) and metal plating layer on the back of the board is to dissipate the heat accumulated in the semiconductor element mounted almost in the center of the board surface, thereby creating a durable gold plated layer. This is to maintain high reliability and to prevent moisture from outside air from penetrating from the back side of the board.

それゆえ、可能な限り前記銅箔部分及び、金属メッキ層
は広い面積であることが好ましいので、ランド部分や入
出力ピンを接合した部分以外の他の部分に前記銅箔層及
び金属メッキ層を残存させておくことが有利である。Therefore, it is preferable that the copper foil layer and the metal plating layer have as wide an area as possible, so the copper foil layer and the metal plating layer should be placed in areas other than the land areas and the areas where the input/output pins are connected. It is advantageous to leave it as is.

第４図は５本発明のプラグインパッケージの半導体素子
塔載の一例を示す側面図である。この図面において、（
１）は前記の通り有機系樹脂素材のプリント配線用基板
であり、（４）は外部接続用の入出力ピンであり、（５
）け裏面側に残存した銅箔層及び金だ１メツキＩＦ（で
ある。そして、（６）は半導体素子であり、基板のほぼ
中央部に設けられたダイパッドにボンディング用ワイヤ
ー（８）を介して基板表面上のプリントＡ３線回路の導
体部分の一部にｍ気的接続さｉする。なお、入出力ピン
は一般に金屈製九形棒状が用いられるが、折曲ビン、ス
トレートビン、ネールヘッドビンなどの各種形状のもの
が用いらむる。（７）は封止用樹脂層であり、メｎ常熱
硬化性エポキシ樹脂などが用いられる。、（８１はワイ
ヤーボンディング用の接続線であり、通常金やアルミニ
ウムなどの金属の細線が用いらｔする。FIG. 4 is a side view showing an example of a plug-in package according to the present invention in which a semiconductor element is mounted. In this drawing, (
As mentioned above, 1) is a printed wiring board made of organic resin material, (4) is an input/output pin for external connection, and (5) is a printed wiring board made of organic resin material.
) and the gold plated IF remaining on the back side of the board. (6) is a semiconductor element, which is connected to the die pad provided approximately in the center of the board via a bonding wire (8). Connect electrically to a part of the conductor part of the printed A3-wire circuit on the surface of the board.Input/output pins are generally made of Kinkure's nine-shaped rods, but bendable pins, straight pins, nail pins, etc. Various shapes such as head bins are used. (7) is a sealing resin layer, and normal heat curing epoxy resin is used. (81 is a connection wire for wire bonding. Usually, thin wires of metal such as gold or aluminum are used.

第５図は、本発明のプラグインパッケージの半導体素子
塔載の他の例を示す斜視図である。また第６図は本発明
のプラグインパッケージの断面図である。これらの図面
ＶＣオいて、（１）、　（２＋、（４１及び（６）は前
記の通り、（１）は有機系樹脂素材のプリント配線用基
板、（２）は導体部分、（４）は外部接続用の入出力ピ
ン、（６）は半導体素子、（７）は封止用樹脂層である
。そして、（９）は金属又は金属表面複合板料又はセラ
ミックス材から成る蓋であり、通常熱伝導性が良好で硬
度の比較的大きい金属又は金属表面複合板たとえばプリ
ント配線用基板のように表面に銅箔を有するプラスチッ
ク板のような平板又は扁平楕円弧状の金属の蓋であって
、半導体素子により発生する熱を放散し易くすると共に
、表面側より外気の湿気が侵透するのを防止する効果が
あり、さらにけ外部の簡械的丙撃から塔載した半導体素
子を保護する役割も果す。また、（１０）は封止用樹脂
の流出防止用の壊砕であり材質は、プラスチック、金属
など、特に限定けしない。このようにして、本発明のプ
ラグインパッケージは、半導体素子が樹脂封止を介して
好ましくは金Ｆ４製蓋を設けておくことにより封止効果
を高め、吸湿防止と熱放散性を向上させ、従来のプラス
チックパッケージに比べ著しく信頼性を向上させるもの
である、 第７図は、本発明のプラグインパッケージ用の基板に入
出力ビンを接合する状態の一例を示す断面図である。こ
のようにすれに、プリント配線用基板（１）の導体部分
に設けられたスルホール又はピン立て専用孔にピンを挿
入し、ピンと孔の側壁との間のいずれかの部分に溶融ハ
ンダが侵入して伸因にピンを接合せることができる利点
がある、なお、本発明において使用するハンダ又はハン
ダペーストは高融点ハンダを使用することが望ましい。FIG. 5 is a perspective view showing another example of a plug-in package according to the present invention in which a semiconductor element is mounted. FIG. 6 is a sectional view of the plug-in package of the present invention. In these drawings VC, (1), (2+, (41 and (6)) are as described above, (1) is a printed wiring board made of organic resin material, (2) is a conductor part, and (4) is Input/output pins for external connection, (6) is a semiconductor element, (7) is a sealing resin layer, and (9) is a lid made of metal or metal surface composite plate material or ceramic material, and usually A metal or metal surface composite plate with good thermal conductivity and relatively high hardness, such as a flat plate such as a plastic plate with a copper foil on the surface such as a printed wiring board, or a metal lid in the shape of a flat elliptical arc, and is suitable for semiconductors. In addition to making it easier to dissipate the heat generated by the device, it also has the effect of preventing moisture from outside air from penetrating from the surface side, and also has the role of protecting the mounted semiconductor device from external mechanical attacks. In addition, (10) is crushing to prevent the sealing resin from flowing out, and the material is not particularly limited, such as plastic or metal.In this way, the plug-in package of the present invention can crush the semiconductor element. By providing a lid, preferably made of gold F4, through resin sealing, the sealing effect is enhanced, moisture absorption prevention and heat dissipation are improved, and reliability is significantly improved compared to conventional plastic packages. Fig. 7 is a sectional view showing an example of a state in which input/output bins are connected to a board for a plug-in package of the present invention. The present invention has the advantage that the pin can be inserted into a through hole or a dedicated pin stand hole, and the molten solder can enter any part between the pin and the side wall of the hole to join the pin to the elongated pin. It is desirable to use high melting point solder as the solder or solder paste used.

その理由は、本発明のプラグインパ・フケージをマザー
ボードにハンダフローで電気的接続をする除に加熱によ
りピンを接合したハンダが溶融しないためである。The reason for this is that, although the plug-in package of the present invention is electrically connected to the motherboard by solder flow, the solder that joins the pins does not melt due to heating.

以下、本発明のプラグインパッケージのｊｌ’ｌ　漬方
法の実施例について説１１すする。An example of the jl'l dipping method for a plug-in package of the present invention will be described below.

実施例 厚さくＬ５４ｆｆｆｆのガラスエポキシ両面銅張り積層
板にドリリングマシーンで穴明けを行い、常法にて銅ス
ルホールメッキを施した後該ノル板の表面に（感光性樹
脂被膜を貼着し半導体素子塔載用のダイパッドを含むネ
ガティブパターンを形成し、異金属のハンダメッキを回
路パターンに施した。その後溶剤により感光性樹脂被膜
を取り除きハンダをエツチングレジストとして、アンモ
ニア系アルカリエッチャントを用いてエツチングするこ
とにより所望の回路パターンを形成した。この時裏面側
の銅箔層及びメッキ層は導電回路に電気的影響を与えな
い程度に全面に銅箔を残存させた。次にポンディングパ
ッド並びにスルホ−Ｖ周囲のランド以外の基板の表面を
シルクスクリーン印刷でソルダーレジストを施した。そ
の後露出した金属部分にニッケルメッキ、さらに金メッ
キを施し金型を用いて所定の大きさに切断した。さらに
第９図に示すような鉄ニツケル合金からなる段付き（１
６）の丸ビンを基板のスルホールに挿入した。このピン
径はスルホール径より（１−１ｓｙ＊程小さく、スルホ
ールとピンとの間には空隙部が形成されるようＫした。Example A hole was drilled in a glass epoxy double-sided copper-clad laminate with a thickness of L54ffff using a drilling machine, and copper through-hole plating was applied using a conventional method. A negative pattern including a die pad for mounting was formed, and solder plating with a different metal was applied to the circuit pattern.Then, the photosensitive resin coating was removed using a solvent, and the solder was used as an etching resist for etching using an ammonia-based alkaline etchant. A desired circuit pattern was formed using the following methods.At this time, the copper foil layer and plating layer on the back side were left with copper foil on the entire surface to the extent that it did not have an electrical effect on the conductive circuit.Next, the bonding pad and sulfo-V A solder resist was applied to the surface of the board other than the surrounding lands by silk screen printing.Then, the exposed metal parts were plated with nickel and then gold, and cut into a specified size using a mold.Furthermore, as shown in Figure 9. Stepped (1) made of iron-nickel alloy as shown
6) The round bottle was inserted into the through hole of the board. This pin diameter was smaller than the through hole diameter by (1-1 sy*), and was set so that a gap was formed between the through hole and the pin.

その後第８図に示すように出き上がった基板の上表面の
スルホール周辺のランドにシルクスクリーン印刷を用い
ハンダペーストを印刷した。第８図において（１１）は
ソルダーレジスト、（１２）はスルホールメッキ、（１
３）　Ｆ１９３面側の残存銅箔及び金属メッキ層、（１
４）はハンダペーストであり（１５）はダイパッドであ
る。使用したハンダペースト中の／’１１ンダは、スズ
５％、鉛９５％の組成であり７％ンダの融点け３００°
Ｃ以上の高融点ハンダである。次に第１Ｏ図に示すよう
に３５０°Ｃに加熱さノ１．たブロック状のヒータ一部
を基板上面に押し当てノ１ンダペーストを溶融させた後
ブロックヒータを基板から取りけずした。第１０図にお
いて（１７）はブロック状のヒータ一部である。この溶
融ハンダは、先に述べたスルホールとピンの空隙部を埋
めさらに裏面のランドとピンの段の空隙部も埋め、冷却
することにより、ランドスルホールとピンは完全に一体
化し、基板へのピンの保持力は、著Ｌ＜大きくなる。こ
の後ハンダペースト中のフラックス；λ１ｒの不純物を
除去するためにｔ−ｔ−，１トリクロルエタン中で超音
波洗浄を行った。以上の１稈でプリント配線用基板をハ
：いたプラグインパッケージ月１の基板を作成した。゛
この基板の上表面に封止樹脂流出防止用の３匹枠を接着
層を介して付鹸した。使用した壊砕は、ガラスエポキシ
積層板を金型にて打ち抜いたものであり接着ｎはエポキ
シ樹脂を用いた。次にＬＳＩをダイパッドに接着材を介
してダイボンディングし２５７ｚｍの金線を用いてワイ
ヤーボンディングした。さらにＬＳＩを保護するために
８１０２の粉末を含んだエポキシ樹脂を前記壊砕内に流
し込みＬＳＩ及びボンディングワイヤーを封止した。こ
のエポキシ樹脂が硬化する前にエポキシ樹脂全体を被覆
するように板蓋を塔載した。この板蓋はガラスエポキシ
片面ｅ＠張り積層板を金型で打ち抜いたものであり、銅
箔部分を上表面としガラスエポキシ面は封止樹脂の表面
と接合させるようにした。Thereafter, as shown in FIG. 8, solder paste was printed on the lands around the through holes on the upper surface of the substrate using silk screen printing. In Figure 8, (11) is solder resist, (12) is through hole plating, (1
3) Remaining copper foil and metal plating layer on F193 side, (1
4) is a solder paste, and (15) is a die pad. The /'11 solder in the solder paste used has a composition of 5% tin and 95% lead, and the melting point of 7% solder is 300°.
It is a high melting point solder of C or higher. Next, heat to 350°C as shown in Figure 1. After pressing a part of the block-shaped heater onto the top surface of the substrate and melting the nolder paste, the block heater could not be removed from the substrate. In FIG. 10, (17) is a part of a block-shaped heater. This molten solder fills the gaps between the through holes and pins mentioned earlier, and also fills the gaps between the lands and pins on the back side.By cooling, the lands through holes and pins are completely integrated, and the pins are attached to the board. The holding force of L becomes significantly larger. Thereafter, ultrasonic cleaning was performed in tt-,1 trichloroethane to remove impurities of flux λ1r in the solder paste. I made a board for the first plug-in package in which a printed wiring board was made using one of the above methods.゛A three-dog frame was attached to the upper surface of this substrate via an adhesive layer to prevent the sealing resin from flowing out. The crusher used was a glass epoxy laminate plate punched out using a mold, and the adhesive n used was an epoxy resin. Next, the LSI was die-bonded to the die pad via an adhesive and wire-bonded using a 257 zm gold wire. Furthermore, in order to protect the LSI, an epoxy resin containing 8102 powder was poured into the crushed space to seal the LSI and bonding wire. Before this epoxy resin was cured, a plate lid was placed on the tower to cover the entire epoxy resin. This plate lid was made by punching out a glass epoxy single-sided e@ layered laminate using a die, with the copper foil portion serving as the upper surface and the glass epoxy surface joining to the surface of the sealing resin.

ガラスエポキシ片面銅張り積層板を用いた理由は、ガラ
スエポキシ層は封止用エポキシ樹脂と非常に接着性が良
好であり、又表面の銅箔層けＬＳＩから発する熱を効率
よく放散し、かつ外部の水が封止樹脂内部へ浸入するの
を防止する効果が督しいか　４゜らである。次にこの基
板を１５０℃のオープン中で５時間加熱し、封止樹脂を
硬化させた。以上の工程を経て有機系樹脂網材プリント
配線用基板からなるプラグインパッケージを作り重量を
測定した結果、セうミックパッケージに比べ半分以下の
重量と非常に軽く又耐衝撃性も著しく向上していた。The reason for using a glass epoxy single-sided copper-clad laminate is that the glass epoxy layer has very good adhesion to the epoxy resin for sealing, and it also efficiently dissipates the heat generated from the copper foil layered LSI on the surface. The effect of preventing external water from penetrating into the sealing resin is 4° or more. Next, this substrate was heated in an open environment at 150° C. for 5 hours to harden the sealing resin. Through the above process, a plug-in package made of an organic resin network printed wiring board was made and its weight was measured. It was found to be very light, less than half the weight of the semi-mic package, and has significantly improved impact resistance. Ta.

又当発明のプラグインパッケージを高温高湿の蒸気界囲
気中に放置し耐渾性をめた結果通常のプラスチックパッ
ケージに比べ５０％以上の＃４浬性能が向上していた。In addition, the plug-in package of the present invention was left in a high-temperature, high-humidity steam atmosphere to improve its stagnation resistance, and as a result, the #4 pumping performance was improved by more than 50% compared to an ordinary plastic package.

次にＬＳＩから発する熱の放散状態を測定した結果、通
常のプラスチックパッケージに比べ２倍以上の熱放散効
果が得られた。Next, we measured the state of heat dissipation generated from the LSI and found that the heat dissipation effect was more than twice that of a normal plastic package.

以上本発明の有機系樹脂素材プリント配線用基板からな
るプラグインパッケージはナラミックパッケージの欠点
である耐Ｆ７撃性を著しく改善し、又軽量化が再能であ
り、プラスチックパッケージの欠点である耐浬性、熱メ
ｉＳｊ散性が著しく改善さｆｌ、高信頼性を確保できる
プラグインパッヶー’５　ｆ　％”価に提供することが
できる。As described above, the plug-in package made of the organic resin printed wiring board of the present invention significantly improves the F7 impact resistance, which is a drawback of Naramic packages, and can also be made lighter, and has resistance, which is a drawback of plastic packages. It is possible to provide a plug-in packer with a value of 5 f%, which can significantly improve the air flow properties and thermal dissipation properties, and ensure high reliability.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来のセラミックス鼎プラグインパッケージの
斜視図、第２図は本発明の有機系樹脂９１１７プラグイ
ンパツケージ用基板の斜視図、第３図は本発明のプラグ
インパッケージの裏面側平面図、第４図は本発明のプラ
グインパッケージの側面断面図、第５図は本発明のプラ
グインパッケージの斜視図、第６図は本発明のプラグイ
ンパッケージの側面断面図、第７図は本発明のプラグイ
ンパッケージ用基板のビン部分の拡大断面図、第８図は
本発明のプラグインパッケージの中間製品の断面図、第
９図はビンの一例の１す１ｌｌｉｉ図、第１０図はプラ
グインパッケージの半田付は状ｆ！９を示す断面図であ
る。 特許出願人 イビデン抹式会ネ１ 第１図 第４図 第５図 第６図 第７図Fig. 1 is a perspective view of a conventional ceramic plug-in package, Fig. 2 is a perspective view of an organic resin 9117 plug-in package substrate of the present invention, and Fig. 3 is a back side plan view of the plug-in package of the present invention. , FIG. 4 is a side sectional view of the plug-in package of the present invention, FIG. 5 is a perspective view of the plug-in package of the present invention, FIG. 6 is a side sectional view of the plug-in package of the present invention, and FIG. 7 is a side sectional view of the plug-in package of the present invention. FIG. 8 is a sectional view of an intermediate product of the plug-in package of the invention, FIG. 9 is a diagram of an example of the bottle, and FIG. 10 is a plug In-package soldering is like f! 9 is a sectional view showing FIG. Patent Applicant IBIDEN Mashikikai Ne1 Figure 1 Figure 4 Figure 5 Figure 6 Figure 7

Claims (1)

【特許請求の範囲】 １、有機系樹脂素材のプリント配線用基板の表面にスル
ホールを有するプリント配線回路が形成され、該基板上
には樹脂封止を介して半導体素子が実装され、該基板上
に前記回路と導通する外部接続用の入出力ビンが整列し
て配設されて成るプラグインパッケージ。 ２、該基板の表面に形成されたプリント配線回路が該基
板の略中央部を中心にして放射線状に配設されているこ
とを特徴とする特許請求の範囲第１項記載のプラグイン
パッケージ。 ３、該基板の半導体搭載部には、ダイパッドが形成され
ていることを特徴とする特許請求の範囲第１項〜第２項
記載のプラグインパッケージ。 ４、該基板に実装された半導体素子が樹脂封止か春■イ
仝ＭＶＨ仝関害面市会幻ＶＭセラｉウクスから成る蓋で
被覆されていることを特徴とする特許請求の範囲第１項
〜第３項記載のプラグインパッケージ。 ５、前記基板上表面に封止用溶融ｔｉｎ！？の流出防止
用の壊砕が付設されていることを特徴とする特許請求の
範囲第１項〜第４項記載のプラグインパッケージ、 ６、該基板の裏面の導電回路部以外の他の部分には該基
板に予め積層貼着された銅箔層及び金ハメッキ層が残存
していることを特徴とする特許請求の範囲第１項〜第５
項記戦のプラグインパッケージ。 ７、外部接続用の入出力ビンが該基板の表面又は裏面に
形成されたランド１日）分及び又はスルポールにハンダ
又はハンダペーストで溶融接合されていることを特徴と
する特許請求の範囲第１Ｊ７１〜第６項記載のプラグイ
ンパッケージ。 ８、有機系樹脂素材のプリント配線用基板に穴を明ける
工程と、該基板上にメッキによる金炉１皮膜の導体部分
及びダイパッドを形成する工程と、スルホールに外部接
続用の入出力ピンを挿入する工程と、前記スルホールラ
ンド部分周辺にハンダペーストを塗布する工程と、前記
ハンダペーストを加熱溶融して入出力ピンを接合する工
程と、樹脂封止を介して該基板に半導体素子を実装する
工程と、該基板表面に付着した不純物を除去する工程と
から成るプラグインパッケージの製造方法。 ９−　スルホールを有するプリント配線回路を該基板の
ｌ！を中央部を中心にして略放射線状に形成する工程と
、前記スルホールに外部接続用の入出力ピンを空隙部が
形成されるように挿入する工程と、前記スルホールのラ
ンド部分周辺にハンダペーストを塗布する工程と、前記
ハンダペーストを１８０″Ｃ〜６００°Ｃで加熱溶融［
７て入出力ピンを接合する工程と、樹肥封止を介して該
基板に半導体素子を金属ｆ！ｌＩ蓋で被覆し７実装する
工程と、該基板表面に付着した不純物を洗註除去又は気
体吹付は除去することを特徴とする特許請求の範囲第８
項記載のプラグインパッケージの製造方法。[Claims] 1. A printed wiring circuit having through holes is formed on the surface of a printed wiring board made of an organic resin material, a semiconductor element is mounted on the board via resin sealing, and a semiconductor element is mounted on the board via resin sealing. A plug-in package in which input/output bins for external connections that are electrically connected to the circuit are arranged in a row. 2. The plug-in package according to claim 1, wherein the printed wiring circuits formed on the surface of the substrate are arranged radially around a substantially central portion of the substrate. 3. The plug-in package according to claims 1 to 2, wherein a die pad is formed on the semiconductor mounting portion of the substrate. 4. Claim 1, characterized in that the semiconductor element mounted on the substrate is covered with a lid made of resin encapsulation or MVH-free VM ceramics. ~Plug-in package described in Section 3. 5. Melt tin for sealing on the upper surface of the substrate! ? 6. A plug-in package according to claims 1 to 4, characterized in that a crusher is attached to prevent leakage of the plug-in package. Claims 1 to 5 are characterized in that the copper foil layer and the gold plating layer that have been laminated and pasted on the substrate in advance remain.
Plug-in package for the battle. 7. Claim 1 J71 characterized in that the input/output bin for external connection is melted and bonded to the land and/or the solder pole formed on the front or back surface of the board using solder or solder paste. ~Plug-in package described in Section 6. 8. A process of drilling a hole in a printed wiring board made of organic resin material, a process of forming the conductor part of the metal furnace 1 film and a die pad by plating on the board, and inserting input/output pins for external connection into the through hole. a step of applying solder paste around the through hole land portion, a step of heating and melting the solder paste to join the input/output pins, and a step of mounting the semiconductor element on the substrate via resin sealing. and a step of removing impurities attached to the surface of the substrate. 9- Place a printed wiring circuit with through-holes on the board! a step of forming a substantially radial shape around the center, a step of inserting an input/output pin for external connection into the through hole so as to form a gap, and a step of applying solder paste around the land portion of the through hole. The step of applying the solder paste and heating and melting the solder paste at 180″C to 600°C [
Step 7 of joining the input/output pins, and attaching the semiconductor element to the substrate through fertilization sealing. Claim 8, characterized in that the step of covering with an II lid and mounting 7, and removing impurities attached to the surface of the substrate by cleaning or blowing gas.
The method of manufacturing the plug-in package described in Section 1.
JP20426283A 1983-10-31 1983-10-31 Plug-in package and manufacture thereof Granted JPS6095944A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20426283A JPS6095944A (en) 1983-10-31 1983-10-31 Plug-in package and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20426283A JPS6095944A (en) 1983-10-31 1983-10-31 Plug-in package and manufacture thereof

Publications (2)

Publication Number Publication Date
JPS6095944A true JPS6095944A (en) 1985-05-29
JPH0582060B2 JPH0582060B2 (en) 1993-11-17

Family

ID=16487546

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20426283A Granted JPS6095944A (en) 1983-10-31 1983-10-31 Plug-in package and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS6095944A (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62257754A (en) * 1986-04-30 1987-11-10 Ibiden Co Ltd Substrate for loading semiconductor
JPS62257755A (en) * 1986-04-30 1987-11-10 Ibiden Co Ltd Substrate for loading semiconductor
JPS62283651A (en) * 1986-05-31 1987-12-09 Ibiden Co Ltd Conductor pin for substrate mounted with semiconductor and manufacture thereof

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JPS62257754A (en) * 1986-04-30 1987-11-10 Ibiden Co Ltd Substrate for loading semiconductor
JPS62257755A (en) * 1986-04-30 1987-11-10 Ibiden Co Ltd Substrate for loading semiconductor
JPS62283651A (en) * 1986-05-31 1987-12-09 Ibiden Co Ltd Conductor pin for substrate mounted with semiconductor and manufacture thereof

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