JPS6093959A - Spectrum display apparatus - Google Patents

Spectrum display apparatus

Info

Publication number
JPS6093959A
JPS6093959A JP20217383A JP20217383A JPS6093959A JP S6093959 A JPS6093959 A JP S6093959A JP 20217383 A JP20217383 A JP 20217383A JP 20217383 A JP20217383 A JP 20217383A JP S6093959 A JPS6093959 A JP S6093959A
Authority
JP
Japan
Prior art keywords
digital data
frequency
data
signal
predetermined
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20217383A
Other languages
Japanese (ja)
Inventor
Yoshiaki Tanaka
美昭 田中
Mamoru Inamasa
稲真 衛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Nippon Victor KK
Original Assignee
Victor Company of Japan Ltd
Nippon Victor KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd, Nippon Victor KK filed Critical Victor Company of Japan Ltd
Priority to JP20217383A priority Critical patent/JPS6093959A/en
Publication of JPS6093959A publication Critical patent/JPS6093959A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To reduce time delay from the arrival of a signal to display and to make a level easy of view, by taking in a predetermined number of data in a plurality of data, of which the low zone side frequency is predetermined, directly before performing frequency analysis. CONSTITUTION:The outouts of band zone filters 2a, 2b, to which an audio signal is inputted, are selected in a time series manner by a multiplexer 3 and supplied to an AD converter 6 and a low zone side frequency signal (500Hz-1.5kHz) is subjected to AD conversion at first at sampling frequency of 3.2kHz while a high zone side frequency signal (2-20kHz) is succeedingly subjected to AD conversion at sampling frequency of 40kHz and the converted signals are stored in RAM8. Herein, when AD converting operation to the low zone side frequency is performed 64 times, data to residual 64 times are converted to data each having the same value as that at the non-input time. Subsequently, FFT operation, power spectrum operation and sound height judgment are performed in an analycical part 10 and stored in RAM at every frequency as well as displayed by CRT15.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はスペクトル表示装置に係り、入力オーディオ信
号のレベルを異なった各周波数帯域毎に表示面上の所定
位置に表示ザるスペクトル表示装置に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a spectrum display device, and more particularly to a spectrum display device that displays the level of an input audio signal at a predetermined position on a display screen for each different frequency band.

従来技術 本出願人は先に、入力A−デイオ信号をデジタル信号に
変換し、これを周波数分析して7名−高を判定し、各周
波数毎にレベルをCRTに実時間で表示する装置を提案
した。このものは、デジタル信号に変換されたオーディ
オ信号データをFFT演算し、しかる後ソの結果をパワ
ースペクトルに演算しCスペクトル表を1qC高高判定
し、この判定結果をビデオ・ディスプレイ・ブ[ルツザ
(VCP)を介してビデオ・ラム(V −RA M )
に転送し、予め設定されている異なった周波数(例えば
、50Hz 、 751−1z 、 1 001−lz
 、 ・・・ 、 12 kH2。
Prior Art The present applicant has previously developed a device that converts an input A-dio signal into a digital signal, analyzes the frequency of this signal, determines whether the signal is high or not, and displays the level of each frequency on a CRT in real time. Proposed. This device performs an FFT operation on the audio signal data converted to a digital signal, then calculates the result to a power spectrum, judges the 1qC height of the C spectrum table, and displays this judgment result on a video display software. Video RAM (V-RAM) via (VCP)
and different preset frequencies (e.g. 50Hz, 751-1z, 1001-lz
, ..., 12 kH2.

16 kl−1z 、 20 kl−17)毎にCRT
表示面ニハーグラフ状に表示する。
CRT every 16 kl-1z, 20 kl-17)
The display screen is displayed in the form of a Niha graph.

この場合、高域側周波数(501−1z〜 1.5に1
」Z)に関しては第1図(Δ)に示づ如く比較的高いリ
ーンブリング周波数(/l Okl−lz )でAD変
換を行ない、サンプリング点が例えば64点に至つた時
点でFFT演算を行なう(リンブリング時間1.6m5
= < 1//10) x6/l )一方、低域側周波
数(2kl−(z〜201佳lz)に関しては同図(B
)に示す如く比較的低いリンブリング周波数(3,2k
H2)でAD変換を行ない、リーンブリング点が例えば
128点に至った時点でF F T演C>を行なう(サ
ンプリング時間40ms = (1/ 3,2)x 1
28)。
In this case, the high frequency side (501-1z ~ 1.5
Regarding "Z), AD conversion is performed at a relatively high leanbring frequency (/l Okl-lz) as shown in FIG. 1 (Δ), and FFT calculation is performed when the sampling point reaches, for example, 64 points ( Ringing time 1.6m5
= < 1//10) x6/l) On the other hand, regarding the lower frequency (2kl-(z~201klz)
), the relatively low rimbling frequency (3,2k
Perform AD conversion in H2), and when the leanbring point reaches, for example, 128 points, perform FFT operation C> (sampling time 40ms = (1/3,2) x 1
28).

特に低域側周波数におりるFFT演算のために取込むデ
ータ数について考えてみるに、例えば25H2の如き低
周波数帯域のレベルを表示づる必要のある場合、「F−
「演算におりる周波数分析の精度を高くするために必要
とする1ノベルデータ数は上記のように128個程度で
ある3、このため、上記装置の低域側周波数におりるF
 F T演Calのために取込むレベルデータ数は12
8個必要どじ、レベルデータ取込時間は40m5要して
いた。
Especially considering the number of data to be taken in for FFT calculation in the low frequency range, for example, if it is necessary to display the level of the low frequency band such as 25H2, "F-
``The number of novel data required to increase the accuracy of frequency analysis in calculation is about 128 as mentioned above.
The number of level data to be imported for F T performance Cal is 12
Eight pieces were required, and the level data acquisition time was 40m5.

発明が解決しようどする問題点 ところが、上記25 l−l zの周波数の1ノベルを
表示する必要がない場合、FFT演算のためのレベルデ
ータは128個も必要ない。然るに、上記裂開では25
H7の周波数のレベルを表示する必要がない時でも12
8個のレベルデータを用い、レベルデータ取込時間を4
0m5必要としているため、特に低域側周波数ではAD
変換の開始からレベル表示迄に60m5程度(データ取
込みに40m5.F+=−r演算及び表示に20m5>
の長時間を必要として、これにJ:す、オーディオ伏目
の発生から表示迄に多少の時間遅れを生じ、レベル監視
者にとって見にくい問題点があった。
Problems to be Solved by the Invention However, if it is not necessary to display one novel of the frequency of 25l-lz, 128 level data for FFT calculation are not required. However, in the above dehiscence, 25
12 even when there is no need to display the level of the H7 frequency.
Using 8 level data, level data acquisition time is 4
0m5 is required, so AD is required especially at low frequencies.
Approximately 60m5 from the start of conversion to level display (40m5 for data acquisition, 20m5 for F+=-r calculation and display>
In addition, there was a problem in that there was a slight time delay between the occurrence of the audio throw-off and the display, making it difficult for the level monitor to see.

問題点を解決するための手段 本発明は、低域側周波数の子め定められた複数個のデジ
タルデータ中所定数のデジタルデータを取込んだ直後こ
れを周波数分析づる手段と、低域側周波数の子め定めら
れた複数個のデジタルデータ中上記所定数のデジタルデ
ータ以外のデジタルデータを実質的に無人力時のデジタ
ルデータに変換する手段どを設【プた構成として上記問
題点を解決したものであり、以下、図面と共にその一実
施例について説明づ−る。
Means for Solving the Problems The present invention provides a means for frequency-analyzing a predetermined number of digital data from among a plurality of predetermined digital data of lower frequencies, and The above-mentioned problems have been solved by a configuration that includes a means for converting digital data other than the predetermined number of digital data out of the plurality of digital data set as children into digital data for an unmanned operation. One embodiment of the invention will be described below with reference to the drawings.

一5= 実施例 第2図は本発明に2Zるオーディ7I信月の1ノベル表
示装置の一実施例のブロック系統図を示づ一6同図にお
いて、端子1に入来した入カオーディA信号は50 H
2〜1,5 kl−1zの帯域フィルタ2a。
15 = Embodiment FIG. 2 shows a block system diagram of an embodiment of the 2Z audio 7I Shinzuki 1 novel display device according to the present invention. is 50H
2-1,5 kl-1z bandpass filter 2a.

2kt−1z〜20kH2の帯域フィルタ2 bにて夫
々不要周波数成分を除去された後マルヂブレクリ。
Unnecessary frequency components are removed by a bandpass filter 2b of 2kt-1z to 20kHz, and then the multi-band filter is removed.

3に供給される。制御装置4において初11+1 nQ
定が行なわれ(第3図中ステップ30)、ここで、無信
号入力の時と同じ値のデータ(帯域フィルタ2a、2b
を構成するアンプ等のオフセラ1〜電圧を考慮に入れた
データ)がRΔM8に格納される。
3. First 11+1 nQ in control device 4
is determined (step 30 in FIG. 3), and here the data (bandwidth filters 2a, 2b) of the same value as when no signal is input is
Offcella 1 such as an amplifier constituting the circuit (data taking into consideration voltage) is stored in RΔM8.

帯域フィルタ2a、2bから取出された信号は切換信号
発生部5からの切換信号に基いて時系列的に選択されて
取出されてAD変換器6に供給され、変換指令及びデジ
タル伏目出力部7からの指令により、先ず低域側周波数
信号(50l−1z〜1.5 kHz )について第1
図(B)に示す如く3.2kl−IZのサンプリング周
波数でAD変換が行なわれ(ステップ31)、続いて高
域周波数信号6一 (2kll〜20kl−1z)について同図(Δ)に示
づ如</1.okl−1zのサンプリング周波数でAD
変換が行なわれ(ステップ32)、これらデジタル信号
1ユRAM8に格納される。
The signals taken out from the bandpass filters 2a and 2b are selected and taken out in time series based on the switching signal from the switching signal generation section 5, and are supplied to the AD converter 6, and are then outputted from the conversion command and digital bind-off output section 7. According to the command, first, the first
As shown in Figure (B), AD conversion is performed at a sampling frequency of 3.2kl-IZ (step 31), and then the high frequency signal 61 (2kll to 20kl-1z) is converted as shown in Figure (Δ). How</1. AD with sampling frequency of okl-1z
Conversion is performed (step 32) and one of these digital signals is stored in RAM 8.

ここで、低域側周波数に対してAD変換動作が6/1回
行なわれである値のレベルデータが冑られるど箔入ノコ
変換部9から変換制御信号が取出され、AD変換動作の
残りの6/1回に対するデータは初期設定時に設定され
た無人力時と同じ値のデータに変換されて実質−1−第
1図(C)に示す信号とされる。
Here, the AD conversion operation is performed 6/1 times for the lower frequency side, and once the level data of a certain value is obtained, the conversion control signal is taken out from the foil-containing saw conversion section 9, and the remaining AD conversion operation is performed. The data for the 6/1 time is converted to data having the same value as the unmanned time set at the time of initial setting, and becomes the substantially -1-signal shown in FIG. 1(C).

低域側周波数に対してAD変換動作が6/1回行なわれ
ると演算及び音高分析部10においてF「1−演算が行
なわれる(ステップ33)一方、高域側周波数に対して
AD変換が64回行なわれるとここでF F T演算が
行なわれ(ステップ34)、夫々の演算結果がRAM8
に格納される。このとぎ、低域側周波数にお【ノるレベ
ルデータ取込みに要する時間は従来装置のレベルデータ
取込みに要覆る時間4Qmsの1/2の20m5で済む
When the AD conversion operation is performed 6/1 times for the lower frequencies, the calculation and pitch analysis section 10 performs the F'1- calculation (step 33), while the AD conversion is performed for the higher frequencies. After 64 times, FFT calculation is performed (step 34), and each calculation result is stored in RAM8.
is stored in At this point, the time required to take in the level data at the lower frequency is only 20 m5, which is 1/2 of the time required to take in the level data of the conventional device, which is 4 Qms.

このように、本発明ではレベルデータ取込時間が従来装
置の1/2の20m5であるため、信号入来から2Qm
s後にFFT演算を行ない4q、AD変換の開始から後
述のレベル表示迄に40m5Fi!度(データ取込みに
20m5.FFT演幹及び表示に20m5>で済み、こ
れにより、レベルデータ取込み時間が40m5の従来装
置に比して11.’l II!l if¥れ少Qくレベ
ル表示し得る。
In this way, since the level data acquisition time of the present invention is 20m5, which is half of that of the conventional device, it takes 2Qm5 from the signal input.
FFT calculation is performed after s, 4q, 40m5Fi from the start of AD conversion to the level display described below! It takes less than 20m5 to capture the data and 20m5 to display the FFT stem and display, which means that the level data can be displayed in 11.5 seconds compared to the conventional device, which takes 40m5 to capture the level data. obtain.

FFT演算が終了1゛ると、次いでパワースペクトル演
算が行なわれ(ステップ35)、この演算に基いて音高
が判定されて(ステップ36)50Hz〜20kHzの
各周波数別毎にRAM8に格納される。
When the FFT calculation is completed, a power spectrum calculation is performed (step 35), and the pitch is determined based on this calculation (step 36) and stored in the RAM 8 for each frequency from 50 Hz to 20 kHz. .

このようにして音高が判定されると、パターンデータ指
令部11からパターンデークJt7令M Rが取出され
てパターンデータ決定部12に供給され、判定された音
高に対応したパターンデータが取出され(ステップ37
)、MDI”’13を介してV・RAM14に供給され
て所定のテーブルに書込:1:れる(ステップ38)。
When the pitch is determined in this manner, the pattern data Jt7 order M R is taken out from the pattern data command section 11 and supplied to the pattern data determination section 12, and pattern data corresponding to the determined pitch is taken out. (Step 37
), is supplied to the V-RAM 14 via MDI''13 and written into a predetermined table (step 38).

V−RAM14のメモリマツプは第4図に示す如く、ス
ペクトル表示に必要な複数種類のパターンを記憶された
スプライト・ジェネレータ・テーブルSGT及びパター
ン・ジェネレータ・テーブルPGT、第5図に示すCR
T15に表示面(32列×24行)の各区画に対応した
容量をもつパターン名称デープルPNT、表示面の垂直
位置及び水平位置の情報を記憶されるスプライト属性テ
ーブルSAT、カラー情報を記憶されたカラーテーブル
CT、未使用のテーブルの各テーブルにより構成されて
いる VDP13Fは、V −RAMI 4(Dパター>名称
デープルPNTやスプライi・属性デープルSATに書
込まれたデータに従ってCRT15の表示面に表示すべ
きパターンの選択及びパターンの移動態様の指定が行な
われ、がっ、複合映像信号が作られ、CRT15に供給
されて第6図に示す如くここの表示面の所定位置に各周
波数別にバーグラフ状のパターンP1が表示される(ス
テップ39)。
The memory map of the V-RAM 14 includes, as shown in FIG. 4, a sprite generator table SGT and a pattern generator table PGT that store a plurality of types of patterns necessary for spectrum display, and a CR shown in FIG.
In T15, a pattern name table PNT having a capacity corresponding to each section of the display surface (32 columns x 24 rows), a sprite attribute table SAT that stores information on the vertical position and horizontal position of the display surface, and color information are stored. The VDP13F, which is composed of color table CT and unused tables, displays on the display screen of CRT15 according to the data written in V-RAMI 4 (D pattern> name table PNT and splice i/attribute table SAT). The pattern to be applied is selected and the movement mode of the pattern is specified, and then a composite video signal is created and supplied to the CRT 15, where a bar graph is displayed at a predetermined position on the display screen for each frequency as shown in FIG. A pattern P1 is displayed (step 39).

9− なお、レベルの目盛9周波数、ぞの他の文字等はROM
16に予め記憶されているデータににり予め表示されて
いる。
9- In addition, the level scale 9 frequency, other characters, etc. are in ROM.
16 is displayed in advance based on data stored in advance.

変形例 なお、上記実施例では初期設定の段階で無人13時と同
じ値のデータを設定したが、これに限定されるものでは
なく、第3図中ステップ31〜ステツプ39の実行の度
毎に毎回無人力時の値を測定してこれを設定してもよい
Modified Example In the above embodiment, the same value as the unmanned 13:00 time is set at the initial setting stage, but the data is not limited to this, and each time steps 31 to 39 in FIG. 3 are executed. It is also possible to measure and set the value each time when there is no human power.

又、レベルデータを取込む期間どしては−1−記実施例
のように2011ISに限定されるものではなく、例え
ば10ms、 15msのJ:うにしてもJ:い。
Further, the period for acquiring the level data is not limited to 2011IS as in the embodiment described in 1-1, but may be 10 ms or 15 ms, for example.

効果 上述の如く、本発明になるスペクトル表示装置は、低域
側周波数の子め定められた複数個のデジタルデ〜り中断
定数のデジタルデータを取込lυだ直後これを周波数分
析する手段と、低域側周波数の上記予め定められた複数
個のデジタルデータ中上記所定数のデジタルデータ以外
のデジタルデータを実質的に無人力時のデジタルデータ
に変換サ10− る手段とを設けたため、周波数分析のために取込むデジ
タルデータの数は従来装置に比して少なくて済み、これ
により、サンプリングlI]間の全てのデジタルデータ
を取込/υでいた従来装置に比して信号入来から表示ま
でを時間遅れ少なくし得、レベルを見易い等の特長を有
覆る。
Effects As described above, the spectrum display device according to the present invention includes means for frequency-analyzing the digital data of a plurality of predetermined digital data interruption constants of lower frequencies immediately after importing the digital data, Frequency analysis Compared to conventional equipment, the number of digital data to be acquired for sampling is smaller than that of conventional equipment. It has the advantages of reducing time delay and making it easy to see the level.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図<A)〜(C)は入力オーディオ−信号を勺ンプ
リングJ−る様子を説明するための図、第2図は本発明
装置の一実施例のブロック系統図、第3図は本発明装置
の動作説明用フローヂA7−ト、第4図はV−RAMの
メモリマツプ、第5図はCRT表示表示区画説明図、第
6図はCRT表示面の図である。 1・・・オーディオ信号入力端子、2a 、 2b・・
・帯域フィルタ、4・・・制御装置、6・・・AD変換
器、7・・・変換指令及びデジタル信号出力部、8・・
・RA M、9・・・零入力変換部、10・・・演算及
び音高分析部、12・・・パターンデータ決定部、13
・・・ビデオ・ディスプレイ・ブ[lセッサ、14・・
・V−RAM、15・・・CRT。
Figures 1A to 1C are diagrams for explaining how an input audio signal is sampled, Figure 2 is a block diagram of an embodiment of the device of the present invention, and Figure 3 is a diagram of the present invention. FIG. 4 is a memory map of the V-RAM, FIG. 5 is an explanatory diagram of the CRT display section, and FIG. 6 is a diagram of the CRT display surface. 1...Audio signal input terminal, 2a, 2b...
- Bandpass filter, 4... Control device, 6... AD converter, 7... Conversion command and digital signal output section, 8...
・RAM, 9...Zero input conversion section, 10...Calculation and pitch analysis section, 12...Pattern data determination section, 13
...Video display block [l processor, 14...
・V-RAM, 15...CRT.

Claims (1)

【特許請求の範囲】 (1)入力オーディオ信号を周波数分割手段にJ:り低
域側周波数帯域及び高域側周波数帯域に分割し、該低域
側周波数の信号及び該高域側周波数の信号を夫々異なる
周期でサンプリングしてデジタルデータに変換し、予め
定められた複数個の該デジタルデータに基いて所定周期
で周波数分析して音高を判定し、該夫々判定された音高
に基いて上記入力オーディオ信号のレベルを各周波数帯
域毎に表示面上にスペクトル表示するスペクトル表示装
置において、上記低域側周波数の上記予め定められた複
数個のデジタルデータ中所定数のデジタルデータを取込
んだ6優これを周波数分析する手段と、上記低域側周波
数の」:記予め定められた複数個のデジタルデータ中該
所定数のデジタルデータ以外のデジタルデータを実質的
に無人力時のデジタルデータに変換する手段とを設(プ
てなることを特徴とするスペクトル表示装置。 ■ 該無人力時のデジタルデータは、該周波数分割手段
を構成するアンプのオフセット電圧を実際に測定した値
に基いて設定されたデジタルデータであることを特徴と
する特許請求の範囲第1項記載のスペクトル表示装置。 ■ 該無人力時のデジタルデータの設定は、該デジタル
データ変換9周波数分析1表示等の各動作をマイクロコ
ンピュータにて実行する場合の初期設定時に行なうこと
を特徴とする特許請求の範囲第2項記載のスペクトル表
示装置。 (4) 該無人力時のデジタルデータの設定は、該デジ
タルデータ変換1周波数分析2表示等の各動作をマイク
ロコンピュータにて実行する場合の該多動作の繰返し毎
に行なうことを特徴とする特許請求の範囲第2項記載の
スペクトル表示装置。
[Claims] (1) An input audio signal is divided into a lower frequency band and a higher frequency band by a frequency dividing means, and a signal of the lower frequency and a signal of the higher frequency are sampled at different cycles and converted into digital data, frequency analysis is performed at a predetermined cycle based on a plurality of predetermined digital data to determine the pitch, and based on the respective determined pitches, In the spectrum display device that spectrally displays the level of the input audio signal for each frequency band on the display screen, a predetermined number of digital data from among the plurality of predetermined digital data of the lower frequency is captured. 6. Means for frequency analysis of this, and a means for converting the digital data other than the predetermined number of digital data among the plurality of predetermined digital data into digital data in the case of an unmanned operation. A spectrum display device characterized in that it is equipped with a means for converting the frequency. ■ The digital data during unattended operation is set based on the value actually measured of the offset voltage of the amplifier constituting the frequency dividing means. The spectral display device according to claim 1, characterized in that the digital data is digital data. ■ The setting of the digital data during unattended operation is performed by performing each operation such as the digital data conversion 9 frequency analysis 1 display, etc. The spectral display device according to claim 2, characterized in that the setting is performed at the time of initial setting when executed by a microcomputer. (4) The digital data setting during unmanned operation is performed at the time of the digital data conversion 1 frequency. 3. The spectrum display device according to claim 2, wherein each operation such as analysis 2 display is performed every time the multiple operations are repeated when executed by a microcomputer.
JP20217383A 1983-10-28 1983-10-28 Spectrum display apparatus Pending JPS6093959A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20217383A JPS6093959A (en) 1983-10-28 1983-10-28 Spectrum display apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20217383A JPS6093959A (en) 1983-10-28 1983-10-28 Spectrum display apparatus

Publications (1)

Publication Number Publication Date
JPS6093959A true JPS6093959A (en) 1985-05-25

Family

ID=16453172

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20217383A Pending JPS6093959A (en) 1983-10-28 1983-10-28 Spectrum display apparatus

Country Status (1)

Country Link
JP (1) JPS6093959A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108680787A (en) * 2018-05-23 2018-10-19 成都玖锦科技有限公司 Real time spectral analysis method based on FPGA

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108680787A (en) * 2018-05-23 2018-10-19 成都玖锦科技有限公司 Real time spectral analysis method based on FPGA

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