JPS6084848A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS6084848A JPS6084848A JP19235783A JP19235783A JPS6084848A JP S6084848 A JPS6084848 A JP S6084848A JP 19235783 A JP19235783 A JP 19235783A JP 19235783 A JP19235783 A JP 19235783A JP S6084848 A JPS6084848 A JP S6084848A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- semiconductor
- semiconductor device
- transfer member
- heat transfer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Abstract
Description
【発明の詳細な説明】
〔技術分野〕
本発明は半導体装置に関し、特に半田バンプ実装方式に
よるパッケージにおいて放熱効率が良く高寿命化を達成
できる半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a semiconductor device, and more particularly to a semiconductor device that has good heat dissipation efficiency and can achieve a long life in a package using a solder bump mounting method.
半導体チップの実装方式の一つに半導体チップを半田な
どにより形成されたバンプ（Ｂｕｍｐ 、突起電極）を
溶融させて、セラミック基板などの半導体装基板に実装
する方式がある。One method for mounting semiconductor chips is to melt bumps (protruding electrodes) formed with solder or the like and then mount the semiconductor chip on a semiconductor mounting substrate such as a ceramic substrate.
しかるに、このＣＣＢ実装方式では、半導体チップが中
空に保持されるため、熱の逃げ道は、空気中か、あるい
は上記バンプを通しての半導体装基板への熱伝導という
ことになり、極めて放熱効率が悪（、半導体チップの温
度が上昇しやすく、当該チップの寿命を下げ、また高密
度実装できないという欠点がある。However, in this CCB mounting method, since the semiconductor chip is held in the air, the only way for heat to escape is through the air or through heat conduction to the semiconductor circuit board through the bumps, resulting in extremely poor heat dissipation efficiency ( However, there are disadvantages in that the temperature of the semiconductor chip tends to rise, the life of the chip is shortened, and high-density packaging is not possible.
これを解消する従来の放熱方式の一つに、ＴＣＭ （Ｔ
ｈｅｒｍａｌ Ｃｏｎｄｕｃｔｉｏｎ Ｍｏｄｕｌｅ
）と称される方式がある（Ｅｌｅｃｔｒｏｎｉｃｓ Ｊ
ｕｎｅ １６ 、１９８２．１ｐ１４３〜１４６）。し
かしながら、この方式はピストンとバネとを用いて半導
体チップ裏面より熱を放散するもので、構造が複雑にな
り、また半田バンプに不必要な応力がかがるという欠点
があった。One of the conventional heat dissipation methods to solve this problem is TCM (T
herbal conduction module
) (Electronics J
une 16, 1982.1 p143-146). However, this method uses a piston and a spring to dissipate heat from the back surface of the semiconductor chip, which has the disadvantage of complicating the structure and applying unnecessary stress to the solder bumps.
本発明はかかる欠点を有しない放熱構造を有する半導体
装置を提供するもので、半田バンプに不必要な応力がか
からず、バンプや半導体チップの高寿命化に好適な放熱
構造を有する半導体装置を提供することを目的とする。The present invention provides a semiconductor device having a heat dissipation structure that does not have such drawbacks, and which does not apply unnecessary stress to solder bumps and has a heat dissipation structure suitable for extending the life of bumps and semiconductor chips. The purpose is to provide.
本発明の前記ならびにその目的と新規な特徴は、本明細
書の記述および添付図面からあきらかになるであろう。The above-mentioned objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.
本願において開示され本発明のうち代表的なものの概要
を簡単に説明すれば次のとおりである。A brief overview of typical aspects of the present invention disclosed in this application is as follows.
すなわち、本発明では半導体チップの裏側に液体金属を
介し℃放熱板を取付けたもので、半田バンプへの応力が
集中せず、かつ放熱効率を著しく向上でき、これにより
半導体装置の高寿命化な実現できる。In other words, in the present invention, a ℃ heat dissipation plate is attached to the back side of the semiconductor chip via liquid metal, which prevents stress from concentrating on the solder bumps and significantly improves heat dissipation efficiency, thereby extending the lifespan of semiconductor devices. realizable.
〔実施例１〕
第１図〜第４図は本発明による半導体装置の製造プロセ
スおよび当該装置の一例を説明するものである。第１図
および第２図に示すように１表面すなわち半導体素子形
成側に半田バンプ１を有する半導体チップ２の裏面をエ
ツチングして、窪み３を形成する。半田バンプ１はその
図示を省略しであるが、例えば７リツプチツプに使用さ
れるような半球状の５ｎ−Ｐｂを用いたバンプが使用さ
れ、例えばバリヤ金属（Ｃｒ −Ｃｕ−Ａｕ）を介して
半導体チップ内のＡ４電極配線上に形成されている。[Embodiment 1] FIGS. 1 to 4 illustrate an example of the manufacturing process of a semiconductor device and the device according to the present invention. As shown in FIGS. 1 and 2, a recess 3 is formed by etching the back surface of a semiconductor chip 2 having solder bumps 1 on one surface, that is, the semiconductor element formation side. The solder bump 1 is not shown in the figure, but a hemispherical 5n-Pb bump used in, for example, a 7-lip chip is used, and the solder bump 1 is soldered to a semiconductor via a barrier metal (Cr-Cu-Au), for example. It is formed on the A4 electrode wiring inside the chip.
半導体チップ２は周知の技術により、論理回路やメモリ
回路などが形成された素子で、例えばＭＱＳ Ｉ Ｃ（
Ｍｅｔａｌ Ｑｘｉｄｅ Ｓｅｍ１ｃｏｎｄｕｃｔｏｒ
ｉｎｔｅ−ｇｒａｔｅｄ Ｃ１ｒｃｕｉｔ ）が素子
として例示される。The semiconductor chip 2 is an element in which a logic circuit, a memory circuit, etc. are formed using a well-known technique, for example, MQS IC (
Metal Qxide Sem1 conductor
integrated C1rcuit) is exemplified as an element.
上記エツチングは周知のエツチング技術を用いて行うこ
とができ、半導体チップの内部素子に影響しないように
適宜の深さ、形状にエツチングされる。次いで、第２図
に示すように、窪み３が形成された半導体チップ２を半
導体装基板ｔＫ半田バンプ１を溶融させてポンディング
する。半導体装基板４は例えばセラミック基板により構
成される。The above-mentioned etching can be performed using a well-known etching technique, and is etched to an appropriate depth and shape so as not to affect the internal elements of the semiconductor chip. Next, as shown in FIG. 2, the semiconductor chip 2 with the recess 3 formed therein is bonded by melting the solder bumps 1 on the semiconductor mounting substrate tK. The semiconductor substrate 4 is made of, for example, a ceramic substrate.
次に、半導体チップ２の裏面に形成された窪み３の中に
熱伝導性の液状伝熱部材５を収容する。Next, a thermally conductive liquid heat transfer member 5 is accommodated in the depression 3 formed on the back surface of the semiconductor chip 2 .
熱伝導性の液状伝熱部材５は、例えば液体金属により構
成される。液体金属の具体例としては、水銀（Ｈｇ ）
がある。この際に、上記部材５を第３図に示すように、
半導体チップ２の裏面より高くもりあがるようにするこ
とがよい。これにより、後述する放熱体との密着性が良
くなり、放熱効率を向上させるとともに、半田バンプへ
の応力集中をなくすことができる。The thermally conductive liquid heat transfer member 5 is made of, for example, liquid metal. A specific example of liquid metal is mercury (Hg)
There is. At this time, as shown in FIG. 3, the member 5 is
It is preferable to rise higher than the back surface of the semiconductor chip 2. This improves the adhesion with the heat dissipation body described later, improving heat dissipation efficiency and eliminating stress concentration on the solder bumps.
次に、第３図に示すように、当該液状伝熱部材５を熱伝
導性の被膜６で覆い、液状伝熱部材５の窪み３からの流
出を防ぐ。Next, as shown in FIG. 3, the liquid heat transfer member 5 is covered with a thermally conductive coating 6 to prevent the liquid heat transfer member 5 from flowing out from the depression 3.
当該被膜は例えば高分子膜により構成され、具体例とし
て、ポリバラキシレン膜がある。ポリハラキシレンはパ
リレンなる商品名で市販されているものを使用すればよ
い。The coating is made of, for example, a polymer film, and a specific example is a polyvaraxylene film. As the polyhalaxylene, one commercially available under the trade name Parylene may be used.
次いで、第４図に示すように、冷却フィン７を有する放
熱体８を半導体装基板４上に載置固着する。その際、前
記した被膜６と放熱体８の内面とが密着させることが肝
要であり、これにより放熱効率を向上する。放熱体８は
、キャップに変り得るもので、外界から半導体チップを
遮断する役割をも果す。Next, as shown in FIG. 4, a heat sink 8 having cooling fins 7 is placed and fixed on the semiconductor device substrate 4. As shown in FIG. At that time, it is important that the coating 6 and the inner surface of the heat radiating body 8 are brought into close contact with each other, thereby improving the heat dissipation efficiency. The heat sink 8 can be converted into a cap, and also serves to shield the semiconductor chip from the outside world.
当該放熱体８は、例えば銅、アルミ合金などの比較的熱
伝導率の高いもので構成され、トランジスタや集積回路
（ＩＣ）などの熱抵抗を下げる目的で使用されるヒート
シンクと呼ばれる各種放熱体を用いることができる。The heat sink 8 is made of a material with relatively high thermal conductivity, such as copper or aluminum alloy, and includes various heat sinks called heat sinks used for lowering the thermal resistance of transistors, integrated circuits (ICs), etc. Can be used.
本発明においては液状伝熱部材に代えて固状伝熱部材を
用いることもできる。例えば、シリコーンゲルや各種ゴ
ム状の高分子物を用いることもできる。この固状伝熱部
材を用いるときには、前記した被膜を省略することもで
きる。In the present invention, a solid heat transfer member may be used instead of a liquid heat transfer member. For example, silicone gel and various rubber-like polymers can also be used. When using this solid heat transfer member, the coating described above may be omitted.
〔実施例２〕 第５図は本発明の他の実施例を示す。[Example 2] FIG. 5 shows another embodiment of the invention.
第５図では第４図に示す放熱構造を有する半導体チップ
組込装置を横方向に２個並設した例を示し、本発明では
放熱効率が良く、熱抵抗を下げ得るので、ここで例示し
たような高密度実装が可能である。Fig. 5 shows an example in which two semiconductor chip embedded devices having the heat dissipation structure shown in Fig. 4 are arranged side by side in the horizontal direction. High-density packaging is possible.
第５画にて、９はメタライズ層であり、第５図に示す実
施例では、このメタライズ層９を介して半導体チップ２
の内部配線が外部リード端子１０へと接続されている。In the fifth image, 9 is a metallized layer, and in the embodiment shown in FIG.
The internal wiring is connected to the external lead terminal 10.
メタライズ層９は例えばＭメタライズ層により構成され
外部リード端子は例えばコバール合金により構成される
。The metallized layer 9 is made of, for example, an M metallized layer, and the external lead terminal is made of, for example, Kovar alloy.
〔実施例３〕
第６図は本発明のさらに他の実施例を示し、表面にバン
プ電極１を有する半導体チップ２の裏面と、キャップ１
１に取付けた。熱伝導性の液状伝熱部材５を内蔵した金
属箔体１２の外面とを接触させて成る放熱構造を有する
半導体装置の実施例を示す。金属箔体としては例えば／
ｌ箔が使用されるが、他の部材は上述した第１図〜第５
図で例示したものと同様のものが使用される。[Embodiment 3] FIG. 6 shows still another embodiment of the present invention, in which the back surface of the semiconductor chip 2 having the bump electrode 1 on the surface and the cap 1
Installed on 1. An embodiment of a semiconductor device having a heat dissipation structure formed by contacting the outer surface of a metal foil body 12 containing a thermally conductive liquid heat transfer member 5 will be shown. For example, as a metal foil body, /
1 foil is used, but the other members are as shown in Figures 1 to 5 above.
The same one as illustrated in the figure is used.
ｆｉｌ 液体伝熱部材（固体伝熱部材）を介して放熱体
から熱を放熱するようにしており、これら伝熱部材、放
熱体を通して熱を効率よく逃がすことができる。fil Heat is radiated from the heat radiator through the liquid heat transfer member (solid heat transfer member), and heat can be efficiently released through these heat transfer members and the heat radiator.
（２１半導体チップの裏面をエツチングして窪みを形成
し、この窪みの中に液体伝熱部材２収容しており、半導
体チップ内部に液体伝熱部材が入りこんでいるので、放
熱面積が犬であり、それだけ放熱効率に優れている。(21 A recess is formed by etching the back surface of the semiconductor chip, and the liquid heat transfer member 2 is housed in this recess. Since the liquid heat transfer member is inside the semiconductor chip, the heat dissipation area is small. , it has excellent heat dissipation efficiency.
（３）半導体チップの裏側に液体伝熱部材を介して放熱
板などの放熱体を取付けたので、バンプ電極への応力が
集中せず、不必要な応力がバンプ電極にかからない。従
ってバンプ電極の寿命、延い℃は半導体装置の寿命を従
来例に比して約１０倍以上も延長することができる。(3) Since a heat sink such as a heat sink is attached to the back side of the semiconductor chip via a liquid heat transfer member, stress is not concentrated on the bump electrodes, and unnecessary stress is not applied to the bump electrodes. Therefore, the life span of the bump electrode can be increased by about 10 times or more in terms of the life span of the semiconductor device compared to the conventional example.
（４）放熱効率が良いので半導体チップの温度上昇を回
避することができ、半導体パラメータの熱による変動が
おさえられ、半導体チップの信頼性を格段に向上するこ
とができる。(4) Since the heat dissipation efficiency is good, it is possible to avoid a rise in the temperature of the semiconductor chip, suppress fluctuations in semiconductor parameters due to heat, and significantly improve the reliability of the semiconductor chip.
以上本発明者によってなされた発明を実施例にもとづき
具体的に説明したが、本発明は上記実施例に限定される
ものではなく、その要旨を逸脱しない範囲で種々変更可
能であることはいうまでもない。Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. Nor.
〔利用分野〕
以上の説明では主とし１本発明者によってなされた発明
をその背景となった分野である半導体装置の放熱技術に
適用した場合について説明したが、他の各種電子部品に
適用することができる。[Field of Application] The above explanation mainly concerns the application of the invention made by the present inventor to heat dissipation technology for semiconductor devices, which is the background field of the invention, but the invention can also be applied to various other electronic components. Can be done.
第１図〜第４図は本発明半導体装置のプロセスおよび実
施例を示す断面図、
第５図は本発明半導体装置の他の実施例を示す断面図、
第６図は本発明半導体装置の実施例を示す断面図である
。
１・・・半田バッグ、２・・・半導体チップ、３・・・
窪み。
４・・・半導体装基板、５・・・液状伝熱部材、６・・
・熱伝導性被膜、７・・・冷却フィン、８・・・放熱体
、９・・・メタライズ層、１０・・・外部リード端子、
１１・・・キャップ、１２・・・金属箔体。
第 １ 図
第 ４ 図
ρ
第 ５ 図
第 ６ 図1 to 4 are cross-sectional views showing processes and embodiments of the semiconductor device of the present invention, FIG. 5 is a cross-sectional view showing other embodiments of the semiconductor device of the present invention, and FIG. 6 is an implementation of the semiconductor device of the present invention. It is a sectional view showing an example. 1...Solder bag, 2...Semiconductor chip, 3...
Hollow. 4... Semiconductor circuit board, 5... Liquid heat transfer member, 6...
- Thermal conductive film, 7... Cooling fin, 8... Heat sink, 9... Metallized layer, 10... External lead terminal,
11... Cap, 12... Metal foil body. Figure 1 Figure 4 Figure ρ Figure 5 Figure 6
Claims (1)
伝導性の液状伝熱部材を当該部材を熱伝導性の被膜で接
するようＶこ設け、かつ当該被膜上に放熱体を密着させ
て成る放熱構造を有する半導体装置。 ２、熱伝導性の液状伝熱部材が、液体金属である、特許
請求の範囲第１項記載の半導体装置。 ３、特許請求の範囲第１項において、液状伝熱部材を半
導体チップの裏面から突出して収容する、特許請求の範
囲第１項記載の半導体装置。 ４、熱伝導性の被膜が、ポリパラキシレン膜である、特
許請求の範囲第１項記載の半導体装置。 ５、放熱体がギャップである、特許請求の範囲第１項記
載の半導体装置。 ６、液状伝熱部材は半導体チップの裏面に設けられた槌
みに少なくともその一部が埋込まれていることを特徴と
する特許請求の範囲第１項記載の半導体装置。[Scope of Claims] 1. A thermally conductive liquid heat transfer member is provided on the back surface of a semiconductor chip having bump electrodes on the surface so that the member is in contact with a thermally conductive film, and a heat sink is provided on the film. A semiconductor device having a heat dissipation structure made of 2. The semiconductor device according to claim 1, wherein the thermally conductive liquid heat transfer member is a liquid metal. 3. The semiconductor device according to claim 1, wherein the liquid heat transfer member is housed in a manner protruding from the back surface of the semiconductor chip. 4. The semiconductor device according to claim 1, wherein the thermally conductive film is a polyparaxylene film. 5. The semiconductor device according to claim 1, wherein the heat sink is a gap. 6. The semiconductor device according to claim 1, wherein the liquid heat transfer member is at least partially embedded in a hammer provided on the back surface of the semiconductor chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19235783A JPS6084848A (en) | 1983-10-17 | 1983-10-17 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19235783A JPS6084848A (en) | 1983-10-17 | 1983-10-17 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6084848A true JPS6084848A (en) | 1985-05-14 |
Family
ID=16289929
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19235783A Pending JPS6084848A (en) | 1983-10-17 | 1983-10-17 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6084848A (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03211862A (en) * | 1989-12-29 | 1991-09-17 | Internatl Business Mach Corp <Ibm> | Heat sink for integrated circuit board |
| EP0522563A3 (en) * | 1991-07-12 | 1994-06-08 | Sumitomo Electric Industries | Semiconductor chip module and method of manufacturing the same |
| EP0895286A2 (en) * | 1997-07-30 | 1999-02-03 | Asea Brown Boveri AG | Semiconductor power componant with pressure compensating contact plate |
| US6665186B1 (en) * | 2002-10-24 | 2003-12-16 | International Business Machines Corporation | Liquid metal thermal interface for an electronic module |
| WO2006020332A1 (en) * | 2004-08-13 | 2006-02-23 | Intel Corporation | Liquid metal thermal interface for an integrated circuit device |
| US7221571B2 (en) | 2003-08-28 | 2007-05-22 | Fujitsu Limited | Package unit, printed board having the same, and electronic apparatus having the printed board |
| JP2012256792A (en) * | 2011-06-10 | 2012-12-27 | Toshiba Corp | Heat dissipation structure |
| EP4250352A1 (en) * | 2022-03-22 | 2023-09-27 | MediaTek Inc. | Semiconductor device and manufacturing method thereof |
-
1983
- 1983-10-17 JP JP19235783A patent/JPS6084848A/en active Pending
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03211862A (en) * | 1989-12-29 | 1991-09-17 | Internatl Business Mach Corp <Ibm> | Heat sink for integrated circuit board |
| JPH079956B2 (en) * | 1989-12-29 | 1995-02-01 | インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン | Heat sink for integrated circuit board |
| EP0522563A3 (en) * | 1991-07-12 | 1994-06-08 | Sumitomo Electric Industries | Semiconductor chip module and method of manufacturing the same |
| US5525548A (en) * | 1991-07-12 | 1996-06-11 | Sumitomo Electric Industries, Ltd. | Process of fixing a heat sink to a semiconductor chip and package cap |
| EP0895286A2 (en) * | 1997-07-30 | 1999-02-03 | Asea Brown Boveri AG | Semiconductor power componant with pressure compensating contact plate |
| EP0895286A3 (en) * | 1997-07-30 | 1999-11-03 | Asea Brown Boveri AG | Semiconductor power componant with pressure compensating contact plate |
| US6665186B1 (en) * | 2002-10-24 | 2003-12-16 | International Business Machines Corporation | Liquid metal thermal interface for an electronic module |
| US7221571B2 (en) | 2003-08-28 | 2007-05-22 | Fujitsu Limited | Package unit, printed board having the same, and electronic apparatus having the printed board |
| WO2006020332A1 (en) * | 2004-08-13 | 2006-02-23 | Intel Corporation | Liquid metal thermal interface for an integrated circuit device |
| US7348665B2 (en) | 2004-08-13 | 2008-03-25 | Intel Corporation | Liquid metal thermal interface for an integrated circuit device |
| DE112005001952B4 (en) * | 2004-08-13 | 2012-03-29 | Intel Corporation | Liquid metal thermal interface for an integrated switching device |
| JP2012256792A (en) * | 2011-06-10 | 2012-12-27 | Toshiba Corp | Heat dissipation structure |
| EP4250352A1 (en) * | 2022-03-22 | 2023-09-27 | MediaTek Inc. | Semiconductor device and manufacturing method thereof |
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