JPS6081921A - Ic oscillator - Google Patents
Ic oscillatorInfo
- Publication number
- JPS6081921A JPS6081921A JP58191393A JP19139383A JPS6081921A JP S6081921 A JPS6081921 A JP S6081921A JP 58191393 A JP58191393 A JP 58191393A JP 19139383 A JP19139383 A JP 19139383A JP S6081921 A JPS6081921 A JP S6081921A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- frequency
- oscillator
- capacitor
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/03—Astable circuits
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明はICN品に内蔵された発振器に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an oscillator built into an ICN product.
従来のICM品内蔵の発振器は、安定した発振周波数を
得るために外部から周波数調整の入力信号を加えるよう
にしている。それでこの入力信号を取り入れるため、専
用の外付端子が必要になり、10M品に設置できる端子
数には制限があることから、IC11品1個に持たせら
れる機能が限られるという欠点がある。Conventional ICM built-in oscillators require an external frequency adjustment input signal to obtain a stable oscillation frequency. Therefore, in order to take in this input signal, a dedicated external terminal is required, and since there is a limit to the number of terminals that can be installed on a 10M product, there is a drawback that the functions that can be provided to a single IC11 product are limited.
本発明は上記欠点を解決するため、発振器の周波数調整
用外付端子をなくして、内蔵機能を増加できるIC発振
器の提供を目的とするものである。SUMMARY OF THE INVENTION In order to solve the above-mentioned drawbacks, the present invention aims to provide an IC oscillator that can increase built-in functions by eliminating external terminals for frequency adjustment of the oscillator.
以下本発明を図に示す実施例について説明する。 The present invention will be described below with reference to embodiments shown in the drawings.
1は容量C2のコンデンサlOとバリスタ7の抵抗値に
よってその発振周波数が決定されるCR発振回路である
。2はCR発振回路lの発振周波数を電流に変換する機
能を持ったスイソチドキャパシタ回路である。3はスイ
ッチドキャパシタ回路2より流れ込んでくる電流を定電
圧に変換する平滑回路である。4は平滑回路3の出力電
圧を増幅するアンプである。バリスタ7はアンプ4より
出力される電圧に応じた可変抵抗値を持つものである。Reference numeral 1 denotes a CR oscillation circuit whose oscillation frequency is determined by the resistance value of a capacitor lO having a capacitance C2 and a varistor 7. 2 is a swissotide capacitor circuit having a function of converting the oscillation frequency of the CR oscillation circuit 1 into a current. 3 is a smoothing circuit that converts the current flowing from the switched capacitor circuit 2 into a constant voltage. 4 is an amplifier that amplifies the output voltage of the smoothing circuit 3. The varistor 7 has a variable resistance value depending on the voltage output from the amplifier 4.
8は定電圧Iを出力する定電流源であり、9は定電圧V
refを出力する定電圧源である。11は容量C1のコ
ンデンサである。8 is a constant current source that outputs a constant voltage I, and 9 is a constant voltage source that outputs a constant voltage V.
It is a constant voltage source that outputs ref. 11 is a capacitor having a capacitance C1.
次に上記構成においてその作動を説明する。スイソチド
キャパシタ回路2は、スイッチ部6がCR発振lI!l
路1の発振局波数fに同期して動作するものとすれば第
2図の等価回路で考えることができる。すなわらCR発
振回1181が周波数1で発振していれば平滑回路3に
1o−1(ただし1.=C1Vref・f)の電流が流
れ込むことがわかる。平滑回路3はこれを定電圧に変換
し、さらにアンプ4によってバリスタ7にはスイノチド
キャパシタ回路2の平均電流であるC1re(r−1の
大きさに応じた電圧が加わることになる。バリスタ7は
加わる電圧によってその抵抗値が変わるから、結局、検
出された発振周波数fの値によってバリスタ7の抵抗値
が変わることになる。Next, the operation of the above configuration will be explained. In the swissotide capacitor circuit 2, the switch section 6 generates CR oscillation lI! l
Assuming that it operates in synchronization with the oscillation station wave number f of path 1, it can be considered using the equivalent circuit shown in FIG. In other words, it can be seen that if the CR oscillation circuit 1181 oscillates at a frequency of 1, a current of 1o-1 (however, 1.=C1Vref·f) flows into the smoothing circuit 3. The smoothing circuit 3 converts this into a constant voltage, and the amplifier 4 applies a voltage to the varistor 7 according to the magnitude of C1re (r-1), which is the average current of the suinotide capacitor circuit 2. Since the resistance value of varistor 7 changes depending on the applied voltage, the resistance value of varistor 7 changes depending on the value of the detected oscillation frequency f.
一方本実施例のCR発振回路1の発@周波数fとバリス
タ7の抵抗値Rの関係は次式にて表示される。On the other hand, the relationship between the oscillation frequency f of the CR oscillation circuit 1 and the resistance value R of the varistor 7 of this embodiment is expressed by the following equation.
f −K + / C2R・・・(11またフィードバ
ンク補償手段としてのスイノチドキャパシタ回路2、平
滑回路3およびアンプ4は、アンプ4の出力電圧を■8
とすると
Vs−K’ (C1Vref−f−1)−f2)1/R
=K”Ve −−−(31
という関係があり、上記(21,(31式から以下の(
4)式が成立する。f −K + / C2R... (11 In addition, the suinotide capacitor circuit 2 as a feed bank compensation means, the smoothing circuit 3, and the amplifier 4 adjust the output voltage of the amplifier 4 to ■8
Then, Vs-K' (C1Vref-f-1)-f2)1/R
=K''Ve ---(31) From the above equations (21, (31), the following (
4) The formula holds true.
1/R−−に2 (C1Vref−f−I)−+41以
上(1)〜(4)式に沿って制御のしくみを、バリスタ
7の抵抗値がR−R’oで目標値周波数がf=f。1/R-- to 2 (C1Vref-f-I)-+41 or more The control mechanism is constructed according to equations (1) to (4), and the resistance value of the varistor 7 is R-R'o and the target value frequency is f. =f.
の場合について述べる。今発振周波数が何らかの原因で
Δ[増えたとすると、(4)式からバリスタ7の抵抗値
は、
Δ(1/R) −af (1/R) ・Δf/df=−
に2C1Vref−Δf ・151
の(5)式からめられる分補正される。すなわち抵抗値
ROは1 / Roであったものが1/Ro K2CI
Vraf・Δfに補正される。従って変動した発振周波
数fO+ΔfはKl/C2(1/ROK2C1Vref
Δf)+ΔfであってTl1式よりfo=に+/C2R
Oであるから
fo (K+に2C+Vr’ef/C2−1) Δfに
補正される。Let's discuss the case. Now, if the oscillation frequency increases by Δ[ due to some reason, the resistance value of varistor 7 from equation (4) is Δ(1/R) −af (1/R) ・Δf/df=−
is corrected by the amount calculated from equation (5) of 2C1Vref-Δf·151. In other words, the resistance value RO was 1/Ro, but now it is 1/Ro K2CI
It is corrected to Vraf·Δf. Therefore, the fluctuated oscillation frequency fO+Δf is Kl/C2(1/ROK2C1Vref
Δf) + Δf, and from the Tl1 formula, fo = +/C2R
Since it is O, it is corrected to fo (2C+Vr'ef/C2-1 for K+) Δf.
ここでに+に2C+Vref/C2=1となるよう回路
設計が行われていれば、発振周波数fは目標値周波数f
oにただちに補正されることになる。以上フィードバッ
ク補償の動作で、このシステムは目標値周波数roで安
定した発振を行う。Here, if the circuit is designed so that +2C+Vref/C2=1, the oscillation frequency f will be the target value frequency f
o will be immediately corrected. Through the feedback compensation operation described above, this system performs stable oscillation at the target value frequency ro.
又、このCR発振回路1が仕様周波数fで安定に発振す
るようにフィードバンク補償手段のスイッチドキャパシ
タ1fflR2、平ml路3及びアンプ4がv&能する
ためには、式(5)が正確に満足されていなければなら
ないが、これはスイソチドキャパシタ回路2のコンデン
サ11とCR発振回路1のコンデンサ10の容量の比C
I/ C2の調整によって可能である。そしてこの容量
の比C+ / C2の絶対値が設計値どうりになるよう
にコンデンサ10.114−製造することはICのMO
Sプロセスでは容易である。よってこの回路構成で極め
て良好な安定性を持つ発振回路を実現することができる
。In addition, in order for the switched capacitor 1fflR2, the flat ml path 3, and the amplifier 4 of the feed bank compensating means to perform the v& function so that the CR oscillation circuit 1 stably oscillates at the specified frequency f, equation (5) must be accurately This must be satisfied by the ratio C of the capacitance of the capacitor 11 of the swissotide capacitor circuit 2 and the capacitance of the capacitor 10 of the CR oscillation circuit 1.
This is possible by adjusting I/C2. The MO of the IC is to manufacture the capacitor 10.114- so that the absolute value of this capacitance ratio C+/C2 matches the design value.
This is easy in the S process. Therefore, with this circuit configuration, an oscillation circuit with extremely good stability can be realized.
以上述べたように本発明によれば、IC発振器の、印加
電圧によって抵抗値の変化する抵抗体を、このIc発i
器の出力周波数に応じてフィートノくツク補償すること
によって、I’Cに周波数調整用信号を入力するための
外付端子を不要にしているから、IC発振器の内蔵機能
を増加できるという優れた効果がある。As described above, according to the present invention, the resistor of the IC oscillator whose resistance value changes depending on the applied voltage is
This has the excellent effect of increasing the built-in functions of the IC oscillator, as it eliminates the need for an external terminal to input the frequency adjustment signal to the I'C by compensating for the foot drop according to the output frequency of the oscillator. There is.
@1図は本発明の一実施例の構成図、第2図は等価回路
である。
■・・・CR発振回路、2・・・スイソチドキャパシタ
回路、3・・・平滑回路、4・・・アンプ、7・・・バ
リスタ。
代理人弁理士 岡 部 隆@ Figure 1 is a block diagram of an embodiment of the present invention, and Figure 2 is an equivalent circuit. ■...CR oscillation circuit, 2... Swiss isotide capacitor circuit, 3... Smoothing circuit, 4... Amplifier, 7... Varistor. Representative Patent Attorney Takashi Okabe
Claims (1)
おいて、前記抵抗体は印加電圧によって抵抗値の変化す
る抵抗体であり、+tl記IC発振器の出力周波数から
前記抵抗体の印加電圧を制御するフィードバック補償手
段を設けたことを特徴とするIC発@器。In the IC oscillator using discharge by a capacitor and a resistor, the resistor is a resistor whose resistance value changes depending on the applied voltage, and feedback compensation means for controlling the voltage applied to the resistor from the output frequency of the IC oscillator. An IC generator is characterized in that it is equipped with.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58191393A JPS6081921A (en) | 1983-10-12 | 1983-10-12 | Ic oscillator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58191393A JPS6081921A (en) | 1983-10-12 | 1983-10-12 | Ic oscillator |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6081921A true JPS6081921A (en) | 1985-05-10 |
JPH0510845B2 JPH0510845B2 (en) | 1993-02-10 |
Family
ID=16273854
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58191393A Granted JPS6081921A (en) | 1983-10-12 | 1983-10-12 | Ic oscillator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6081921A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7356719B2 (en) | 2005-02-28 | 2008-04-08 | Denso Corporation | Microcomputer |
-
1983
- 1983-10-12 JP JP58191393A patent/JPS6081921A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7356719B2 (en) | 2005-02-28 | 2008-04-08 | Denso Corporation | Microcomputer |
Also Published As
Publication number | Publication date |
---|---|
JPH0510845B2 (en) | 1993-02-10 |
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