JPS6062193A - Method of producing multilayer printed circuit board - Google Patents
Method of producing multilayer printed circuit boardInfo
- Publication number
- JPS6062193A JPS6062193A JP16983183A JP16983183A JPS6062193A JP S6062193 A JPS6062193 A JP S6062193A JP 16983183 A JP16983183 A JP 16983183A JP 16983183 A JP16983183 A JP 16983183A JP S6062193 A JPS6062193 A JP S6062193A
- Authority
- JP
- Japan
- Prior art keywords
- inner layer
- layer circuit
- circuit board
- board
- multilayer printed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Laminated Bodies (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔技術分野〕
本発明はあらかじめ内層回路板の回路間に樹脂?充填さ
せる多層印刷配線板の製造方法に関する〔背景技術〕
従来にあっては第1図に示すように内層回路板fi+の
上下両面にプリづレフ(4)ヲ介して銅箔のような外層
回路形成用板(5)を積層圧着させ、外層回路形成用板
(6)に外層回路全形成して外層回路板(ei k構成
し、(多層印刷配線板(5)を形成していたが、積層圧
着に際してプリプレグ(4)に含浸している樹脂が内層
回路板+11の内層面bil14+21間に流入する時
に空気を巻き込み内層回路(21間にボイドが形成して
し筐い次工程における部品はんだ付は等の熱処理工程に
おいて層間剥離が発生したりして配線板としての信頼性
が損なわれるだけでなく1づりづレフ(4)の樹脂の内
層回@(21間への流入により内層回路板tl+と外層
回路形成用板(5)との間の樹脂分が不足してし筐い耐
熱性、および耐ハロー(侵蝕)性が劣ってしまうという
間瑣がある。[Detailed Description of the Invention] [Technical Field] The present invention does not require resin between the circuits of the inner layer circuit board in advance. [Background technology] Regarding the manufacturing method of a multilayer printed wiring board to be filled, as shown in FIG. 1, conventionally, as shown in FIG. The forming board (5) was laminated and crimped, and the entire outer layer circuit was formed on the outer layer circuit forming board (6) to form an outer layer circuit board (EIK) to form a multilayer printed wiring board (5). During lamination and crimping, when the resin impregnated into the prepreg (4) flows between the inner layer surfaces bil14+21 of the inner layer circuit board+11, it entrains air, forming voids between the inner layer circuit boards 21 and preventing parts soldering in the next process. Not only does delamination occur during the heat treatment process, which impairs the reliability of the circuit board, but also the inflow of resin into the inner layer circuit board tl+ (21) There is a problem that the heat resistance and halo (corrosion) resistance of the casing will be poor due to insufficient resin content between the outer layer circuit forming board (5) and the outer layer circuit forming board (5).
本発明の目的は内層回路板の内層回路間にボイド全形成
させることがなく、シかも耐熱性および耐ハロー性の優
れた多層印刷配線板を製造する方法を提供することにあ
る。An object of the present invention is to provide a method for manufacturing a multilayer printed wiring board that does not completely form voids between inner layer circuits of an inner layer circuit board and has excellent heat resistance and halo resistance.
本発明の多層印刷配線板の製造方法は、内層回路板il
+の内層回路(2)間に樹脂(3)?充填し、内層回路
板il+の上下両面にプリプレグ(4)全弁して銅箔。The method for manufacturing a multilayer printed wiring board of the present invention includes an inner layer circuit board il
Resin (3) between + inner layer circuit (2)? Fill the inner layer circuit board il+ with prepreg (4) and copper foil on both the top and bottom sides of the entire valve.
片面銅張積層板のような外層回路形成用板(5)?積層
圧着すること全特徴とする。以下未発F3Aヲ詳細に説
明する。内層回路板(1)は通常の方法、すなわち両面
銅張積層板に内層パター、7を形1戊し、ついで内層エ
ツチングを施しレジストを除去して上下両面に内層(ロ
)路(2)ヲ形我して得られる。この内層回路板(1)
の内層回路(21の銅箔表面を、たとえば亜塩素酸ソー
タと苛性ソータとの混合液などによりあらかじめ表面処
理を行なっておく。こ7)内層回路板il+の内層回路
)2)間に第2図(a)に示すように内層回路(21表
面を覆うようにして樹脂を充填きせる。この樹脂13)
は積層圧着させるづリプレグ14)と同様の積り旨、た
とえばエポキシ(對]1旨、フェノール樹脂等である。An outer layer circuit forming board (5) like a single-sided copper-clad laminate? All features are laminated and crimped. The unreleased F3A will be explained in detail below. The inner layer circuit board (1) is made by the usual method, namely, forming the inner layer pattern 7 on a double-sided copper-clad laminate, etching the inner layer, removing the resist, and forming the inner layer (b) circuit board (2) on both the upper and lower surfaces. It can be obtained in form. This inner layer circuit board (1)
7) Inner layer circuit of inner layer circuit board il+ (2) The surface of the copper foil of 21 is previously surface-treated with a mixture of a chlorite sorter and a caustic sorter. As shown in Figure (a), the inner layer circuit (resin 13 is filled so as to cover the surface of 21).
The material is similar to that of the repreg 14), which is laminated and crimped, such as epoxy, phenol resin, etc.
内層回路(2)間への樹1指(3)の充填は樹脂(3)
または樹脂(3)溶液?常温せたは加温して内層回路板
(1)にスづしEo−ラーコー1〜.転写、流承したり
、また樹脂(3)溶液の場合は内層回路板il+を浸漬
した後加熱乾燥σせてもよい。樹脂(3)溶液としては
、たとえばエボ+シ樹ロ旨(「エヒコート1001」シ
ェル社製)100gに対してジシアンシア三ド凸部、ベ
ンジルジメ千ルア三y0.2都を配合して溶剤により溶
解させたものを採用できる。この場合加熱乾燥I″i1
凸o’c、凸O分間程度でよい。このようにして内層l
!−i1路(21間に少脂(3)r充填した後、内@(
ロ)路板mの上下両面にづりづレジ(4)を介して銅箔
、I−i″面銅張積IVI板7)ような外層11n路形
我用板(5)を積層圧着させる。すなわち第2図(b)
に示すように内層回路板il+の上下両面にプリづレグ
(4)を配置し、上下のづリプレフ(4)の上面と下面
に外層回路形成用板151 ′に配置し熱温にて圧着条
件50にグ/♂、170℃で圧着させる(菓2図(c)
)。この場合あらかじめ内層1可路板fi+の内層回路
(2)間に樹脂(3)を充填させているので内1n回路
(2)間にはボイドが形成せずしかもつりづレグ(4)
り)含浸)叡脂も内層回路121間に流入しないうこの
後田看させた外層回路形1戊用板(5)に穴明け、無電
解メツ中等通常の方法により外1殻回lt!fk杉我し
て外軸噂1路板(61とするうこのようにして製造した
三層印刷配尿板囚にはボイドがないので赤外線)1−ジ
y’)工程1部品はんだ付は工程などの熱処理工程で層
間剥離が発生することもない。たとえば260℃、60
秒間の熱処理後にも層間剥離がなく、290℃、60秒
の熱処理後にも三ズリーJジが発生しなかった。また3
5%HCLと水(工:1)の混合液に10分間浸漬した
としてもへローが発生しなかった。なお上記実施例にお
いては三層の印刷配線板(5)の製造について説明した
が、本発明の製造方法は四層以上の多層印刷妃線板の製
造にも適用できるものである。The resin (3) is used to fill the inner layer circuit (2) with the first finger (3) of the tree.
Or resin (3) solution? Let it cool to room temperature or warm it up and paste it on the inner layer circuit board (1). It may be transferred or flowed, or in the case of the resin (3) solution, the inner layer circuit board il+ may be immersed and then heated and dried. As the resin (3) solution, for example, 100 g of Evo + Shijuroji ("Ehicoat 1001" manufactured by Shell Co., Ltd.) is mixed with dicyanthia triconvex and benzyl dimethylchloride triy0.2 and dissolved in a solvent. can be adopted. In this case, heat drying I″i1
Convex o'c and convex O minutes are sufficient. In this way, the inner layer l
! -i1 route (after filling 21 with low fat (3) r, inside @(
(b) Copper foil and an outer layer 11n road-shaped ordinary board (5) such as I-i'' surface copper-clad IVI board 7) are laminated and crimped on both the upper and lower surfaces of the road board m via the mounting registers (4). That is, Fig. 2(b)
As shown in the figure, pre-regs (4) are placed on both the upper and lower surfaces of the inner layer circuit board il+, and the outer layer circuit forming board 151' is placed on the upper and lower surfaces of the upper and lower Zuri pre-regs (4), and the bonding conditions are applied at heat temperature. 50g/♂, crimped at 170℃ (Figure 2 (c)
). In this case, since the resin (3) is filled in advance between the inner layer circuits (2) of the inner layer 1 routeable plate fi+, no voids are formed between the inner 1n circuits (2), and the broken leg (4)
ri) Impregnation) Resin also does not flow between the inner layer circuits 121. After checking the outer layer circuit type 1, make a hole in the plate (5) and turn the outer layer by a normal method such as electroless cutting! fk Sugiga's outer shaft rumor 1 Road board (61 and the three-layer printed urine distribution board manufactured in this way has no voids, so infrared light) 1-J') Process 1 Part soldering is a process No delamination occurs during heat treatment steps such as For example, 260℃, 60℃
There was no delamination between the layers even after the heat treatment for 2 seconds, and no 3-J ji occurred even after the heat treatment at 290° C. for 60 seconds. Also 3
Even when immersed in a mixture of 5% HCL and water (work: 1) for 10 minutes, no melting occurred. In the above embodiments, the manufacturing of a three-layer printed wiring board (5) was explained, but the manufacturing method of the present invention can also be applied to the manufacturing of a multilayer printed wiring board (4 or more layers).
本発明にあっては内層回路板の内層ILlj l俗間に
樹脂を充填した後プリづレグ?介して外層回路形1戊用
板を積層圧着するので、積層圧堝゛に1祭して内層回路
間にあらかじめ樹脂が充填しているので、従来の如く空
気を巻き込んで内層回路間にボイドが形成することがな
く、従って次の部品けんだNけ工程のような熱処理工程
で層間剥離が発生することもなく、また内層回路間に(
友指金充填σせていることによりづりづレジの含浸樹脂
が内層回路間に流入することがなく樹脂がリッチな状唾
で積層圧着されるため得られた多層印刷配線板の耐熱性
および耐ハロー性が従来のものと比較して著しく向上す
るものである。In the present invention, after filling the resin between the inner layers of the inner layer circuit board, the inner layer is filled with resin. Since the outer layer circuit type 1 board is laminated and crimped through the laminate, resin is filled between the inner layer circuits in advance in the lamination press, so air is not drawn in and voids are created between the inner layer circuits as in the conventional method. Therefore, delamination does not occur during the heat treatment process such as the next part-bonding process, and (
The heat resistance and durability of the resulting multilayer printed wiring board is improved because the impregnated resin of the Zurizu register does not flow between the inner layer circuits and the resin is laminated and crimped in a rich state due to the filling. Halo properties are significantly improved compared to conventional ones.
箔1図(a) (b) (c)は従来に赴ける製造工程
を示す断面図、第2図(a) (b) (c)は本発明
り)−実施例における製造工程を示す断面図である。
囚・・・多層印刷配線板、(1)・・・内層回路板、(
21・・・内層回路、(3)・・・)對脂、(4)・・
・づリプレフ、(5)・・・外層回路形成用板。
代理人 弁理士 石 1)昆 七
第1図
(0)
第2図Foil Figure 1 (a), (b), and (c) are cross-sectional views showing the conventional manufacturing process, and Figure 2 (a), (b, and c) are cross-sectional views showing the manufacturing process according to the present invention)--an example. It is a diagram. Prisoner...Multilayer printed wiring board, (1)...Inner layer circuit board, (
21...Inner layer circuit, (3)...) fat, (4)...
・Zuripref, (5)...Outer layer circuit formation board. Agent Patent Attorney Ishi 1) Kun 7 Figure 1 (0) Figure 2
Claims (1)
路板の上下両面にづリブレジ會介して銅箔。 片面銅張積層板のような外層回路形成用板を積層圧着す
ることを特徴とする多層印刷配線板の製造方法。[Claims] Copper foil is formed by filling resin between the inner circuits of the il+ inner layer circuit board and applying rib registration on both the upper and lower surfaces of the inner layer circuit board. A method for manufacturing a multilayer printed wiring board, which comprises laminating and crimping outer layer circuit forming boards such as single-sided copper-clad laminates.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16983183A JPS6062193A (en) | 1983-09-14 | 1983-09-14 | Method of producing multilayer printed circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16983183A JPS6062193A (en) | 1983-09-14 | 1983-09-14 | Method of producing multilayer printed circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6062193A true JPS6062193A (en) | 1985-04-10 |
Family
ID=15893718
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16983183A Pending JPS6062193A (en) | 1983-09-14 | 1983-09-14 | Method of producing multilayer printed circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6062193A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02252294A (en) * | 1989-03-25 | 1990-10-11 | Matsushita Electric Works Ltd | Manufacture of multilayer board |
JPH0458591A (en) * | 1990-06-28 | 1992-02-25 | Shin Kobe Electric Mach Co Ltd | Manufacture of multi-layer printed wiring board |
WO1997017824A1 (en) * | 1995-11-10 | 1997-05-15 | Ibiden Co., Ltd. | Multilayered printed wiring board and its manufacture |
US6010768A (en) * | 1995-11-10 | 2000-01-04 | Ibiden Co., Ltd. | Multilayer printed circuit board, method of producing multilayer printed circuit board and resin filler |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5769799A (en) * | 1980-10-16 | 1982-04-28 | Matsushita Electric Works Ltd | Method of producing multilayer printed circuit board |
JPS5792894A (en) * | 1980-11-29 | 1982-06-09 | Matsushita Electric Works Ltd | Method of producing multilayer printed circuit |
JPS58121698A (en) * | 1982-01-12 | 1983-07-20 | 株式会社日立製作所 | Multilayer printed board |
JPS58215094A (en) * | 1982-06-08 | 1983-12-14 | 三菱電機株式会社 | Method of producing multilayer printed circuit board |
-
1983
- 1983-09-14 JP JP16983183A patent/JPS6062193A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5769799A (en) * | 1980-10-16 | 1982-04-28 | Matsushita Electric Works Ltd | Method of producing multilayer printed circuit board |
JPS5792894A (en) * | 1980-11-29 | 1982-06-09 | Matsushita Electric Works Ltd | Method of producing multilayer printed circuit |
JPS58121698A (en) * | 1982-01-12 | 1983-07-20 | 株式会社日立製作所 | Multilayer printed board |
JPS58215094A (en) * | 1982-06-08 | 1983-12-14 | 三菱電機株式会社 | Method of producing multilayer printed circuit board |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02252294A (en) * | 1989-03-25 | 1990-10-11 | Matsushita Electric Works Ltd | Manufacture of multilayer board |
JPH0458591A (en) * | 1990-06-28 | 1992-02-25 | Shin Kobe Electric Mach Co Ltd | Manufacture of multi-layer printed wiring board |
WO1997017824A1 (en) * | 1995-11-10 | 1997-05-15 | Ibiden Co., Ltd. | Multilayered printed wiring board and its manufacture |
US6010768A (en) * | 1995-11-10 | 2000-01-04 | Ibiden Co., Ltd. | Multilayer printed circuit board, method of producing multilayer printed circuit board and resin filler |
US6217988B1 (en) | 1995-11-10 | 2001-04-17 | Ibiden Co., Ltd. | Multilayer printed circuit board, method of producing multilayer printed circuit board and resin filler |
US6251502B1 (en) | 1995-11-10 | 2001-06-26 | Ibiden Co., Ltd. | Multilayer printed circuit board, method of producing multilayer printed circuit board and resin filler |
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